JPH0572109B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a MOS semiconductor device in which a gate electrode is disposed on an insulating film to control the potential of a lower silicon substrate, and is particularly suitable for protecting the gate of an input MOS transistor. The present invention relates to a semiconductor device.

[Technical background of the invention]

Semiconductor devices, especially MOS (Metal Oxide Semiconductor) type semiconductor devices, in which a gate electrode is placed on an insulating oxide film and controls the potential of the underlying silicon substrate, have extremely high input impedance and are dependent on the thickness of the oxide film. Because it is thin at 400 to 1000 Å and has a low dielectric strength of 20 to 100 V, the oxide film (gate oxide film) on the gate portion of the input terminal is easily destroyed by static electricity caused by friction or the like. Therefore, the input terminal of a MOS type semiconductor device is
A protection circuit that utilizes the forward characteristics or breakdown characteristics of the pn junction is always provided to prevent destruction of the gate oxide film.

[Problems with background technology]

However, with the recent trend toward higher integration, gate oxide films have become thinner, elements have become smaller, and the conventional gate protection circuits are no longer able to provide sufficient protection from static electricity.

FIG. 1 shows a typical example of a conventional gate protection circuit in a MOS type semiconductor device. In the figure, 1 is an input terminal, and this input terminal 1 is connected via a resistor R to the gate of an input MOS transistor T2 to be protected. At the connection point between this resistor R and the gate of the input MOS transistor T2, a protection circuit is formed together with the resistor R.
The drain of MOS transistor T1 is connected. A low potential power supply voltage Vss is applied to the source and gate of this MOS transistor T1. Therefore, since the power supply voltage Vss is applied to the gate, the breakdown voltage of the pn junction on the drain side of the MOS transistor T1 is lower than when the MOS transistor T1 is not connected, and this causes the gate oxide film of the input transistor T2 to Increased ability to protect against destruction.

In the gate protection circuit described above, the high voltage applied to the input terminal 1 passes through the resistor R, and after smoothing the steep waveform, the pn of the MOS transistor T1 is
into the junction and the voltage is clamped. This protects the input MOS transistor T2 from high voltage.

FIG. 2 shows the actual pattern arrangement of the circuit shown in FIG. In the figure, an Al wiring 5 is drawn out from a bonding pad 4, and the tip of this Al wiring 5 is connected to one end of the resistor R via a contact hole 6. After the resistor R is formed with a diffusion layer or polysilicon and wired for a relatively long length, it is connected to the diffusion layer of the MOS transistor T1, and is further connected to the gate electrode GE made of polysilicon of the input transistor T2 via contact holes 7 and 8. Connected. Here resistance R
is usually 500 Ω to several kilohms, and this resistor provides a time constant of 1 to 5 nS, which reduces the peak voltage of a sharply rising pulse and enables forward and reverse responses in the diffusion layer. The time constant is adjusted accordingly. However, with such conventional technology, the gate protection of the input transistor T2 relies entirely on the gate protection circuit, and now that gate oxide films are becoming thinner, designing the gate protection circuit has become extremely difficult. Therefore, since the protection ability of the gate protection circuit is insufficient, accidents often occur in which the input transistor T2 is destroyed, and there is a need for improvement.

[Purpose of the invention]

This invention was made in view of the above circumstances,
The purpose is to prevent destruction of the gate oxide film and provide a semiconductor device with improved gate protection function.

[Summary of the invention]

This invention covers at least a portion of the upper surface of the end of the gate electrode of an input MOS transistor with a conductor having the same potential as the gate electrode, and averages the electric field at the end of the gate electrode to prevent breakdown of the gate electrode due to local concentration of the electric field. It is intended to prevent

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings, but before that, the results of an investigation into the aforementioned problems are shown in FIGS. 3 and 4. FIG. 3 shows the location of destruction of the input transistor T2 of the prior art. Here, numerals 9 and 10 indicate drain and source regions formed of diffusion layers, respectively. As a result of the experiment, it was found that the gate oxide film was destroyed at the ends a and b of the gate electrode GE made of polysilicon, but not at the center of the gate region. FIG. 4 shows the distribution of electric lines of force in the cross section of the gate electrode GE made of polysilicon. From this figure, it can be seen that at the central part B of the gate electrode, an equal electric field is applied to the gate oxide film between it and the silicon substrate 11, whereas at the end part A, the electric field is applied because the radius of curvature of this part is small. It can be seen that the lines are concentrated and an extremely large electric field is applied compared to the center part B. Therefore, a discharge occurs at the end A and the gate oxide film is destroyed. In order to weaken the electric field concentration at the end of the gate electrode and suppress discharge, so-called "post-oxidation" is performed to oxidize the surface of the polysilicon after etching the polysilicon gate electrode, thereby increasing the radius of curvature at the end of the gate electrode. Although attempts have been made to make the oxide film slightly thicker, it is not possible to make the radius of curvature greater than the thickness of the gate electrode.In fact, if the post-oxidation is performed too much, the gate electrode becomes thinner, so the radius of curvature must be made smaller instead. There is a limit to post-oxidation because it affects the width of the gate electrode, the depth of the diffusion layer, etc., and it is impossible to greatly improve the dielectric breakdown voltage.

The present invention has been made in view of the above-mentioned circumstances.
By arranging a conductor having the same potential as the gate electrode, the electric field concentration at the end of the gate electrode is weakened, and the dielectric strength of the input transistor itself is improved, thereby preventing breakdown of the transistor. Specifically, for example, as shown in FIG.
It is covered with wiring Aw. The electric field at the center part B of the gate electrode is the same as in the case shown in Fig. 4, but at the end part A of the gate electrode, there is an Al wiring AW with the same potential above, so the electric field from this wiring causes an increase in the electric field at the end part A of the gate electrode. The electric field concentration of is relaxed and the electric field is averaged. Therefore, the insulation voltage of the input transistor is significantly improved. In this case, the Al wiring AW also has an end C, and electric field concentration will occur at this point, but this does not cause any problem because the oxide film is about 10 times thicker than the gate electrode.

FIG. 6 is a plan view of the embodiment shown in FIG. 5, and shows the MOS transistor T1 shown in FIG.
It shows the part from . Normally, the diffusion layer 12 in the gate protection circuit section is formed by contact holes 7 and 8.
It is connected to the gate electrode GE of the input transistor T2 by the Al wiring AW, but in the present invention, the Al wiring AW
does not end at the contact holes 7 and 8, but extends as it is to the transistor T2, and covers the upper part of the end of the gate electrode GE (indicated by diagonal lines) to prevent concentration of electric field at the end of the gate electrode.

FIG. 7 is a sectional view showing a second embodiment of the present invention. In the embodiment shown in Fig. 5, the upper part of the gate electrode end was covered with the Al wiring AW;
The thickness of the oxide film between the Al wiring AW and the substrate 11 is quite large, and the ratio to the gate oxide film is also large. Therefore, in some cases, electric field concentration at the end of the gate electrode cannot be completely prevented. In this example, the upper part of the gate electrode GE end of the input transistor made of the first layer of polysilicon is connected to the second layer of polysilicon GF.
The thickness of the oxide film between this polysilicon GF and the substrate 11 is made relatively small (much thicker than the gate oxide film), thereby further weakening the electric field concentration at the end of the gate electrode GE and further improving the dielectric strength. This is what I did.

FIG. 8 shows a third embodiment of the present invention, in which the upper part of the second polysilicon GF shown in FIG. The electric field concentration is weakened.
In the embodiment of FIG. 7, the first polysilicon
Even if the dielectric strength of GE is improved, if the thickness of the oxide film under the second polysilicon GF is not very large, the second polysilicon GF part may become cracked due to electric field concentration at the edge of the second polysilicon GF. In this embodiment, the electric field concentration at the end of the second polysilicon GF is weakened by the Al wiring AW, and the overall dielectric strength voltage is dramatically improved.

〔Effect of the invention〕

As described above, according to the present invention, the upper part of the gate electrode end of the input transistor is connected to a conductor of the same electric material, for example.
By covering the input transistor with Al wiring or polysilicon, it is possible to eliminate electric field concentration at the end of the gate electrode and average the electric field without changing the manufacturing process, adding chips, or increasing the chip size. It is possible to significantly increase the dielectric strength of the MOS semiconductor device and prevent damage to the MOS type semiconductor device due to static electricity, etc.

[Brief explanation of drawings]

Figure 1 is a configuration diagram of a conventional gate protection circuit, Figure 2
The figure is a plan view showing the circuit pattern arrangement of Fig. 1, Fig. 3 is a plan view showing an enlarged view of the main part of Fig. 2, and Fig. 4 is a plan view showing the circuit pattern arrangement of Fig. 1.
The figure is a cross-sectional view showing the distribution of electric lines of force at the end of the polysilicon gate electrode in FIG. 3, and FIG. 5 is a cross-sectional view of essential parts showing the gate protection structure of an input MOS transistor according to an embodiment of the present invention. , FIG. 6 is a plan view showing the circuit pattern arrangement of FIG. 5, and FIGS. 7 and 8 are sectional views of other embodiments of the present invention. 11...Silicon substrate, GE...gate electrode,
AW...Al wiring, GF...second polysilicon layer.

Claims (1)

[Claims] 1. An input terminal to which an external input signal is applied, and a gate electrode connected to this input terminal.
In a semiconductor device having a MOS transistor, a gate electrode of the MOS transistor is provided entirely on a channel region between a source region and a drain region of the MOS transistor; . A semiconductor device, further comprising a conductor having the same potential as the gate electrode facing the source region and the drain region beyond the end portion of the gate electrode. 2. The semiconductor device according to claim 1, wherein substantially the entire upper surface of the end portion of the gate electrode is covered with the conductor. 3. The semiconductor device according to claim 1, wherein the gate electrode and the conductor are made of polycrystalline silicon or aluminum.