JPH06101662B2 - Filter integrated circuit - Google Patents
Filter integrated circuitInfo
- Publication number
- JPH06101662B2 JPH06101662B2 JP12606485A JP12606485A JPH06101662B2 JP H06101662 B2 JPH06101662 B2 JP H06101662B2 JP 12606485 A JP12606485 A JP 12606485A JP 12606485 A JP12606485 A JP 12606485A JP H06101662 B2 JPH06101662 B2 JP H06101662B2
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- Prior art keywords
- voltage
- circuit
- filter
- signal
- resistor
- Prior art date
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Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明は、シリコン上などに形成するモノリシシツクIC
内にフイルタを集積化する場合に適したフイルタ集積回
路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Use of the Invention] The present invention relates to a monolithic IC formed on silicon or the like.
The present invention relates to a filter integrated circuit suitable for integrating a filter therein.
従来、電子回路では所望の信号を得るために低域波
器,高域波器,帯域波器,位相等化器としてインダ
クタンス,容量,抵抗で構成された外付けのブロツクフ
イルタが多く使われている。例えば、VHS方式の磁気記
録再生装置(以下、VTRと略す)では、第4図に示すよ
うに、ビデオ信号から分離された輝度信号aは集積化さ
れたFM変調器1でFM変調され、次に、色信号処理回路
(図示せず)で低域に変換されたクロマ信号bの帯域と
重なり合わないようにするために、外付けの高域波器
2で帯域が制限され、混合器3で低域変換クロマ信号b
と混合された後、ヘツド4でテープに記録される。近
年、能動素子回路の集積化が増々進んでいるが、このよ
うに、フイルタ類はICの外付け部品となり、このこと
が、電子回路を用いる装置のコスト低減,小型,軽量化
の阻止要因となつている。特に、小型,軽量化が望まれ
るポータブルVTRでは、フイルタ類の集積化は是非とも
必要な技術である。Conventionally, in an electronic circuit, an external block filter composed of an inductor, a capacitor, and a resistor is often used as a low pass wave filter, a high pass wave filter, a band pass wave filter, and a phase equalizer to obtain a desired signal. There is. For example, in a VHS type magnetic recording / reproducing apparatus (hereinafter abbreviated as VTR), a luminance signal a separated from a video signal is FM-modulated by an integrated FM modulator 1 as shown in FIG. In order to prevent the band from overlapping with the band of the chroma signal b converted into the low band by the color signal processing circuit (not shown), the band is limited by the external high band wave filter 2, and the mixer 3 Low frequency conversion chroma signal b
After mixing with, it is recorded on tape at head 4. In recent years, the integration of active element circuits has been increasing more and more. In this way, filters are external parts of ICs, which is a factor to prevent cost reduction, size reduction and weight reduction of devices using electronic circuits. I'm running. In particular, for portable VTRs that are desired to be small and lightweight, it is absolutely necessary to integrate filters.
インダクタンスは、集積化に不適当であり、このこと
が、フイルタ類を集積化できない原因となつているが、
なかには容量,抵抗のみで構成できるものもあり、この
ようなものは集積化に適している。例えば、トラツプフ
イルタとして、第5図に示すように、容量と抵抗のみで
構成されるTwin−T回路が知られている。第5図におい
て、抵抗,容量をそれぞれ とすると、トラツプ周波数Tは となる。Inductance is not suitable for integration, which causes the inability to integrate filters.
Some of them can be composed only of capacitance and resistance, and such a kind is suitable for integration. For example, as a trap filter, as shown in FIG. 5, a Twin-T circuit including only a capacitor and a resistor is known. In Fig. 5, resistance and capacitance are respectively Then, the trap frequency T is Becomes
一方、かかるトラツプフイルタを集積化する場合、特性
のばらつきの問題が生じる。すなわち、IC内の容量値,
抵抗値は、半導体内の不純物濃度,マスクずれなどによ
るばらつきの影響を受け、一例として 容量の絶対置±15% 抵抗の絶対置±10% など大きな変動を生じる。したがつて、このトラツプフ
イルタのトラツプ周波数Tも、第6図のように、a
からbの範囲で変動し、上記例では最大±25%変動す
ることとなり、実用化は極めて困難である。この対策と
しては、特公昭57-58083号公報に、ICチツプ上でレーザ
ートリミングなどにより抵抗値を変化させ、ばらつきを
吸収することが示され、また、実施されているが、精
度,歩留まりの点でまだ多くの問題を残している。On the other hand, when integrating such trap filters, there arises a problem of characteristic variation. That is, the capacitance value in the IC,
The resistance value is affected by variations due to the impurity concentration in the semiconductor and mask shift, and as a result, large fluctuations occur, such as absolute capacitance ± 15% and absolute resistance ± 10%. Therefore, the trap frequency T of this trap filter is also a as shown in FIG.
It fluctuates in the range from 1 to b, and fluctuates up to ± 25% in the above example, which is extremely difficult to put into practical use. As a countermeasure against this, Japanese Patent Publication No. 57-58083 discloses that the resistance value is changed by laser trimming or the like on the IC chip to absorb the variation, and it is implemented. So I still have many problems.
また、特公昭52-36813号公報,米国特許第3761741号に
は、トランジスタのエミツタ抵抗がエミツタ電流によつ
て変化することを利用した可変減衰回路が開示されてお
り、同様の考え方でIC内素子のばらつきによるフイルタ
特性の変動を調整するようにすることが考えられる。し
かし、この技術では、例えば第5図に示したような抵抗
R1,R2,R3からなるトラツプフイルタに適用することは
困難であり、また、すべてのフイルタに適用するのも難
しい。さらに、調整手段を設け、外部から調整してIC内
素子ばらつきを吸収しなければならず、ICピン数の増加
や調整作業を要するなどにより、コストアツプはまぬが
れない。Further, Japanese Patent Publication No. 52-36813 and U.S. Pat. No. 3,761,741 disclose a variable attenuator circuit that utilizes the fact that the emitter resistance of a transistor changes depending on the emitter current. It is conceivable to adjust the variation of the filter characteristics due to the variation of However, in this technique, for example, the resistance as shown in FIG.
It is difficult to apply to a trap filter composed of R 1 , R 2 and R 3 and also difficult to apply to all filters. In addition, adjustment means must be provided to adjust from the outside to absorb variations in the IC elements, which increases the number of IC pins and requires adjustment work.
本発明の目的は、上記従来技術の問題点を解消し、IC内
の容量値や抵抗値のばらつきによつて生じるフイルタ特
性のばらつきを自動的に吸収でき、かつICピン数,周辺
部品の少ない構成のフイルタ集積回路を提供するにあ
る。The object of the present invention is to solve the above-mentioned problems of the prior art, to automatically absorb the variation in the filter characteristics caused by the variation in the capacitance value and the resistance value in the IC, and to reduce the number of IC pins and peripheral components. A filter integrated circuit having a structure is provided.
上記した目的を達成するため、本発明は、比精度の充分
得られた複数個のIC内抵抗(外付け抵抗でも可)からな
る基準レベル発生回路とIC内抵抗RaとIC内接合容量Caか
らなる擬似フイルタ回路とにある基準周波数の信号を入
力し、上記基準レベル発生回路の出力レベルと上記擬似
フイルタ回路の出力レベルを比較回路で比較し、両出力
レベルが一致するように上記比較回路出力Vaを上記IC内
接合容量Caの一端に負帰還する(もう一方の端子には固
定電圧Vbを印加)。上記IC内接合容量Caは両端印加電圧
の変化に応じてその容量値が変化し、擬似フイルタ回路
のフイルタ特性のばらつきを吸収する。さらに上記擬似
フイルタ回路のIC内抵抗Ra,IC内接合容量Caと各々十分
比精度の得られたIC内抵抗Rb,IC内接合容量Cbにより所
望フイルタ回路を構成し、上記IC内接合容量Cbに上記比
較回路出力Vaを供給して、自動的に所望フイルタ回路の
フイルタ特性のばらつきを精度よく吸収し無調整化す
る。In order to achieve the above-mentioned object, the present invention uses a reference level generating circuit composed of a plurality of IC internal resistances (or external resistances may be used) with sufficient specific accuracy, an IC internal resistance Ra, and an IC internal junction capacitance Ca. To the pseudo filter circuit, the output level of the reference level generation circuit and the output level of the pseudo filter circuit are compared by the comparison circuit, and the comparison circuit output is output so that both output levels match. Va is negatively fed back to one end of the junction capacitance Ca in the IC (a fixed voltage Vb is applied to the other terminal). The capacitance value of the junction capacitance Ca in the IC changes according to the change in the voltage applied across the IC, and the variation in the filter characteristics of the pseudo filter circuit is absorbed. Further, the desired filter circuit is configured by the IC internal resistance Ra of the pseudo filter circuit, the IC internal junction capacitance Ca, and the IC internal resistance Rb and the IC internal junction capacitance Cb, each of which is sufficiently accurate, and the IC internal junction capacitance Cb By supplying the above-mentioned comparison circuit output Va, the variation in the filter characteristics of the desired filter circuit is automatically absorbed with high accuracy and the adjustment is eliminated.
さらに所望フイルタ回路の入力段に差動増幅器を構成
し、上記差動増幅器の出力負荷の電源側一端には上記固
定電圧Vbに相当した電圧を印加して、フイルタ入力信号
へ固定電圧Vbに相当した電圧を重畳させる。かつ上記比
較回路出力Vaに相当した電圧を上記IC内接合容量C2の一
端に供給して、上記IC内接合容量Ca,Cbともに同じ両端
印加電圧を供給する。これにより、ICピン数,周辺部品
の増加なしにフイルタ入力端で直流電圧レベルを与えな
おすことができる。Further, a differential amplifier is configured at the input stage of the desired filter circuit, and a voltage corresponding to the fixed voltage Vb is applied to one end of the output load of the differential amplifier on the power supply side to correspond to the fixed voltage Vb for the filter input signal. The applied voltage is superimposed. A voltage corresponding to the output Va of the comparison circuit is supplied to one end of the junction capacitance C 2 in the IC, and the same applied voltage across both ends of the junction capacitances Ca and Cb in the IC is supplied. As a result, the DC voltage level can be reapplied at the filter input terminal without increasing the number of IC pins and peripheral components.
以下、本発明の実施例を図面によつて説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第1図は本発明によるフイルタ集積回路の一実施例を示
す構成図であつて、5は基準信号源,6は互いに比精度の
充分得られたIC内抵抗ReRfからなる基準レベル発生回
路,7はIC内抵抗RaとIC内接合容量Caとからなる擬似フイ
ルタ回路,8,9は入力信号のレベルを検出するレベル検出
器,10は比較回路,11は外付け容量,12は基準電圧Vbの定
電圧源,13はトランジスタ14,15,負荷抵抗16および定電
流源17からなる差動増幅器,18は抵抗19と定電流源20と
からなる直流シフト回路,21はトランジスタ22〜26,定電
流源27〜31,IC内抵抗Rb1,Rb2,Rb3,Rb4およびIC内接
合容量Cb1,Cb2,Cb3,Cb4で構成された高域波器,32
はFM変調器,33,34はICピンである。FIG. 1 is a block diagram showing an embodiment of a filter integrated circuit according to the present invention, in which reference numeral 5 is a reference signal source, 6 is a reference level generating circuit consisting of an internal resistor ReRf having a sufficient relative accuracy, and 7 Is a pseudo filter circuit consisting of the resistance Ra in the IC and the junction capacitance Ca in the IC, 8 and 9 are level detectors that detect the level of the input signal, 10 is a comparison circuit, 11 is an external capacitor, and 12 is a reference voltage Vb. A constant voltage source, 13 is a differential amplifier consisting of transistors 14 and 15, a load resistor 16 and a constant current source 17, 18 is a DC shift circuit consisting of a resistor 19 and a constant current source 20, 21 is transistors 22 to 26, constant current Source 27-31, resistance in IC Rb 1 , Rb 2 , Rb 3 , Rb 4 and junction capacitance Cb 1 , Cb 2 , Cb 3 , Cb 4 in IC, 32
Is an FM modulator, and 33 and 34 are IC pins.
同図において、ICピン33から入力された基準信号は、基
準レベル発生回路6と擬似フイルタ回路7に供給され
る。基準レベル発生回路6からは、第2図の直線Dで示
すある一定レベルの信号が取り出され、レベル検出器8
に供給される。一方、上記擬似フイルタ回路7からはそ
のフイルタ特性に応じて減衰した信号が取り出され、レ
ベル検出器9に供給される。レベル検出器8,9の出力信
号はそれぞれ比較回路10に入力され、容量11により直流
電圧制御信号Vaとなつた比較出力が得られる。この比較
出力は、制御信号として、擬似フイルタ回路7のIC内接
合容量Caの一端に帰還し、IC内接合容量Caの両端印加電
圧を変化させる。この帰還制御により、上記IC内接合容
量Caの容量値を変化させ、擬似フイルタ回路3の出力が
基準レベル発生回路6の出力と同じレベルとなるように
制御される。即ち、IC内抵抗RaおよびIC内接合容量Caの
ばらつきによつて生じる第2図の曲線A,Bで示すような
フイルタ特性のばらつきに対して、基準信号源5の周波
数inで発生回路6の出力Dと一致するような第2図の
フイルタ特性Cに制御される。つまり、抵抗Raと容量Ca
の積(時定数)は常に一定となる。さらに、所望の集積
化フイルタである高域波器21を構成しているIC内抵抗
Rb1〜Rb4,IC内接合容量Cb1〜Cb4とIC内抵抗Ra,IC内接合
容量Caとの比精度を各々充分取り、かつ上記IC内接合容
量Ca,Cb1〜Cb4の両端印加電圧が共に等しくなるように
することにより、各々のIC内接合容量の容量値が同様に
変化し、高域波器21におけるフイルタ特性のばらつき
が自動的に吸収されることとなる。In the figure, the reference signal input from the IC pin 33 is supplied to the reference level generation circuit 6 and the pseudo filter circuit 7. From the reference level generation circuit 6, a signal of a certain level indicated by the straight line D in FIG.
Is supplied to. On the other hand, a signal attenuated according to the filter characteristic is taken out from the pseudo filter circuit 7 and supplied to the level detector 9. The output signals of the level detectors 8 and 9 are respectively input to the comparison circuit 10, and the capacitor 11 obtains a comparison output which is the DC voltage control signal Va. This comparison output is fed back to one end of the in-IC junction capacitance Ca of the pseudo filter circuit 7 as a control signal to change the voltage applied across the in-IC junction capacitance Ca. By this feedback control, the capacitance value of the junction capacitance Ca in the IC is changed so that the output of the pseudo filter circuit 3 becomes the same level as the output of the reference level generating circuit 6. That is, with respect to the variations in the filter characteristics as shown by the curves A and B in FIG. 2 caused by the variations in the resistance Ra in the IC and the junction capacitance Ca in the IC, the frequency of the reference signal source 5 in The filter characteristic C shown in FIG. 2 is controlled so as to match the output D. That is, resistance Ra and capacitance Ca
The product of (time constant) is always constant. Furthermore, the resistance in the IC that constitutes the high-frequency wave filter 21, which is the desired integrated filter,
Rb 1 to Rb 4 , the IC junction capacitances Cb 1 to Cb 4 and the IC internal resistance Ra, the IC junction capacitance Ca are sufficiently accurate, and both ends of the IC junction capacitances Ca and Cb 1 to Cb 4 are By making the applied voltages equal to each other, the capacitance values of the junction capacitances in the respective ICs similarly change, and variations in the filter characteristics in the high pass filter 21 are automatically absorbed.
ここで、FM変調器32の出力信号は差動増幅器13に入力さ
れる。差動増幅器13の出力信号は定電圧源12の基準電圧
Vbから抵抗16の抵抗値R16と定電流源17の電流値I17の約
半分の値の積に相当する だけ低下した電圧を直流成分とする信号となる。次に、
この信号がトランジスタ22のベース・エミツタ間電圧V
BEだけ直流シフトしてIC内接合容量Cb1〜Cb3のアノード
側に印加される。さらに、トランジスタ24,25を介し
て、IC内接合容量Cb4のアノード側に供給される。即
ち、IC内接合容量Caのアノード側に印加された電圧Vbか
ら だけ直流シフトされた電圧を直流成分とするFM信号が高
域波器21を構成するIC内接合容量Cb1〜Cb4のアノード
側に供給される。Here, the output signal of the FM modulator 32 is input to the differential amplifier 13. The output signal of the differential amplifier 13 is the reference voltage of the constant voltage source 12.
Equivalent to the product of the resistance value R 16 of the resistor 16 and the current value I 17 of the constant current source 17 which is about half of Vb The resulting voltage is a signal whose DC component is the reduced voltage. next,
This signal is the base-emitter voltage V of transistor 22.
And only DC shifts BE is applied to the anode side of the junction capacitance Cb 1 to CB 3 the IC. Furthermore, it is supplied to the anode side of the junction capacitance Cb 4 in the IC via the transistors 24 and 25. That is, from the voltage Vb applied to the anode side of the junction capacitance Ca in the IC An FM signal whose DC component is a voltage shifted by only DC is supplied to the anode side of the junction capacitances Cb 1 to Cb 4 in the IC configuring the high pass filter 21.
一方、IC内接合容量Caのカソード側には、上述の帰還制
御により、直流電圧Vaが供給されている。この電圧Va
は、抵抗19により、電流値が である定電流源20(定電流源17と高い比精度可能)の電
流値I20と抵抗値がR16である抵抗19(抵抗16と比精度を
充分とれる)の抵抗値R19との積の電圧だけ低下し、さ
らに、トランジスタ23によつてベース・エミツタ間電圧
VBEだけ直流シフトされてIC内接合容量Cb1〜Cb4のカソ
ード側に供給される。即ち、IC内接合容量Caのカソード
側に印加された だけ直流シフトされた電圧が、IC内接合容量Cb1〜Cb4の
カソード側に供給される。On the other hand, the DC voltage Va is supplied to the cathode side of the junction capacitance Ca in the IC by the above feedback control. This voltage Va
Is the resistance 19 Product of the resistance value R 19 of the constant current source 20 resistor value a current value I 20 of (constant current source 17 and the high specific accuracy possible) is R 16 resistor 19 (take sufficiently a resistor 16 relative accuracy) is Of the base-emitter voltage by the transistor 23.
It is DC-shifted by V BE and supplied to the cathode side of the junction capacitances Cb 1 to Cb 4 in the IC. That is, applied to the cathode side of the junction capacitance Ca in the IC Only the DC shifted voltage is supplied to the cathode side of the IC in the junction capacitance Cb 1 ~Cb 4.
したがつて、IC内接合容量Caの両端印加電圧と同じ電圧
をIC内接合容量Cb1〜Cb4に印加させることができ、IC内
の簡単な構成でFM変調器32の出力信号にIC内接合容量の
両端印加直流制御信号を与えることができる。また、こ
の両端印加直流制御信号を与えるために、FM変調器32の
出力信号を一度IC外に出力し、大きな容量値の外付け容
量で直流カツトさせるという従来方法に対して、この実
施例はICピン数を増加させることなく、無調整のフイル
タ集積回路を実現できるという効果があり、不要となつ
たICピンによつてさらに高集積化が図れる。なお高域
波器21では、IC内接合容量Cb1〜CB3とIC内抵抗Rb1〜Rb3
とにより、トラツプフイルタ特性が得られ、IC内接合容
量Cb4とIC内抵抗Rb4とにより、高域通過1次フイルタ特
性が得られて、総合的に低域を急峻に低下させている。Therefore, the same voltage as the applied voltage across the junction capacitance Ca in the IC can be applied to the junction capacitances Cb 1 to Cb 4 in the IC, and the output signal of the FM modulator 32 can be applied to the output signal of the FM modulator 32 in the IC with a simple configuration in the IC. A DC control signal applied across the junction capacitance can be applied. Further, in order to give the DC control signal applied to both ends, the output signal of the FM modulator 32 is once output outside the IC, and the DC cutting is performed by the external capacitance having a large capacitance value. The effect is that an unadjusted filter integrated circuit can be realized without increasing the number of IC pins, and the IC pins that are not required can achieve higher integration. Note that in the high-frequency wave 21, the junction in the IC capacitance Cb 1 to CB 3 and IC in resistance Rb 1 ~Rb 3
The trap filter characteristic is obtained by the above, and the high pass first order filter characteristic is obtained by the junction capacitance Cb 4 in the IC and the resistance Rb 4 in the IC, and the low range is sharply reduced as a whole.
第3図は本発明によるフイルタ集積回路の他の実施例を
示す構成図であつて、35は差動増幅器13の電源側へ定電
圧源12の電圧Vbに相当した電圧を供給する直流シフト回
路,36〜43はトランジスタ,42,43は抵抗,44は定電圧源,4
5,46は定電流源であり、第1図と同一あるいは同等部分
に同一符号を付している。FIG. 3 is a block diagram showing another embodiment of the filter integrated circuit according to the present invention, in which a DC shift circuit 35 supplies a voltage corresponding to the voltage Vb of the constant voltage source 12 to the power source side of the differential amplifier 13. , 36 to 43 are transistors, 42 and 43 are resistors, 44 is a constant voltage source, 4
Reference numerals 5 and 46 denote constant current sources, and the same or equivalent parts as those in FIG. 1 are designated by the same reference numerals.
第3図において、各々比精度の充分得られたトランジス
タ40,41,抵抗42,43及び定電圧源44により定電流源20,17 を構成し、トランジスタ36,37はカレントミラー回路を
構成している。抵抗19の一端(トランジスタ38と接続さ
れている側)には、上記定電圧源12の電圧Vbは抵抗19
(第1図と同様、抵抗値は抵抗16と同じ値でR16)を介
して となり、さらに、比精度の充分得られたトランジスタ3
8,39を介して、抵抗16の一端(差動増幅器13の電源側)
に となつて供給される。したがつて抵抗16の他端に生じる
FM変調器32の平均直流出力は、抵抗16に電流源17が流れ
たり流れなかったりするので、 を直流成分とする信号となる。In FIG. 3, the constant current sources 20 and 17 are formed by the transistors 40 and 41, the resistors 42 and 43, and the constant voltage source 44, each of which has a sufficient ratio accuracy. And the transistors 36 and 37 form a current mirror circuit. At one end of the resistor 19 (the side connected to the transistor 38), the voltage Vb of the constant voltage source 12 is applied to the resistor 19
(As in Fig. 1, the resistance value is the same as that of resistor 16 and is R 16 ) In addition, the transistor 3 with sufficient ratio accuracy was obtained.
One end of the resistor 16 via 8,39 (power supply side of the differential amplifier 13)
To Will be supplied. Therefore, it occurs at the other end of the resistor 16.
The average DC output of the FM modulator 32 may or may not flow through the resistor 16 with the current source 17. Is a signal with a DC component.
次に、比精度の充分得られたトランジスタ42,43を介し
て、同じ直流成分(電圧Vb)の信号がIC内接合容量Cb1
〜Cb4のアノード側に供給される。一方、IC内接合容量C
b1〜Cb4のカソード側には、電圧Vaと同じ両端印加電圧
が、常に、IC内接合容量Cb1〜Cb4に印加されることとな
る。ここで、IC内接合容量Caの端子印加電圧とIC内接合
容量Cb1〜Cb4の各々の端子印加電圧とに差があると、例
えば、第1図では、 の差があるが、この場合、与えられた電流電圧に対して
その分だけIC内接合容量の制御範囲が狭くなる。第3図
の実施例では、上述のように、上記の差がないから、フ
イルタ特性のばらつきに対して最大の吸収範囲が得られ
るという効果がある。Next, the signal of the same DC component (voltage Vb) is passed through the transistors 42 and 43 with sufficient relative accuracy to the junction capacitance Cb 1 in the IC.
~ Is supplied to the anode side of Cb 4 . On the other hand, IC junction capacitance C
On the cathode side of b 1 to Cb 4, the same applied voltage across the voltage Va is always applied to the junction capacitances Cb 1 to Cb 4 in the IC. Here, if there is a difference between the terminal applied voltage of the junction capacitance Ca in the IC and the terminal applied voltage of each of the junction capacitances Cb 1 to Cb 4 in the IC, for example, in FIG. However, in this case, the control range of the junction capacitance in the IC is narrowed by that amount for a given current voltage. In the embodiment of FIG. 3, since there is no difference as described above, there is an effect that the maximum absorption range can be obtained with respect to variations in filter characteristics.
なお、以上夫々の実施例では、フイルタ集積回路への入
力信号としてFM変調器出力を示しているが、ビデオ信
号、音声信号でも同様の効果が得られることは明白であ
る。In each of the above embodiments, the FM modulator output is shown as the input signal to the filter integrated circuit, but it is obvious that the same effect can be obtained with the video signal and the audio signal.
以上説明したように、本発明によれば、フイルタ特性の
ばらつきを自動的に吸収でき、IC内の簡単な回路構成で
ICピン数の増加なく上記吸収制御範囲の向上が図れるも
のであつて、従来外付け部品とされていた大型ブロツク
フイルタを、外部からの調整手段を必要とせず、集積化
が可能となり、低コスト化,小型,軽量化を可能とした
フイルタ集積回路を提供できる。As described above, according to the present invention, variations in filter characteristics can be automatically absorbed, and a simple circuit configuration inside the IC can be used.
The absorption control range can be improved without increasing the number of IC pins, and large block filters, which were conventionally external components, can be integrated without the need for external adjustment means, resulting in low cost. It is possible to provide a filter integrated circuit that can be made smaller, smaller and lighter.
第1図は本発明によるフイルタ集積回路の一実施例を示
す構成図、第2図はこの実施例の動作説明図、第3図は
本発明によるフイルタ集積回路の他の実施例を示す構成
図、第4図はフイルタを用いる磁気記録再生装置のブロ
ツク図、第5図はトラツプ特性を有するフイルタの一例
を示す回路図、第6図はその周波数特性を示す特性図で
ある。 5……基準信号源、6……基準レベル発生回路、7……
疑似フイルタ回路、8,9……レベル検出器、10……比較
回路、13……差動増幅器、18……直流シフト回路、21…
…高域波器、33,34……ICピン、35……直流シフト回
路FIG. 1 is a block diagram showing an embodiment of a filter integrated circuit according to the present invention, FIG. 2 is an operation explanatory view of this embodiment, and FIG. 3 is a block diagram showing another embodiment of a filter integrated circuit according to the present invention. 4 is a block diagram of a magnetic recording / reproducing apparatus using a filter, FIG. 5 is a circuit diagram showing an example of a filter having a trap characteristic, and FIG. 6 is a characteristic diagram showing its frequency characteristic. 5 ... Reference signal source, 6 ... Reference level generation circuit, 7 ...
Pseudo filter circuit, 8, 9 ... Level detector, 10 ... Comparison circuit, 13 ... Differential amplifier, 18 ... DC shift circuit, 21 ...
… High-frequency wave filters, 33,34 …… IC pins, 35 …… DC shift circuit
Claims (1)
取られた複数個の第1の抵抗器群によって減衰させる基
準レベル発生回路と、上記基準信号を入力信号とし上記
第1の抵抗器群と高い比精度が取られた第2の抵抗器と
第1の接合容量で構成された擬似フイルタ回路と、上記
第1の接合容量の一端に直流電圧信号を供給する基準電
圧源と、上記基準レベル発生回路の出力レベルを検出す
る第1のレベル検出回路と、上記擬似フイルタ回路の出
力レベルを検出する第2のレベル検出回路と、上記第1
および第2のレベル検出回路の両出力を入力信号とし出
力を上記第1の接合容量のもう一端に制御信号として帰
還する電圧比較回路と、上記第2の抵抗器と高い比精度
が取られた第3の抵抗器群と上記第1の接合容量と高い
比精度が取られた第2の接合容量群で構成されたフイル
タ回路を具備し、上記フイルタ回路の入力段に差動増幅
器を有し、上記差動増幅器の電源として上記基準電圧源
から供給される電圧を印加して上記基準電圧源と同一又
はある一定電圧増減した電圧を上記第2の接合容量の一
端に供給するとともに、上記制御信号と上記同一又はあ
る一定電圧と同じだけ増減した電圧を上記第2の接合容
量のもう一端に供給することを特徴とするフイルタ集積
回路。1. A reference level generating circuit for attenuating an input reference signal by a plurality of first resistor groups having high relative accuracy, and the first resistor using the reference signal as an input signal. A pseudo filter circuit composed of a second resistor and a first junction capacitance having high ratio accuracy with the group; a reference voltage source for supplying a DC voltage signal to one end of the first junction capacitance; A first level detecting circuit for detecting an output level of the reference level generating circuit; a second level detecting circuit for detecting an output level of the pseudo filter circuit;
A high ratio precision is obtained between the voltage comparator circuit that uses both outputs of the second and second level detection circuits as input signals and the output is fed back to the other end of the first junction capacitance as a control signal, and the second resistor. A filter circuit including a third resistor group and a second junction capacitor group having a high ratio accuracy with the first junction capacitor is provided, and a differential amplifier is provided in an input stage of the filter circuit. , A voltage supplied from the reference voltage source as a power source of the differential amplifier, and a voltage that is the same as the reference voltage source or increased or decreased by a certain voltage is supplied to one end of the second junction capacitor, and the control is performed. A filter integrated circuit, wherein the same voltage as the signal or a voltage increased / decreased by a certain constant voltage is supplied to the other end of the second junction capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12606485A JPH06101662B2 (en) | 1985-06-12 | 1985-06-12 | Filter integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12606485A JPH06101662B2 (en) | 1985-06-12 | 1985-06-12 | Filter integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61285816A JPS61285816A (en) | 1986-12-16 |
| JPH06101662B2 true JPH06101662B2 (en) | 1994-12-12 |
Family
ID=14925730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12606485A Expired - Lifetime JPH06101662B2 (en) | 1985-06-12 | 1985-06-12 | Filter integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06101662B2 (en) |
-
1985
- 1985-06-12 JP JP12606485A patent/JPH06101662B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61285816A (en) | 1986-12-16 |
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