JPH0618355B2 - Multiplex transmission system - Google Patents

Description

DETAILED DESCRIPTION [Overview] A part of the horizontal synchronizing signal of a digital video signal is replaced with a unique word area in which a unique word is inserted, and the digital video signal and digital audio signal are multiplexed and transmitted as a serial signal. In the multiplex transmission system, the sampling frequency of the video signal is f _v and the number of bits of 1 word is
N _v, and the number of bits of the unique word area is L × N _v
And L is equal to or less than half the number of samples of the video signal at the base of the horizontal synchronization signal, and the transmission timing of the unique word area is set to the sampling frequency f _{v of the} video signal.
When the horizontal synchronizing signal is punched out with a clock of f _v / L obtained by dividing by
f _a is defined as f _v / (L · n _a ) obtained by dividing the sampling frequency f _v by the product of the L and the bit number n _a of one word of the digital voice signal, and the voice of the frequency f _a Each 1 bit of a digital audio signal sampled at a signal sampling period and made into a serial signal is multiplexed by inserting the digital video signal into a portion in which the number of bits of 1 word is reduced by 1 bit for each L sample. When a bit is inserted in the unique word area, the audio bit position information indicating the bit number of one word of audio data is also inserted and transmitted in the unique word area. By doing so, it is possible to realize a multiplex transmission system that can reduce the circuit scale.

[Industrial application field]

The present invention relates to an improvement of a multiplexing transmission system for multiplexing and transmitting a digital video signal and a digital audio signal.

[Problems to be solved by conventional technology and invention]

FIG. 7 is a diagram showing the contents of the unique word area when only the video signal is transmitted.

First, the case of transmitting only a digital video signal will be described.

Even if the digitized data in word units is converted into serial data and transmitted, it cannot be reproduced because there is no bit synchronization signal for converting the original data in word units on the receiving side.

Therefore, a part of the video data is cut and data for obtaining synchronization is inserted so that the bit synchronization signal can be obtained on the receiving side.

This data needs to be distinguishable from the video data. For example, if the word when the video data is digitized is 5 bits, the word 00000 is not used. In this way, when video data is serialized, 0 lasts the longest ... 1000000001
・ 8 patterns are the highest in the pattern. So 0 is 10
Continuous pattern XXXX100000000001
Data (unique word) for synchronizing XXXXXXXXXXXXXXX (X may be 1 or 0)
And

As shown in FIG. 7, the insertion position is the data of the base portion of the horizontal synchronizing signal which has a constant level and can be reproduced by the receiving side without transmitting the video data of that portion (the signal of this portion is converted from the digital signal to the digital signal). It is possible to make constant digital data by clamping with a clamp circuit when you)), and transmit in place of the removed part.

FIG. 8 is a block diagram of a conventional multiplex transmission device.

Next, referring to FIG. 8, a case in which video data is multiplexed with audio data and transmitted will be described.

In FIG. 8, assuming that the frequency of the transmission clock is f _t , the frequency of the audio sampling clock f _a = f _t / M
The frequency is divided by the M frequency dividing circuit 27 to obtain the digitizing circuit 24, the parallel / serial conversion circuit 25, and the switching control circuit 29.
Give to.

In the transmission line, the switching control circuit 29 switches the switching circuit 2
3 is generated, and a 30-bit serial signal generated in the unique word generation circuit 26, for example, in the unique word area shown in FIG. 7 is used as the frequency f _a = f _t / M of the audio sampling clock.
The audio signal of n _a bits which is inserted or input at the cycle of 3 is sampled by the digitizing circuit 24 at the cycle of f _a = f _t / M.
A 0-bit serial signal is transmitted after being collectively transmitted.

On the other hand, the input video signal is digitized by the digitizing circuit 20 and the video data stored in the buffer memory 21 is sent until the next unique word area data and audio data are transmitted.

Therefore, if the sampling frequency f _v of the video signal is B _{v where the} number of bits of one word is B _v , the number of bits of video data sent during that period is [M− (X + n _a )] bits, which is the period of the unique word area. The number of samples in M / _ft time N _v = [M−
(X + n _a )] / B _v sample, and f _v = f _t × N
_v / M).

Therefore, the transmission clock is divided by the M / N _v divider circuit 28,
It is added to the digitizing circuit 20 and the buffer memory 21.

Here, if N _v is an integer, the ratio of f _v and f _t is an integer, and the number of bits of video data generated during M / f _t time is B
_It becomes equal to [M− (X + n _a )] in _v × N _v bits.

At this time, the buffer memory 21 has a capacity of f _v
· B _v · in (M / f _t) bits or less, f _v · B _v write at a constant rate (bit / time), reading period for transmitting video data [M- (X + n _a)] / f _t ( Time) to f
_It suffices if the configuration is such that the data can be read out at a speed of _t (bit / time).

At this time, since the video data is always multiplexed from the first bit of the word data, the bit synchronization signal for converting serial data into parallel data on the receiving side can be obtained by the unique word before the audio data.

If N _v is not an integer, the number of generated bits of the video data does not match the number of transmitted bits, and if the number of generated bits is greater, the buffer memory 21 overflows and all the video data may be transmitted. I can't. In this case, N _v is selected so that the number of generated bits is less than the number of bits that can be transmitted so that the video data can be transmitted reliably.

Therefore, the video data output from the buffer memory 21 is converted into a serial signal by the parallel-serial conversion circuit 22 and the switching circuit 2
3, and the sequence of transmission data is sent out as a unique word area + audio data + video data + remainder under the control of the switching control circuit 29.

A band compression code is used to digitize the video data.
If variable length coding capable of changing the number of bits of a word is used, the bit length can be lengthened or shortened depending on the vacant portion of the buffer memory 21, so that video data can be multiplexed without creating the above remainder. I can. However, it is necessary to multiplex and transmit the information indicating the number of bits of one word in addition to the video data.

However, the conventional multiplex transmission method requires a buffer memory, which causes a problem that the circuit scale becomes large.

An object of the present invention is to provide a multiplex transmission system which can reduce the circuit scale and which multiplexes and transmits a digital video signal and a digital audio signal.

[Means for solving problems]

The above problem is caused by replacing a part of the horizontal synchronizing signal of the digital video signal with a unique word area in which a unique word is inserted, and multiplexing the digital video signal and the digital audio signal to transmit as a serial signal. , The sampling frequency of the video signal is f _v , the number of bits of one word is N _v, and the number of bits of the unique word area is L
× N _v , L is set to ½ or less of the number of samples of the video signal at the base of the horizontal synchronizing signal, and the transmission timing of the unique word region is divided by the sampling frequency f _v of the video signal by the above L. When the horizontal synchronizing signal is punched out with a clock of f _v / L, the sampling frequency f _a of the audio signal is set to the sampling frequency f _v
And f _v / (L · n _a ) divided by the product of the number n _a of bits of one word of the digital audio signal, and a digital signal sampled at the sampling period of the audio signal of the frequency f _a to be a serial signal When each 1 bit of an audio signal is multiplexed by inserting the digital video signal into a portion where the number of bits of 1 word is reduced by 1 bit for each L sample, and the 1 bit is inserted in the unique word area. Is solved by the multiplex transmission method of the present invention in which the bit is also inserted into the unique word area and audio bit position information indicating which bit of one word of audio data is inserted and transmitted.

[Work]

According to the present invention, the sampling frequency of the video signal is set to f
_v , the number of bits of one word is N _v , the number of bits of the unique word area is L × N _v , and L is 1/2 or less of the number of samples of the video signal at the base of the horizontal synchronization signal, and the transmission timing of the unique word regions, since the sampling frequency f _v of the video signal are as when punched horizontal synchronizing signal at the clock of f _{v /} L obtained by dividing the above L, a clock of f _{v /} L and the horizontal Even if the sync signal is asynchronous, the unique word area is always transmitted to the base of the horizontal sync signal, and the serialized video data is converted to the original word unit data based on the unique word in the unique word area. You can

Also, the sampling frequency f _a of the audio signal is divided by the product of the above L of the sampling frequency f _v of the video signal and the number of bits n _a of one word of the digital audio signal f _v / (L
N _a ), each 1 bit of the digital audio signal sampled in the audio sampling cycle of the frequency f _a and made into a serial signal is reduced by 1 bit for each L sample of the digital video signal. When the 1 bit is inserted in the unique word area, the bit indicating the number of the bit of one word of the audio data is inserted in the unique word area. Bit position information is also inserted and transmitted.

Therefore, the receiving side can extract the bit of the audio data from the transmission data bit string at the frequency of f _v / L based on the unique word, and also can extract the original bit based on the audio bit position information of the unique word area. Can be converted to word data.

That is, multiplexing is possible without using a buffer memory,
The circuit scale can be reduced.

〔Example〕

FIG. 1 is a block diagram of a main part of a multiplex transmission apparatus according to an embodiment of the present invention, FIG. 2 is a time chart showing the input information of FIG. 1, and (A) to (F) of FIG. It corresponds to points a to f.

FIG. 3 shows the flip-flop of FIG. 1 (hereinafter referred to as FF).
3 is a diagram showing input information to FIG. 3, FIG. 4 is a block diagram of a circuit that determines the transmission timing of the unique word area, and FIG. 5 is a time chart of waveforms of respective parts in FIG.
(F) corresponds to points a to f in FIG. (A)
(E) and (f) are reduced views of (A), (E), and (F).

FIG. 6 is a diagram showing multiplexed data output from the selector 4 of FIG.

FIG. 1 is a diagram showing the part below the output side of the digitizing circuit 20, the parallel-serial converting circuit 25, and the unique word generating circuit 26 of FIG. 8 of the conventional example, and the bit number of one word of the video signal in this case. 5, the number of bits in one word of the audio signal is 32, and a signal obtained by serializing 32 bits as shown in FIG. 2 (A) is input to the ROM 2 of FIG.
3, ROM 2 receives the video data as shown in FIG. 2 (F). The LSB of the video data is input to ROM2.

When the frequency of the clock of the transmission line is f _t and the number of bits of the width of the unique word area is L (6 in FIG. 2), the sampling frequency of the video signal is f _v = f _t / 5, and the audio signal is Sampling frequency f _a = f _t / (5 ·
32 · L) there as _{-f v / (32 · L)} .

The video data and audio data are multiplexed by fusing the 32-bit audio data sampled at the period of f _a one bit at a time.
Video data is cut and inserted at a cycle of _v / L. Therefore, as shown in FIG. 2 (B), 4-bit coding information indicating the timing of 4-bit coding of video data for inserting audio data is input to the ROM 2 of FIG.

The output shown in FIG. 2 (E) from the video counter that repeats counting up to 6 bits of the width of the unique word area is also input to the ROM 2.

Also, when the voice data is multiplexed within the unique word area, the voice bit position information shown in FIG. 2 (D) showing the bit number of one word of the voice data is also input to the ROM 2.

The reset signal for defining the unique word area shown in FIG. 2 (C) is made by the circuit shown in FIG.

In the ROM2, L of video data is input from these input signals.
1-bit audio data is inserted into 1-bit SB at the timing of 4-bit coded information and output, and is superimposed on 4-bit video data to 5 bits to be input to FF3.

The video data of 5 bits is as shown in FIG. 3 (B) if it is not in the unique word area. In FIG. 3, X indicates coded video data and A indicates audio data.

32-bit audio data sampled at the frequency of f _a is inserted bit by bit at the frequency of f _v / L. This cycle is synchronized with the cycle of transmission timing f _v / L of the unique word area. One bit of the audio bit is always inserted in the position shown in FIG. 3 (A) in the unique word area, and at this time, as shown in FIG. 3 (A), a code P indicating whether or not the audio bit is inserted. (Insert with 1,
(0 is not inserted) other than audio bit position information in FIG. 2 (D)
C ₅ -C ₁ also inserted, input to FF3.

The signals input to the FF3 are input to the selector 4, respectively.

Based on the count value from the video counter shown in FIG. 2 (E), a signal corresponding to the width of the unique word area shown in FIG. 5 (C) is output from the ROM 2 to the FF 10 shown in FIG.

In FIG. 4, the video signal is input to the clamper 6 to extract the horizontal synchronizing signal shown in FIGS.
It is input to F7, the output of FF7 is input to FF8 and also to the NAND circuit 12, and the inverted output of FF8 is input to the NAND circuit 12.

The FF 10 has a clock obtained by inverting the clock shown in FIG. 5B by the knot circuit 9 and the ROM 2 as described above.
The signal corresponding to the width of the unique word area shown in FIG.

As a result, the output of the FF 10 outputs a signal corresponding to the unique word area width at the timing of the falling edge of the clock as shown in FIG. 5 (D).

The clock and the output signal of the FF 10 are input to the AND circuit 11, and a pulse having the same phase as the clock and the width of the unique word area is obtained from the output as shown in FIGS. 5E and 5E. . This pulse is input to the FFs 7 and 8 as a clock. With this clock, FF7,
8, NAND circuit 12 of the differentiation circuit including NAND circuit 12
As shown in FIGS. 5 (F) and (f), a reset signal indicating the transmission timing of the unique word area is obtained at the output of FF and input to the FF1 in FIG.

This reset signal is for providing a unique word area in the horizontal sync signal even if the cycle of the horizontal sync signal changes as shown in FIG. 5 (a). Is an integer multiple of the unique word width (6), but the cycle is not always constant.

The reset signal as shown in FIG. 2C input to FF1 in FIG. 1 is input to the selector 4.

The selector 4 normally selects the video data side (a terminal input), and selects the unique word area information side (b terminal input) when the reset signal is input. Then, the video data and audio data as shown in FIG. 6 are sent to the parallel-serial conversion circuit 5 as multiplexed data, and are sent to the transmission line as a serial signal.

Note that the f _v / L clock of the cycle for inserting the audio data and the horizontal sync signal are asynchronous, so that the width of L is set to the base part of the horizontal sync signal so that the unique word area always enters the base part of the horizontal sync signal. When the number of samples in is set to i, it is set to be smaller than i / 2.

When indicating the data of the unique word area serial data sequence, XXXX100000000001XXC _5, C ₄ XX
C ₃ , C ₂ , C ₁ XXXP, A and 1000,000,000
Reference numeral 01 is a data pattern (X may be either 1 or 0) that is not in the bit sequence of the video data, and after this unique word area, the video data is transmitted in order from the first bit of the digitized data. .

Therefore, if 1000000001 of the unique word can be detected on the receiving side, the serialized video data can be converted into the original word unit data by using this as a synchronization signal.

Also there multiplexing timing of the audio data as the period of f _{v /} L, the transmission timing of the unique word area f _v /
Since the audio data is inserted into the unique word area and the audio bit position information is also inserted because it is synchronized with the cycle of L, the serial audio data is based on the audio bit position information and the original word is used as the original word. Can be converted to data.

That is, the audio data and the video data asynchronous with the audio data can be multiplexed and transmitted without using the buffer memory, and the circuit scale of the multiplex transmission device can be reduced.

〔The invention's effect〕

As described above, according to the present invention, it is possible to multiplex and transmit audio data and asynchronous video data without using a buffer memory, and it is possible to reduce the circuit scale of the multiplex transmission device. is there.

[Brief description of drawings]

FIG. 1 is a block diagram of a main part of a multiplex transmission apparatus according to an embodiment of the present invention, FIG. 2 is a time chart showing the input information of FIG. 1, and FIG. 3 is an input to the flip-flop 3 of FIG. Figure showing information, Figure 4 is a block diagram of a circuit that determines the transmission timing of the unique word area, Figure 5 is a time chart of the waveform of each part of Figure 4, and Figure 6 is an output of the selector 4 of Figure 1. FIG. 7 is a diagram showing multiplexed data, FIG. 7 is a diagram showing the contents of a unique word area when only a video signal is transmitted, and FIG. 8 is a block diagram of a conventional multiplex transmission device. In the figure, 1, 3, 7, 8 and 10 are flip-flops, 2 is a ROM, 4 is a selector, 5, 22 and 25 are parallel-serial conversion circuits, 6 is a clamper, 9 is a knot circuit, 11 is an AND circuit, 12 Is a NAND circuit, 20 and 24 are digitizing circuits, 21 is a buffer memory, 23 is a switching circuit, 26 is a unique word generating circuit, 27 is a M frequency dividing circuit, 28 is an M / N _v frequency dividing circuit, and 29 is a switching control. The circuit is shown.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiyuki Horiuchi 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Kiichi Matsuda 1015, Kamikodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited ( 72) Inventor Toshitaka Tsuda 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited

Claims (1)

[Claims] 1. A multiplexing transmission system in which a part of a horizontal synchronizing signal of a digital video signal is replaced with a unique word area in which a unique word is inserted, and the digital video signal and digital audio signal are multiplexed and transmitted as a serial signal. , The sampling frequency of the video signal is f _v , the number of bits of one word is N _v, and the number of bits of the unique word area is L _v
× N _v , L is equal to or less than ½ of the number of samples of the video signal at the base of the horizontal synchronization signal, and the transmission timing of the unique word area is divided by the L in the sampling frequency f _v of the video signal. When the horizontal synchronizing signal is punched out with a clock of f _v / L, the sampling frequency f _a of the audio signal is set to the sampling frequency f _v
And f _v / (L · n _a ) divided by the product of the number n _a of bits of one word of the digital audio signal, and a digital signal sampled at the sampling period of the audio signal of the frequency f _a to be a serial signal When each 1 bit of an audio signal is multiplexed by inserting the digital video signal into a portion where the number of bits of 1 word is reduced by 1 bit for each L sample, and the 1 bit is inserted in the unique word area. Is a transmission method in which voice bit position information indicating the bit number of one word of voice data is also transmitted in the unique word area.