JPH063515B2 - Optical D flip-flop circuit - Google Patents

Description

The present invention relates to an optical digital logic circuit used in an optical communication system, an optical information processing system, an optical switching system, an optical computer, and the like.

<Prior Art> With the recent development of optical fiber technology and optical semiconductor technology, a long-distance optical communication system for the purpose of backbone transmission and an optical LAN system for highly efficiently connecting distributed processing devices have been put into practical use.

In these systems, the optical technology is mainly used as a connecting means between the functional devices, and the function is largely owed to the electronic circuit technology centered on the LSI.

Reflecting the advent of the advanced information society in the near future, as the diversification of information to be processed and the increase in capacity have been further advanced, ultra-high processing speed and complicated processing have been required. To meet these demands, it has become necessary to use optical technology not only as a connection means but also as a logic processing means. In other words, the transmitted optical digital signal can be processed as it is, by digital processing, and the processing result can be output as light, which can be transmitted to other devices. High-speed, wide-bandwidth, non-induction of light, etc. An optical processing device (optical information processing system, optical switching system, etc.) that makes full use of the characteristics of is essential.

To realize this type of device, an optical logic function block similar to that used in a general electric logic circuit, for example, an optical gate (INVERTOR, OR, AND, EXOR, etc.), an optical slip flop circuit, an optical shift register circuit , Optical counters etc. must be configured.

Conventionally, none of these optical logic function blocks has been practically used.

<Object of the Invention> In view of the above, the present invention is to provide a small-sized and practical optical D flip-flop circuit suitable for integration.

<Structure of the Invention> An optical D flip-flop circuit of the present invention comprises an optical switch having a first input end, a second input end, and an output end, and an optical bistable element having an optical output from the output end as an optical input. Is the first
In the first state of the optical switch obtained corresponding to the first state of the clock, the optical digital data is input to the input end, the bias light having the DC amplitude value is input to the second input end, and
In the second state of the optical switch obtained by outputting the bias light from the output end, biasing the optical bistable element to any one stable point, and obtaining the second state of the clock, When the optical digital data is in the logical "1" state, a positive optical pulse having an amplitude value more positive than the DC amplitude value is output from the output end, and the optical bistable element is set by the positive optical pulse. When the optical digital data is in the logic "0" state, a negative optical pulse having a negative amplitude value than the direct current amplitude value is output from the output end, and the negative optical pulse resets the optical bistable element. By driving the digital data, the digital data can be input and an optical output signal synchronized with the clock can be obtained.

<Example> Next, the present invention will be described in detail with reference to the drawings. FIG. 1 shows an optical D flip-flop circuit according to a first embodiment of the present invention, which is constructed by connecting a directional coupler type optical switch 8 and an optical bistable element 9 in cascade.

The directional coupler type optical switch 8 is composed of a substrate (LiNbO ₃ , G
aAs, InP, etc.) and control electrodes 5 and 6. By applying a voltage signal to the control electrodes 5 and 6, two states can be created in the switch 8. That is, a state in which the optical signal from the input end 1 is conducted to the output end 4 and the optical signal from the input end 2 is conducted to the output end 3 (this is called a bar state) and the optical signal from the input end 1 is conducted to the output end 4. 3 and the optical signal from the input end 2 to the output end 4
It is a state of conducting to (this is called a cross state). The optical bistable element 9 has an optical output Pout as shown in FIG.
There shows a history with respect to the change of the optical input Pin, in a range of input intensity (range of the threshold Pth ₁ and the threshold value Pth _2), it is intended to take two stable output intensity _{P H} and _{P L.}

As an example of an element having such an optical bistable characteristic, an optical bistable semiconductor laser shown in FIG. 6 has been announced (National Conference of the Institute of Electronics and Communication Engineers, No. 937 (1983)). The optical bistable semiconductor laser has two split P-side electrodes 31, 32 electrically insulated by a slit 33 provided in parallel with the Fabry-Perot resonator surfaces 37, 38. Each electrode 31,
Appropriate bias currents I ₁ and I ₂ to 32 can give the optical bistable characteristic as shown in FIG. 4 to the relationship between the optical input Pin and the optical output Pout.

Now, the logical operation of the optical D flip-flop circuit of the present invention will be described with reference to FIG. The optical digital data L _D is input to the input end 1 and the bias light L _B is input to the input end 2. The optical amplitude value of the optical digital data L _D is zero in the logic “0” state and P _{D in the} logic “1” state, as shown in FIG.
Is.

On the other hand, as shown in FIG. 5, the bias light L _S is a DC light whose light amplitude value has a DC amplitude value P _B. Returning to FIG. 1, the electric clock E _C is applied to the electrodes 5 and 6 to control the optical switch 8. When the electric clock E _C is in the logic "1" state, the optical switch 8 is set in the cross state, and in the logic "0" state, the bar state is set. Here, in the cross state, the optical switch 8 has a coupling degree α (≦ 1).
Is designed to be. Therefore, the electric clock E
According to the logic state of _C , the optical output signal L _SW to the output terminal 3 of the optical switch 8 is obtained as follows. When the electric clock E _C is in the logic “0” state, the optical switch 8 is in the bar state, so the optical output signal L _SW becomes the bias light L _B itself, and its optical amplitude value becomes P _B. On the other hand, when the electric clock E _C is in the logic “1” state, the optical switch 8 is in the cross state, so that the optical digital data L _D can obtain the optical output signal L _SW depending on the logic state. That is, when the optical digital data L _D is in the logic “1” state, a part αP _B of the optical amplitude value P _B of the bias light L _B is coupled to the output end 4, and the optical amplitude value of the optical digital data L _D is Part of P _D α
Since P _D is coupled to the output end 3, the optical output signal L _{SW has} an optical amplitude value of P _B −αP _B + αP _D. On the other hand, when the optical digital data L _D is a logic "0" state, the light amplitude of the optical digital data L _D is zero, coupling from the optical digital data L _D to the output terminal 3 is no, bias light L Only a part αP _B of the light amplitude value P _B of _B is coupled to the output 4. Therefore, the optical amplitude value P _B −α of the optical output signal L _SW
The P _3.

The above relationship between the truth value and the light amplitude value is summarized in FIG. When the coupling degree α and the optical amplitude value P _D are selected so that the optical amplitude value P _B −αP _B + αP _D is larger than the DC amplitude value P _B , the optical output signal L _SW is as shown in FIG. , A baseline _B having a DC amplitude value P _B and a light amplitude value P _B −αP _B + α
A positive pulse P having P _D and a negative pulse N having a light amplitude value P _B −αP _B are obtained.

After all, in the optical output signal L _SW , when the electric clock E _C is in the logic “0” state, the baseline B is generated, the electric clock E _C is in the logic “1” state, and the optical digital data L
_{When D} is in the logic "1" state, the positive pulse P is generated,
Then, when the electric clock E _C is in the logic “1” state and the optical digital data L _D is in the logic “0” state, the negative pulse N is generated.

Next, returning to FIG. 1, the optical output signal L _SW is input to the optical bistable element 9. The characteristic of the optical bistable element 9 and the optical amplitude value of the optical output signal L _SW are as shown in FIG. Satisfies the optical bistable device 9 is set to a high value in the positive pulse P, is reset to a low value P _L in the negative pulse N, and baseline B (bias light L _B), the stable point Q ₁ or Q _It is biased to either of _two and held at a low value P _L or a high value P _H. As a result, output light digital data L _O is obtained as shown in FIG. Eventually, the output light digital data _{L O,} as FIG. 5, when the rising of the optical digital data _{L D} is electric clock _{E C C r1, C r2,}
An optical signal synchronized with ... Is obtained. Therefore, the optical D flip-flop operation is realized by the circuit of FIG.

Next, a second embodiment will be described.

FIG. 2 shows an optical D flip-flop circuit according to a second embodiment of the present invention, which has the same structure as that of the first embodiment except that a crossed waveguide type optical switch 8'is used as an optical switch. Same as the example. The crossed waveguide type optical switch 8'is composed of a crossed waveguide 10 formed on a substrate (LiNbO ₃ , GaAs, InP, etc.) and control electrodes 5, 6. When the electric clock E _C applied to the control electrodes 5 and 6 is in the logic “0” state, the optical digital data L _D at the input end 1 goes to the output end 4, and the bias light L _B at the input end 2 goes to the output end 3. Connected to. Therefore, the light output signal L _SW becomes the bias light L _B itself. On the other hand, when the electric clock E _C applied to the control electrodes 5 and 6 is in the logic “1” state, the control electrodes 5 and 6 are controlled.
The refractive index of the waveguide between them becomes small, a part αP _B of the optical amplitude value P _B of the bias light L _B is coupled to the output end 4, and the remaining optical amplitude value P _B −αP _B is output to the output end 3. To be done. More output end 3, the light in the digital data L _D is a logic "1" state, a part .alpha.P _D of the light amplitude value P _D is output, the light in the digital data L _D is a logic "0" state,如also No output. Here, the degree of coupling of the optical switch 8'is designed to be α (≤1).

As described above, similarly to the first embodiment, the optical output signal L _SW having the positive pulse P and the negative pulse N with the baseline B as an intermediate value is obtained. By inputting the optical output signal L _SW to the optical bistable element 9, it is possible to obtain output optical digital data L _{O in} which the optical digital data L _D is synchronized with the electric clock E _C.

Therefore, it became clear that FIG. 2 can operate as an optical D flip-flop.

Above, in the description of the first embodiment and the second embodiment,
Although the optical switch and the optical bistable element are handled as separate parts, it is obvious that a compact and economical optical D flip-flop circuit can be realized by integrating these functions on one substrate. That is, in this case, the optical switch may be formed of a semiconductor material on the same substrate as the semiconductor laser that is the optical bistable element. Further, in the above description, the directional coupling type optical switch and the crossed waveguide type optical switch are used as the optical switch, and the optical bistable semiconductor laser is used as the optical bistable element, but the invention is not limited thereto. It is also obvious that the optical D flip-flop of the present invention can be realized as long as it satisfies the functions described above.

<Effects of the Invention> As described above, a small-sized and practical optical D flip-flop circuit suitable for integration has been realized by using the optical switch and the optical bistable element, and thus has been transmitted. Optical digital data can be processed digitally as light,
It makes a great contribution to the construction of optical information processing systems, optical switching systems, and optical computers.

[Brief description of drawings]

FIG. 1 is an optical D flip-flop circuit diagram of the first embodiment of the present invention, FIG. 2 is an optical D flip-flop circuit diagram of the second embodiment of the present invention, and FIG. 3 is a truth table of an optical switch. , 4th
FIG. 6 is a diagram _showing the relationship between the characteristics of the optical bistable element and the optical input signal L _SW and output optical digital data L _O to the optical bistable element. FIG. 5 is a logical waveform diagram of each part of the optical D flip-flop circuit of the present invention. FIG. 3 is a schematic diagram of an optical bistable semiconductor laser. L _D ... Optical digital data, L _S ... Bias light (baseline B), E _C ... Electric clock, P _D ... Optical amplitude value of logic “1” state of optical digital data, P _B ... DC amplitude value of bias light , L _SW ... Optical output signal of optical switch, L _O ... Output optical digital data, 8 ... Optical switch, 9 ... Optical bistable element.

Claims (1)

[Claims] 1. An optical switch having a first input end, a second input end, and an output end, and an optical bistable element that receives the output light from the output end as an optical input, and the first input end is connected to the optical switch. Optical digital data is input, bias light having a DC amplitude value is input to the second input end, and in the first state of the optical switch obtained corresponding to the first state of the clock, from the output end In the second state of the optical switch obtained by outputting the bias light, biasing the optical bistable element to any one stable point, and obtaining the optical digital data in the second state of the clock. Is a logic "1" state, a positive optical pulse having a positive amplitude value from the direct current amplitude value is output from the output end, the optical bistable element is set by the positive optical pulse, and the optical digital data is output. Is a logic “0” state, a negative optical pulse having a negative amplitude value from the DC amplitude value is generated. An optical D flip-flop which is output from an output terminal, and is driven so as to reset the optical bistable element by the negative optical pulse to input the digital data to obtain an optical output signal synchronized with a clock. Circuit.