JPH0644675B2 - Method for manufacturing multilayer wiring board - Google Patents
Method for manufacturing multilayer wiring boardInfo
- Publication number
- JPH0644675B2 JPH0644675B2 JP1128335A JP12833589A JPH0644675B2 JP H0644675 B2 JPH0644675 B2 JP H0644675B2 JP 1128335 A JP1128335 A JP 1128335A JP 12833589 A JP12833589 A JP 12833589A JP H0644675 B2 JPH0644675 B2 JP H0644675B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- circuit
- copper
- multilayer wiring
- layer material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 238000000034 method Methods 0.000 title claims description 14
- 239000000463 material Substances 0.000 claims description 28
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 26
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 23
- 239000010949 copper Substances 0.000 claims description 18
- 239000000843 powder Substances 0.000 claims description 16
- 239000005751 Copper oxide Substances 0.000 claims description 14
- 229910000431 copper oxide Inorganic materials 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 239000000956 alloy Substances 0.000 claims description 13
- 229910045601 alloy Inorganic materials 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- 239000002612 dispersion medium Substances 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- 239000003792 electrolyte Substances 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 238000007788 roughening Methods 0.000 claims description 2
- 239000006185 dispersion Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 45
- 238000011282 treatment Methods 0.000 description 18
- 125000001475 halogen functional group Chemical group 0.000 description 15
- 239000011889 copper foil Substances 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 8
- 230000003647 oxidation Effects 0.000 description 8
- 238000007254 oxidation reaction Methods 0.000 description 8
- 239000011701 zinc Substances 0.000 description 8
- 239000004744 fabric Substances 0.000 description 7
- 239000011521 glass Substances 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- ACVYVLVWPXVTIT-UHFFFAOYSA-N phosphinic acid Chemical compound O[PH2]=O ACVYVLVWPXVTIT-UHFFFAOYSA-N 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000004931 aggregating effect Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- -1 aminoborane compound Chemical class 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- UKLNMMHNWFDKNT-UHFFFAOYSA-M sodium chlorite Chemical compound [Na+].[O-]Cl=O UKLNMMHNWFDKNT-UHFFFAOYSA-M 0.000 description 1
- 229960002218 sodium chlorite Drugs 0.000 description 1
- SUKJFIGYRHOWBL-UHFFFAOYSA-N sodium hypochlorite Chemical compound [Na+].Cl[O-] SUKJFIGYRHOWBL-UHFFFAOYSA-N 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 229920006305 unsaturated polyester Polymers 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 （産業上の利用分野） この発明は、多層配線基板の製造方法に関するものであ
る。さらに詳しくは、この発明は、内層材とプリプレグ
層との接着力を向上させ、ファイン回路を有する配線板
の信頼性を向上させることのできる、新しい多層配線基
板の製造方法に関するものである。The present invention relates to a method for manufacturing a multilayer wiring board. More specifically, the present invention relates to a method for manufacturing a new multilayer wiring board, which can improve the adhesive force between an inner layer material and a prepreg layer and improve the reliability of a wiring board having a fine circuit.
（従来の技術） 電気・電子機器、電子計算機、通信機器等に用いられて
いるプリント配線板については、近年の高密度実装の要
望の高まりとともに多層配線板への需要が増大し、これ
にともなって多層配線板板の信頼性向上のための種々の
工夫がなされてきている。(Prior Art) Regarding printed wiring boards used in electric / electronic devices, electronic calculators, communication devices, etc., the demand for multilayer wiring boards has increased along with the increasing demand for high-density packaging in recent years. Various efforts have been made to improve the reliability of multilayer wiring board boards.
従来、このような多層構造を有するプリント配線板につ
いては、たとえば第２図に示したように、片面又は両面
銅張積層板の銅箔面に回路（ア）を形成したものを内層
材（イ）とし、この内層材（イ）の表面をサンダー、ベ
ルトサンダー等によって物理的に粗化し、あるいはこの
粗化後にアルカリ性亜塩素酸ナトリウム水溶液等で処理
して銅箔回路（ア）の表面に黒色酸化銅皮膜を形成する
黒化処理してから、プリプレグ層（ウ）を介して片面銅
張積層板や銅箔（エ）を外層材として配設して一体化成
形することにより製造してきている。Conventionally, as for a printed wiring board having such a multilayer structure, for example, as shown in FIG. 2, an inner layer material (a) having a circuit (a) formed on a copper foil surface of a single-sided or double-sided copper clad laminate is used. ), The surface of the inner layer material (a) is physically roughened by a sander, a belt sander, or the like, or after this roughening, the surface of the copper foil circuit (a) is blackened by treatment with an alkaline sodium chlorite aqueous solution or the like. After the blackening treatment to form a copper oxide film, a single-sided copper-clad laminate or copper foil (d) is placed as an outer layer material via a prepreg layer (c) and integrally molded .
（発明が解決しようとする課題） このような従来の製造方法は、これまでのパターン密度
の回路においては信頼性を一応は確保できるものの、近
年の回路密度が著しく増大したファインパターン回路に
おいては、内層材（イ）とプリプレグ層（ウ）との間の
層間接着力を確保することが難しくなってきている。こ
れは、プリント配線板における内層材（イ）表面の従来
の回路面積に比べて、ファインパターン回路の場合には
その回路（ア）の占める面積が著しく大きくなっている
ためで、内層材（イ）の樹脂層とプリプレグ層（ウ）と
の接触面積は減少しており、たとえ銅箔回路（ア）を従
来のように表面処理したとしてもこの接触面での層間接
着性の低下は避けられない。(Problems to be Solved by the Invention) Such a conventional manufacturing method can temporarily secure reliability in a circuit having a pattern density up to now, but in a fine pattern circuit in which the circuit density has increased remarkably in recent years, It has become difficult to secure an interlayer adhesive force between the inner layer material (a) and the prepreg layer (c). This is because in the case of a fine pattern circuit, the area occupied by the circuit (a) is significantly larger than the conventional circuit area on the surface of the inner layer material (a) in the printed wiring board. ) The contact area between the resin layer and the prepreg layer (c) is decreasing, and even if the copper foil circuit (a) is surface-treated as in the conventional case, deterioration of interlayer adhesion on this contact surface can be avoided. Absent.
このため、従来の製造方法によっては層間接着力が低下
し、ハローの発生の配線板の信頼性の低下が避けられな
かった。For this reason, the interlayer adhesion strength is lowered by the conventional manufacturing method, and the reduction in reliability of the wiring board due to the halo is unavoidable.
このような課題を解決するものとして、内層材（イ）の
表面を黒化処理した後に還元する方法が提案されている
が、この方法は、特殊なアミノボラン化合物を使用する
ことが必要であり、その効果も必ずしも満足できるもの
ではなかった。As a solution to such a problem, a method of reducing the surface of the inner layer material (a) after blackening is proposed, but this method requires the use of a special aminoborane compound, The effect was not always satisfactory.
この発明は、以上の通りの事情に鑑みてなされたもので
あり、従来の多層配線板の製造方法の欠点を改善し、フ
ァインパターン回路、すなわち内層材表面の回路面積が
大きくなっても層間接着性が良好であって、耐ハロー性
に優れ、信頼性も向上した多層配線基板を製造すること
のできる新しい製造方法を提供することを目的としてい
る。The present invention has been made in view of the circumstances as described above, improves the drawbacks of the conventional method for manufacturing a multilayer wiring board, and enables fine pattern circuits, that is, interlayer adhesion even when the circuit area of the inner layer material surface is large. It is an object of the present invention to provide a new manufacturing method capable of manufacturing a multilayer wiring board having good properties, excellent halo resistance, and improved reliability.
（課題を解決するための手段） この発明は、上記の課題を解決するものとして、内層回
路板の銅回路表面を酸化処理して形成した銅酸化物層
を、ＣｕＯよりも酸化還元電位の低い金属又はその合金
の粉末と、これらの金属又は合金粉末が分散された水分
散媒中において接触処理して粗面化し、次いでプリプレ
グを介在させて外層材を積層一体化成形することを特徴
とする多層配線基板の製造方法を提供する。(Means for Solving the Problems) In order to solve the above problems, the present invention provides a copper oxide layer formed by oxidizing a copper circuit surface of an inner layer circuit board with a redox potential lower than that of CuO. It is characterized in that the powder of a metal or its alloy is subjected to contact treatment in an aqueous dispersion medium in which these metal or alloy powders are dispersed to roughen the surface, and then an outer layer material is integrally laminated by interposing a prepreg. A method for manufacturing a multilayer wiring board is provided.
この発明においてＣｕＯよりも酸化還元電位の低い金属
としては、ＣｕＯの0.6Ｖよりも低い、たとえばＺｎ
（亜鉛），Ａｌ（アルミニウム），Ｓｎ（錫）などの金
属、もしくはそれらの合金類を用いることができ、これ
らの金属又は合金粉末を分散させた水分散媒を使用す
る。この場合、金属又は合金粉末は、その水分散媒中に
おいて沈降させ、この分散媒に浸漬された内層材の銅回
路表面に酸化処理により形成したＣｕＯ，Ｃｕ２Ｏの銅
酸化物層と接触させる。この金属又は合金と銅酸化物と
の接触により、銅酸化物はより酸化レベルの低い状態と
なり、内層材表面の銅回路表面は粗面化される。プリプ
レグとの接着力が一段と向上する。In the present invention, the metal having a lower redox potential than CuO is lower than 0.6V of CuO, for example, Zn.
A metal such as (zinc), Al (aluminum), Sn (tin), or an alloy thereof can be used, and an aqueous dispersion medium in which these metal or alloy powder is dispersed is used. In this case, the metal or alloy powder is allowed to settle in the aqueous dispersion medium and brought into contact with the copper oxide layer of CuO, Cu 2 O formed by the oxidation treatment on the copper circuit surface of the inner layer material immersed in this dispersion medium. . The contact between the metal or alloy and the copper oxide causes the copper oxide to have a lower oxidation level, so that the copper circuit surface on the inner layer material surface is roughened. The adhesive strength with the prepreg is further improved.
処理浴は、上記の通りの水分散媒とする。なお、この水
分散媒には、電気電導度を付与するために、電解質を若
干添加することも可能である。The treatment bath is an aqueous dispersion medium as described above. It is possible to add a small amount of electrolyte to the aqueous dispersion medium in order to impart electric conductivity.
添付した図面の第１図に沿って、この発明の多層配線基
板の製造方法について説明する。A method for manufacturing a multilayer wiring board according to the present invention will be described with reference to FIG. 1 of the accompanying drawings.
(a)プリプレグ及び銅箔等から成形された片面又は両面
に銅回路（１）を有する内層材（２）の銅回路（１）表
面を酸化処理し、ＣｕＯ，Ｃｕ２Ｏの銅酸化物層（３）
を形成する。(a) The copper circuit (1) surface of the inner layer material (2) having the copper circuit (1) on one or both sides formed from prepreg, copper foil, etc. is oxidized to form a copper oxide layer of CuO, Cu 2 O. (3)
To form.
この時の内層材（２）を形成するプリプレグには特にそ
の種類に限定はなく、ガラスクロス、紙等の基材にフェ
ノール、エポキシ、ポリイミド、不飽和ポリエステル等
の樹脂を含浸させたものを適宜使用することができる。The type of prepreg for forming the inner layer material (2) at this time is not particularly limited, and a material such as a glass cloth or paper substrate impregnated with a resin such as phenol, epoxy, polyimide or unsaturated polyester is appropriately used. Can be used.
これらのプリプレグは、たとえば１〜３枚の適宜な枚数
を用いることができる。For these prepregs, for example, an appropriate number of 1 to 3 can be used.
銅回路（１）の酸化は、これまでに知られているたとえ
ば黒化処理等の方法によって行うことができる。この時
の処理に応じて、ＣｕＯ又Ｃｕ２Ｏもしくはその共存の
状態の銅酸化物層（３）が形成される。Oxidation of the copper circuit (1) can be performed by a conventionally known method such as blackening treatment. Depending on the treatment at this time, the copper oxide layer (3) in the state of CuO or Cu 2 O or the coexistence thereof is formed.
次いで、ＣｕＯよりも酸化還元電位の低い、たとえばＺ
ｎ，Ａｌ，Ｓｎなどの金属、もしくはそれらの合金類の
粉末を分散させた水分散媒を用いて、この銅酸化物層
（３）の酸化レベルをより低い状態とする。つまり、処
理浴中において、浸漬した内層材の銅回路（１）の銅酸
化物層（３）表面に上記の金属又は合金粉末を沈降さ
せ、銅酸化物層（３）に接触させる。これにより酸化レ
ベルはより低いものとなり、その表面は粗面化される。Next, a redox potential lower than that of CuO, for example, Z
The oxidation level of this copper oxide layer (3) is made lower by using a water dispersion medium in which powders of metals such as n, Al, Sn or alloys thereof are dispersed. That is, in the treatment bath, the above metal or alloy powder is allowed to settle on the surface of the copper oxide layer (3) of the copper circuit (1) of the inner layer material that has been dipped, and brought into contact with the copper oxide layer (3). This results in a lower oxidation level and the surface is roughened.
処理時間、温度等は、採用する処理系に応じて適宜とす
ればよい。The treatment time, temperature and the like may be appropriately set according to the treatment system adopted.
(b)次いで、得られた表面に、所望枚数のプリプレグ
（４）と外層材（５）とを配設して積層一体化する。(b) Next, a desired number of prepregs (4) and the outer layer material (5) are arranged on the obtained surface to be laminated and integrated.
プリプレグ（４）は、たとえば１〜３枚程度配設するの
が好ましい。プリプレグ（４）としては、内層材（２）
の場合と同様にガラスクロス、アラミドクロス、ポリエ
ステルクロスなどのクロスやマット状物、あるいは不織
布や紙などの基材にエポキシ樹脂、フェノール樹脂、ポ
リイミド樹脂などの樹脂を含浸させたものを用いること
ができる。中でもガラスクロスエポキシ樹脂プリプレグ
は好適なものとして例示される。また、外層材（５）と
しては、銅箔や、あるいはプリプレグと銅箔とから片面
銅張積層体としたものなどを用いることができる。It is preferable to arrange, for example, about 1 to 3 prepregs (4). As the prepreg (4), the inner layer material (2)
As in the case of, it is possible to use cloth or mat-like material such as glass cloth, aramid cloth, polyester cloth, or a material such as nonwoven fabric or paper impregnated with a resin such as epoxy resin, phenol resin, or polyimide resin. it can. Among them, the glass cloth epoxy resin prepreg is exemplified as a suitable one. Further, as the outer layer material (5), a copper foil, or a one-sided copper-clad laminate of a prepreg and a copper foil can be used.
積層一体化成形は、多段プレス、スチロール、ダブルベ
ルト、無圧連続加熱等の従来公知の方法や条件に沿って
適宜に実施することができる。この成形によって一体化
した積層板の最外層銅箔に回路形成することにより多層
回路板が製造される。The laminated integral molding can be appropriately carried out according to conventionally known methods and conditions such as multi-stage pressing, styrene, double belt, and pressureless continuous heating. A multilayer circuit board is manufactured by forming a circuit on the outermost copper foil of the laminated board integrated by this molding.
もちろん、以上の製造上の条件等の細部については、公
知のものを含めて様々な態様が可能であることは言うま
でもない。Needless to say, the details of the above manufacturing conditions and the like can be variously modified, including known ones.
（作用） この発明においては、内層材の銅回路表面の酸化処理
と、ＣｕＯよりも酸化還元電位の低い金属又はその合金
粉末を分散させた水分散媒中での金属又は合金粉末と銅
酸化物層との接触による酸化レベルの低次化処理とによ
り銅回路表面を粗化するため、内層材とプリプレグ層と
の層間接着力が大きく向上し、優れた耐ハロー性が実現
する。(Operation) In the present invention, the oxidation treatment of the copper circuit surface of the inner layer material and the metal or alloy powder and the copper oxide in the water dispersion medium in which the metal or its alloy powder having a redox potential lower than that of CuO is dispersed Since the copper circuit surface is roughened by lowering the oxidation level due to contact with the layer, the interlayer adhesion between the inner layer material and the prepreg layer is greatly improved and excellent halo resistance is realized.
以下、実施例を示し、さらに詳しくこの発明の多層板の
製造方法について説明する。Examples will be shown below to describe the method for producing a multilayer board of the present invention in more detail.
（実施例） 実施例１ 厚さ１mmの両面銅張ガラスエポキシ樹脂積層板の両面に
回路形成し、これを内層材とした。(Example) Example 1 A circuit was formed on both sides of a double-sided copper-clad glass epoxy resin laminate having a thickness of 1 mm, and this was used as an inner layer material.
水洗後に、ＮａＣｌＯ４，ＮａＯＨ及びＮａ２ＰＯ４・
２Ｈ２Ｏの水溶液で処理して、回路表面にＣｕＯ層を形
成した。After washing with water, NaClO 4 , NaOH and Na 2 PO 4
It was treated with an aqueous solution of 2H 2 O to form a CuO layer on the circuit surface.
その後、Ｚｎ粉末（試薬１級）２０ｇを水１に分散さ
せた処理浴中に内層材回路板を浸漬し、Ｚｎを沈降さ
せ、銅回路表面に接触させて還元した。Then, the inner layer material circuit board was dipped in a treatment bath in which 20 g of Zn powder (first-grade reagent) was dispersed in water 1 to precipitate Zn and bring it into contact with the surface of the copper circuit for reduction.
常温で３分間処理した後に引き上げて水洗した。After being treated at room temperature for 3 minutes, it was pulled up and washed with water.
なお、水洗によってもこのＺｎ等の金属又は合金粉末を
除去できない場合には、１：９ＨＣｌ水溶液に１０秒程
度浸漬するのが有効である。If the metal or alloy powder such as Zn cannot be removed even by washing with water, it is effective to immerse the powder in a 1: 9 HCl aqueous solution for about 10 seconds.
乾燥後、厚さ0.1mmのガラスクロスエポキシ樹脂プリプ
レグを内層材の上下両面に各々２枚ずつ配設し、さらに
最外層に厚さ0.035mmの銅箔を配設した。After drying, two 0.1 mm thick glass cloth epoxy resin prepregs were provided on each of the upper and lower surfaces of the inner layer material, and a 0.035 mm thick copper foil was provided as the outermost layer.
この積層体を４０kg／cm2の圧力、165℃の温度で６０分
間積層成形し、４層回路プリント配線基板を得た。This laminate was laminated and molded at a pressure of 40 kg / cm 2 and a temperature of 165 ° C. for 60 minutes to obtain a four-layer circuit printed wiring board.
この配線板について層間接着性と耐ハロー性を評価した
ところ、表１に示した結果を得た。後述の比較例との対
比から、層間接着力が向上し、耐ハロー性は著しく改善
されていることが確認された。When the interlayer adhesion and the halo resistance of this wiring board were evaluated, the results shown in Table 1 were obtained. From the comparison with Comparative Examples described later, it was confirmed that the interlayer adhesive force was improved and the halo resistance was remarkably improved.
なお、耐ハロー性については、１：１ＨＣｌ溶液３０分
浸漬により評価した。The halo resistance was evaluated by immersion in a 1: 1 HCl solution for 30 minutes.
実施例２ 回路表面にＣｕ２Ｏ層を形成した他は、実施例１と同様
にして配線板を製造し、耐ハロー性を評価した。その結
果を表１に示した。Example 2 A wiring board was manufactured in the same manner as in Example 1 except that a Cu 2 O layer was formed on the circuit surface, and the halo resistance was evaluated. The results are shown in Table 1.
優れた耐ハロー性が得られた。Excellent halo resistance was obtained.
実施例３〜４ Ｚｎ粉末をＡｌ粉末に代え、実施例１及び実施例２と同
様にして配線板を製造し、耐ハロー性について評価し
た。Examples 3 to 4 Wiring boards were manufactured in the same manner as in Example 1 and Example 2 except that Zn powder was replaced with Al powder, and halo resistance was evaluated.
いずれの場合も耐ハロー性は良好であった。In each case, the halo resistance was good.
実施例５ 処理浴に次亜リン酸１０ｍと界面活性剤１ｍを加え
電気導電度を向上させて、この処理浴に１分間浸漬する
ことで実施例１と同様にして配線板を製造した。Example 5 A wiring board was manufactured in the same manner as in Example 1 except that 10 m of hypophosphorous acid and 1 m of a surfactant were added to the treatment bath to improve electric conductivity, and the substrate was immersed in this treatment bath for 1 minute.
電気電導度を付与するものとしては次亜リン酸以外にも
種々の電解質を使用できる。この電解質の使用によって
処理効率が上がり、また、銅酸化物表面にＺｎ粉末が堆
積せずにＺｎが部分的に凝集接触するだけでも処理が実
現される。Various electrolytes other than hypophosphorous acid can be used for imparting electric conductivity. The use of this electrolyte improves the treatment efficiency, and the treatment can be realized by only partially aggregating contact of Zn without depositing Zn powder on the copper oxide surface.
得られた配線板について耐ハロー性を評価したところ、
同様に良好であった。When the halo resistance of the obtained wiring board was evaluated,
Similarly good.
実施例６ ＣｕＯをＣｕＯ２Ｏとして実施例５に従って配線板を製
造し、耐ハロー性を評価した。その結果は良好なもので
あった。Example 6 A wiring board was manufactured according to Example 5 using CuO 2 as CuO 2 O, and the halo resistance was evaluated. The results were good.
比較例１ 酸化及び還元処理を行わずに多層配線板を製造した。耐
ハロー性を評価したところ、実施例に比べてはるかに劣
っていた。Comparative Example 1 A multilayer wiring board was manufactured without performing oxidation and reduction treatments. When the halo resistance was evaluated, it was far inferior to the examples.
比較例２ 黒化処理によりＣｕ２Ｏ層を形成し、そのままの状態で
多層板を製造した。耐ハロー性は劣っていた。Comparative Example 2 A Cu 2 O layer was formed by blackening treatment, and a multilayer board was manufactured as it was. The halo resistance was inferior.
〔発明の効果〕 この発明の多層配線基板の製造方法により、以上詳しく
説明した通り、層間接着性及び耐ハロー性を大きく向上
させた多層配線基板が実現される。 [Effects of the Invention] As described in detail above, the method for manufacturing a multilayer wiring board according to the present invention realizes a multilayer wiring board with greatly improved interlayer adhesion and halo resistance.
ファインパターン回路を有する多層配線基板の信頼性を
向上させることができる。It is possible to improve the reliability of a multilayer wiring board having a fine pattern circuit.
第１図は、この発明の多層配線基板の製造方法の製造工
程を例示した工程断面図である。 第２図は、従来の製造方法を示した工程断面図である。 １…銅回路 ２…内層材 ３…銅酸化物層 ４…プリプレグ ５…外層材FIG. 1 is a process cross-sectional view illustrating a manufacturing process of a method for manufacturing a multilayer wiring board according to the present invention. FIG. 2 is a process sectional view showing a conventional manufacturing method. 1 ... Copper circuit 2 ... Inner layer material 3 ... Copper oxide layer 4 ... Prepreg 5 ... Outer layer material
───────────────────────────────────────────────────── フロントページの続き (72)発明者 赤松 資幸 大阪府門真市大字門真1048番地 松下電工 株式会社内 (56)参考文献 特開 昭61−94756（ＪＰ，Ａ) 特開 昭61−140194（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshiyuki Akamatsu 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd. (56) References JP-A-61-94756 (JP, A) JP-A-61-140194 (JP, A)
Claims (2)
成した銅酸化物層を、ＣｕＯよりも酸化還元電位の低い
金属又はその合金の粉末と、これらの金属又は合金粉末
が分散された水分散媒中において接触処理して粗面化
し、次いでプリプレグを介在させて外層材を積層一体化
成形することを特徴とする多層配線基板の製造方法。1. A copper oxide layer formed by oxidizing a copper circuit surface of an inner layer circuit board, a powder of a metal or an alloy thereof having a redox potential lower than that of CuO, and a dispersion of the metal or alloy powder. A method for manufacturing a multilayer wiring board, comprising contact-roughening in an aqueous dispersion medium to roughen the surface, and then integrally forming an outer layer material by interposing a prepreg.
記載の製造方法。2. An electrolyte (1) is added to the water dispersion medium.
The manufacturing method described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1128335A JPH0644675B2 (en) | 1989-05-22 | 1989-05-22 | Method for manufacturing multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1128335A JPH0644675B2 (en) | 1989-05-22 | 1989-05-22 | Method for manufacturing multilayer wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02306695A JPH02306695A (en) | 1990-12-20 |
| JPH0644675B2 true JPH0644675B2 (en) | 1994-06-08 |
Family
ID=14982251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1128335A Expired - Lifetime JPH0644675B2 (en) | 1989-05-22 | 1989-05-22 | Method for manufacturing multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0644675B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6194756A (en) * | 1984-10-17 | 1986-05-13 | 株式会社日立製作所 | Method for manufacturing metal and resin composites |
| JPS61140194A (en) * | 1984-12-12 | 1986-06-27 | 株式会社日立製作所 | Multilayer circuit board and manufacture thereof |
-
1989
- 1989-05-22 JP JP1128335A patent/JPH0644675B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02306695A (en) | 1990-12-20 |
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