JPH0652751B2 - Method for testing semiconductor integrated circuit device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor integrated circuit device, and more particularly to one having a test function.

[Background technology]

Generally, in a semiconductor integrated circuit device, the more highly integrated the internal circuit becomes, and the larger or more complicated the internal circuit becomes, the stronger the necessity of the functional test of the internal circuit becomes. For example, in a large-scale logic LSI, a function for testing all or major functions of its internal logic is required.
When the internal circuit includes a signal holding circuit such as a flip-flop, it is often necessary to have a function of forcibly setting or resetting the signal holding circuit to perform a test.

Therefore, in the conventional semiconductor integrated circuit device of this type,
In addition to the normal function terminals, there were terminals that were provided only for testing. However, in addition to the normal function terminals, providing terminals only for testing causes the area occupied by the terminal pads to become so large that the efficient construction of the semiconductor integrated circuit device is significantly hindered. Moreover,
The necessity of the test function becomes higher as the size and complexity of the semiconductor integrated circuit device increase. However, in the case where such a large scale or highly complicated semiconductor integrated circuit device requires more functional terminals. There are many. in this case,
There is almost no room to provide a test terminal other than the functional terminal, and as a result, the higher the necessity of the test function, the more difficult it becomes to provide the test function.

It is conceivable to share the terminals for the test function with the normal function terminals in a time-sharing manner, but this has a drawback that the management of the time-sharing is complicated and easily troublesome.

[Object of the Invention]

The present invention has been made in view of the above background,
The purpose is to make it possible to provide the necessary test functions simply by allocating a small area, without relying on the terminal pads for testing that occupy a large area or the troublesome and complicated time division. It is to provide a semiconductor integrated circuit device.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Outline of Invention]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows.

That is, in the area where the internal circuit of the semiconductor integrated circuit device is formed, together with the internal circuit, a photoelectric conversion element sensitive to light given from the outside is formed, and further the functional test of the internal circuit is performed by the photoelectric conversion element. A test signal generator to provide a necessary test function by simply and allocating a small area without using a terminal pad for testing that occupies a large area or complicated and time-sharing. It achieves the purpose of being able to.

〔Example〕

Hereinafter, representative embodiments of the present invention will be described with reference to the drawings.

In the drawings, the same or corresponding parts are designated by the same reference numerals.

1, 2 and 3 show an embodiment of a semiconductor integrated circuit device according to the present invention.

First, referring to FIGS. 1 and 3, in a semiconductor integrated circuit device 10 according to this embodiment, a relatively large-scale logic circuit including a signal holding circuit F / F such as a flip-flop is formed as an internal circuit 12. . This internal circuit 12 is
It is connected to the terminal pad 14 for external connection via the input / output buffer 16. The terminal pad 14 constitutes a functional terminal for operating the internal circuit 12 in a normal actual use, and does not have a function as a test terminal.

In the region where the internal circuit 12 is formed, as shown in FIG. 2, a photoelectric conversion element PS that is sensitive to light applied from the outside is formed. This photoelectric conversion element PS is
For example, by forming a PN junction on the semiconductor substrate of the semiconductor integrated circuit device 10, the semiconductor integrated circuit device 10 can be easily configured.
The photoelectric conversion element PS is connected in series between the power supply voltages Vcc and Vbb together with the resistor R, for example, to form a circuit that generates a logic signal according to the photosensitive state of the photoelectric conversion element PS. This circuit is made to function as a test signal generator T. That is, the signal generated from the test signal generating section T is given to each section of the internal circuit 12 as a test signal for performing a functional test of the internal circuit 12, as shown in FIG. 1 or 2. It is designed to be used. For example, in the portion shown in FIG. 2, from the connection point of the photoelectric conversion element PS and the resistor R, 2
A test signal for forcibly setting (or resetting) the holding state of the signal holding device circuit F / F including the pair of C-MOS transistors Q1-Q2 and Q3-Q4 is given.

Further, the test signal generating section T is formed in the vicinity of each circuit section to be tested to which the test signal generated therefrom is injected. Further, the test signal generating section T does not necessarily have to be configured independently, and may be configured in a state of being incorporated in a circuit section to be tested which receives the injection of the test signal from the test signal generating section T. .
Specifically, a part of the circuit under test is connected to the photoelectric conversion element P.
You may comprise S.

By providing the test signal generating section T as described above in each section of the internal circuit 12 of the semiconductor integrated circuit device 10, the semiconductor integrated circuit device 10 has a large number of test points T1, T2 and T2 as shown in FIG. T3 ... Tn are arranged for each test signal generating section T.

Therefore, for example, as shown in FIG.
0 and the optical deflector 22 cause the test points T1 to
A device for selectively irradiating the light beam L with Tn as a target is used, and a terminal probe 24 is applied to the terminal pad 14 as an external terminal of the semiconductor integrated circuit device 10 for monitoring, and at any test point Tx. By irradiating the light beam L, a test signal required for a functional test is applied to each of the test points T1 to Tn without using a test terminal pad to perform a functional test of the entire internal circuit 12 or a main part thereof. be able to.

Here, the photoelectric conversion element PS, which is a main part of the test signal generating section T, can be formed with a small area, and the photoelectric conversion element PS is provided in the vicinity of the circuit section to be tested or one thereof. By incorporating it into the unit, not only the terminal pad for applying the test signal from the outside can be eliminated, but also the wiring for transmitting the test signal can be almost eliminated. As a result, even in a semiconductor integrated circuit device having a large-scale or complicated internal circuit with no margin in the terminal pad, it is easy to perform without increasing the area size of the semiconductor substrate, or without troublesome and complicated time division. Will be able to provide the necessary test functions for. And, when it is actually used, it is stored in a package, for example, so that it is not necessary to worry about the influence of light from the outside.

〔effect〕

As described above, in the semiconductor integrated circuit device according to the present invention, a necessary test function can be obtained simply by allocating a small area without relying on a test terminal pad occupying a large area or a troublesome and complicated time division. Can be prepared.

Further, in the present invention, since each test point is selectively irradiated with the light beam by using the optical deflector, it is sufficient to provide only one laser oscillator, so that the measuring apparatus is not complicated. In particular, the semiconductor integrated circuit device as the DUT tends to increase in size year by year, and the present invention makes it possible to configure the device compactly even when testing a large-scaled semiconductor integrated circuit device. Even if it changes or the number of photoelectric conversion elements for inputting the test signal increases, it is possible to cope with the change of the light beam irradiation position by the light deflector, that is, the computer control by only changing the software.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention. Nor. For example, the test signal generating sections T by the photoelectric conversion elements PS may be provided in a dispersed manner, but they may be arranged in a concentrated manner in a vacant portion of the semiconductor substrate.

[Field of application]

In the above description, the invention made by the present inventor was mainly described for a large-scale logic LSI which is a field of application which is the background of the invention, but the invention is not limited to this and can be applied to, for example, a memory LSI.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a semiconductor integrated circuit device according to the present invention. FIG. 2 is a circuit diagram showing a part of FIG. FIG. 3 is a view showing the semiconductor integrated circuit device viewed from the front side. FIG. 4 is a side view showing an example of a state in which a function test of the semiconductor integrated circuit device according to the embodiment of the present invention is being performed. 10 ... Semiconductor integrated circuit device, 12 ... Internal circuit, 14
...... Terminal pad, 14 ...... Input / output buffer, 20 ...... Laser oscillator, 22 ...... Optical deflector, 24 ...... Terminal probe, F / F ...... Signal holding circuit (circuit under test), T ...
... Test signal generator, PS ... Photoelectric conversion element, R ... Resistance, T1 to Tn, Tx ... Test point, L ... Light beam.

Claims (1)

[Claims] 1. A plurality of terminal pads and an internal circuit are provided,
The terminal pad and the internal circuit are connected via an input / output buffer, and a semiconductor integrated circuit device including a plurality of signal holding circuits in the internal circuit is provided for each of the signal holding circuits. A signal for testing the function of the internal circuit at the connection point between the photoelectric conversion element and a resistance element connected in series with the photoelectric conversion element that is sensitive to light given from the outside when the photoelectric conversion element receives the light. And a test signal generating unit for generating a test signal are generated in advance, and photoelectric conversion corresponding to a desired signal holding circuit in the internal circuit is performed while a test terminal probe is brought into contact with the output terminal pad of the terminal pads. External to the element 1
The laser light generated by the one laser generating means is deflected by the light deflecting means and sequentially irradiated, and the corresponding signal holding circuit is forcibly set or reset to monitor the electric signal of the output terminal pad. A method for testing a semiconductor integrated circuit device, wherein a function test of an internal circuit is performed.