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JPH0656852B2 - Heterojunction bipolar transistor - Google Patents
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JPH0656852B2 - Heterojunction bipolar transistor - Google Patents

Heterojunction bipolar transistor

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Publication number
JPH0656852B2
JPH0656852B2 JP62158100A JP15810087A JPH0656852B2 JP H0656852 B2 JPH0656852 B2 JP H0656852B2 JP 62158100 A JP62158100 A JP 62158100A JP 15810087 A JP15810087 A JP 15810087A JP H0656852 B2 JPH0656852 B2 JP H0656852B2
Authority
JP
Japan
Prior art keywords
layer
base
concentration
base layer
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62158100A
Other languages
Japanese (ja)
Other versions
JPS642358A (en
JPH012358A (en
Inventor
愼一 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62158100A priority Critical patent/JPH0656852B2/en
Priority to DE8787119044T priority patent/DE3780284T2/en
Priority to EP87119044A priority patent/EP0273363B1/en
Priority to US07/136,589 priority patent/US4929997A/en
Publication of JPS642358A publication Critical patent/JPS642358A/en
Publication of JPH012358A publication Critical patent/JPH012358A/en
Publication of JPH0656852B2 publication Critical patent/JPH0656852B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はヘテロ接合バイポーラトランジスタに関する。The present invention relates to a heterojunction bipolar transistor.

〔従来の技術〕[Conventional technology]

近年、次世代の高速・高周波用のデバイスとして特にGa
As/AlGaAs系のヘテロ接合バイポーラトランジスタが注
目を浴びるようになり、基礎・応用の両面から研究がさ
かんである。ヘテロ接合バイポーラトランジスタの着想
の時期は非常に古く、トランジスタの発明とほぼ同時期
であるが、理論的にその優位性を評価されながらも、材
料となるGaAsそのものあるいはその周辺の知識の不足,
結晶成長技術の未発達等から最近までほとんどかえりみ
られることがなかった。
In recent years, especially Ga has been used as a next-generation high-speed and high-frequency device.
Heterojunction bipolar transistors based on As / AlGaAs have come to the forefront, and research is actively undertaken from both basic and applied sides. The concept of the heterojunction bipolar transistor was very old, almost at the same time as the invention of the transistor, but while its theoretical superiority was evaluated, lack of knowledge of GaAs itself as a material or its periphery,
Until recently, it was rarely seen back due to underdeveloped crystal growth technology.

しかし、今日、にわかに研究開発がさかんになったの
は、分子線エピタキシャル(MBE)法や有機金属CV
D(MOCVD)法等の多層薄膜形成技術が可能にな
り、実用に耐える良好なヘテロ接合が形成できるように
なったからである。
However, research and development have suddenly come to the forefront today by the molecular beam epitaxy (MBE) method and organometallic CV.
This is because a multilayer thin film forming technique such as the D (MOCVD) method has become possible, and a good heterojunction that can be used practically can be formed.

このような、ベースよりも禁制帯幅の広い半導体材料を
エミッタに使用してエミッタ注入効率を向上した、ヘテ
ロ接合バイポーラトランジスタの高速・高周波性能を一
段と高める為には、少数キャリヤのベース走行時間を一
層短縮することが必要である。
In order to further improve the high-speed and high-frequency performance of a heterojunction bipolar transistor in which a semiconductor material having a wider forbidden band than the base is used for the emitter and the emitter injection efficiency is improved, the base transit time of the minority carrier is increased. It is necessary to shorten it further.

従来、そのためにベース領域中の少数キャリヤのバリス
ティック伝導という現象を応用する方法とベース領域の
内部電界によって少数キャリヤを駆動する方法が試みら
れている。
Conventionally, therefore, a method of applying the phenomenon of ballistic conduction of minority carriers in the base region and a method of driving the minority carriers by the internal electric field of the base region have been tried.

第3図は従来のヘテロ接合バイポーラトランジスタの第
1の例のバンド構造図である。
FIG. 3 is a band structure diagram of a first example of a conventional heterojunction bipolar transistor.

この例は、n型のコレクタ層3′上にp型のベース層
5′とベース層5′よりも電子親和力が小さくかつ禁制
帯幅が広いn型のエミッタ層6′とを順次積層した構造
をとることにより、ヘテロ接合部の伝導帯に生じた電子
親和力の差に相当するエネルギー不連続δEが、エミ
ッタからベースに注される電子9′の初期運動エネルギ
ーとなり、通常の拡散よりも速いいわゆるバリスティッ
ク飛行10′による伝導を可能にする。
This example has a structure in which a p-type base layer 5'and an n-type emitter layer 6 'having a smaller electron affinity and a wider forbidden band width than the base layer 5'are sequentially stacked on an n-type collector layer 3'. As a result, the energy discontinuity δE c corresponding to the difference in electron affinity generated in the conduction band of the heterojunction becomes the initial kinetic energy of the electron 9 ′ poured from the emitter to the base, which is faster than ordinary diffusion. It enables conduction by so-called ballistic flight 10 '.

しかしながら、電子9′のバリスティック飛行10′に
よる伝導の有効距離は電子の平均自由行程程度なので、
それ以降はベース層5′中を通常の拡散によってコレク
タに到達するため、通常のヘテロ接合バイポーラトラン
ジスタのようにベース層5′厚が千数百Å程度もある場
合には、電子の平均自由行程が数百Åと比較的短いので
電子がバリステック飛行により伝導する距離はベース層
5′中のわずかの部分にすぎない。従って、ベース走行
時間は拡散走行の時間で決ってしまい、大幅なベース走
行時間の短縮は期待できないばかりでなく、拡散走行中
におけるベース層5′の高い正孔の濃度のために電子の
再結合確率が顕著になってコレクタへの到達率が低く、
注入効率があまり良くない。
However, the effective distance of conduction of the electron 9'by the ballistic flight 10 'is about the mean free path of the electron,
After that, the collector reaches the collector in the base layer 5'by ordinary diffusion. Therefore, when the base layer 5'has a thickness of several thousand Å like a normal heterojunction bipolar transistor, the mean free path of electrons is increased. Is relatively short at several hundred Å, the distance that electrons are conducted by ballistic flight is only a small part in the base layer 5 '. Therefore, the base transit time is determined by the diffusion transit time, and it is not expected that the base transit time will be significantly shortened. In addition, due to the high hole concentration of the base layer 5 ′ during the diffusion transit, the recombination of electrons occurs. The probability becomes remarkable and the arrival rate to the collector is low,
The injection efficiency is not very good.

実際に、p型にドープされているGaAsないしAl1-xGaxA
sにおける電子の再結合寿命は、経験的に、次式で表わ
すことがきる。
In fact, p-type doped GaAs or Al 1-x Ga x A
The recombination lifetime of electrons at s can be empirically expressed by the following equation.

ここでNTはp型不純物濃度、Nref は実験との参照濃
度を表わす。即ち、不純物濃度を下げれば、電子の再結
合寿命が伸びて再結合確率を小さくすることができる。
Here, N T represents a p-type impurity concentration, and N ref represents a reference concentration for experiments. That is, if the impurity concentration is lowered, the recombination life of electrons is extended and the recombination probability can be reduced.

第4図は従来のヘテロ接合バイポーラトランジスタの第
2の例のバンド構造図である。
FIG. 4 is a band structure diagram of a second example of the conventional heterojunction bipolar transistor.

この例では、n型のコレクタ層3″上に材料の構成比率
を変えたグレーデッドバンドギャップ構造のp型のベー
ス層5″とベース層5″よりも電子親和力が小さくかつ
禁制帯幅の広いn型のエミッタ層6″とを順次積層した
構造となっているので、エミッタ層6″からベース層
5″に注入された電子9″は、伝導帯の傾斜に基づく内
部電界によって矢印10″のように加速されて拡散走行
よりも速い伝導が期待される。
In this example, the electron affinity is smaller and the band gap is wider than the p-type base layer 5 ″ and the p-type base layer 5 ″ having a graded bandgap structure in which the material composition ratio is changed on the n-type collector layer 3 ″. Since the n-type emitter layer 6 ″ and the n-type emitter layer 6 ″ are sequentially stacked, the electrons 9 ″ injected from the emitter layer 6 ″ to the base layer 5 ″ are indicated by the arrow 10 ″ due to the internal electric field based on the inclination of the conduction band. It is expected that the conduction will be accelerated and faster than diffusion driving.

しかしながら、電子が充分加速されてある一定の運動エ
ネルギーを越えると谷間散乱が顕著になり、電子の実行
的な速度が低下してしまう。例えば、ベース層5″厚を
1500Åとしてベース材料のAlxGa1-xAsのxを0.15
→0とした場合、内部電界は約10kV/cmになり容易
に谷間散乱が生じる条件になることがわかる。
However, when the electrons are sufficiently accelerated and exceed a certain kinetic energy, valley scattering becomes remarkable, and the effective speed of the electrons decreases. For example, if the base layer 5 ″ thickness is 1500 Å, the base material Al x Ga 1-x As x is 0.15.
When → 0 is set, the internal electric field becomes about 10 kV / cm, and it is understood that valley scattering easily occurs.

以上、従来のヘテロ接合バイポーラトランジスタの代表
的な例を2つ挙げたが、グレーデッドバンドギャップ構
造よりも、バリスティック飛行を可能にするベース構造
の方が有利であるというシュミレーション結果が最近報
告されている。
As mentioned above, two typical examples of the conventional heterojunction bipolar transistor have been given. Recently, a simulation result has been reported that a base structure that enables ballistic flight is more advantageous than a graded bandgap structure. ing.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

上述したように従来のヘテロ接合バイポーラトランジス
タの第1の例では、エミッタ層からベース層に注入され
た少数キャリヤ(この場合は電子)がバリスティック飛
行による高速の伝導を行うが、ベース層厚に比べてその
伝導距離が平均自由行程程度と非常に短いので大部分が
低速の拡散走行による伝導となり、実効的な速度が低速
の拡散速度で決まるので、高速・高周波性能があまり向
上しないこと及び通常ベース抵抗を下げるためにベース
層の不純物濃度を高くしてあるのでキャリヤの再結合確
率が高くなりコレクタ層への到達率を低下して注入効率
を悪くすることなどの欠点がある。
As described above, in the first example of the conventional heterojunction bipolar transistor, although the minority carriers (electrons in this case) injected from the emitter layer to the base layer perform high-speed conduction by ballistic flight, In comparison, the conduction distance is very short, such as the mean free path, so most of the conduction is due to low-speed diffusion travel, and the effective speed is determined by the low-speed diffusion speed, so high-speed / high-frequency performance does not improve much and Since the impurity concentration of the base layer is made high in order to reduce the base resistance, there is a drawback that the recombination probability of carriers becomes high, the arrival rate to the collector layer is lowered, and the injection efficiency is deteriorated.

又、第2の例では、ベース層をグレイデッドバンドギャ
ップ構造にしているのでそれに基づく内部電界により少
数キャリヤ(この場合電子)は加速されるが、内部電界
が一定値以上になると谷間散乱による実効的移動度の低
下が起きてくるので、高速・高周波性能の向上はあまり
望めない。
Further, in the second example, since the base layer has a graded bandgap structure, minority carriers (electrons in this case) are accelerated by the internal electric field based on the structure, but when the internal electric field exceeds a certain value, it is effective due to valley scattering. It is not possible to expect high-speed / high-frequency performance improvement because the target mobility will decrease.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のヘテロ接合バイポーラトランジスタは、エミッ
タとベースが階段型ヘテロ接合をなし、前記ベース層が
前記エミッタ層に近いほど禁制帯幅が大きくなる複数の
サブベース層に分割され、さらに各サブベース層が前記
エミッタ層に近い側の高濃度サブベース層と低濃度サブ
ベース層とに分割されることを特徴とする。
In the heterojunction bipolar transistor of the present invention, the emitter and the base form a staircase type heterojunction, and the base layer is divided into a plurality of sub-base layers whose forbidden band width increases toward the emitter layer. Is divided into a high-concentration sub-base layer and a low-concentration sub-base layer on the side close to the emitter layer.

〔作用〕[Action]

このような本発明のヘテロ接合バイポーラトランジスタ
によると、ベース領域中でバリスティック伝導を終えた
キャリヤ(この場合電子)はわずかの拡散伝導の後、再
度バリスティック伝導を始めるという運動を繰り返しし
かも拡散伝導領域で正孔の濃度が小さくなっているの
で、キャリヤの伝導速度が向上すると共に、再結合によ
る損失も減少して高速・高周波性能が飛躍的に改善され
る。
According to such a heterojunction bipolar transistor of the present invention, carriers (in this case, electrons) that have completed ballistic conduction in the base region repeat a slight diffusion conduction, and then restart ballistic conduction, and the diffusion conduction is also performed. Since the concentration of holes in the region is low, the conduction velocity of carriers is improved, and the loss due to recombination is also reduced, so that the high-speed / high-frequency performance is dramatically improved.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明す
る。
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.

この実施例は、半絶縁性基板1上にプロトンをイオン注
入して形成した絶縁領域1aにより仕切られかつドーパ
ントをSiとし不純物濃度が3×1018atom/cm3厚さ40
00Åのn−GaAs層からなる高濃度層2をMBE法に
より形成して設け、高濃度層2上にドーパンをSiとし不
純物濃度が5×1016atom/cm3で厚さ5000Åのn
−GaAs層からなるコレクタ層3、ドーパントをBeとし不
純物濃度がそれぞれ1×1018atom/cm3及び1×1020
atom/cm3で厚さ100Å及び400Åのp及びp−Ga
As層からなる低濃度及び高濃度ベース層4a及び4bの
積層、ドーパントをBeとし不純物濃度がそれぞれ1×1
18atom/cm3及び1×1020atom/cm3で厚さ100Å及
び400Åのp及びp−Al0.15Ga0.85As層からなる
低濃度及び高濃度ベース層5a及び5bの積層、ドーパ
ントをSiとし不純物濃度が3×1017atom/cm3のn−A
0.3Ga0.7As層からなるエミッタ層6並びにドーパント
をSiとし不純物濃度が5×1018atom/cm3のn−GaAs
層からなる高濃度層7をMBE法等により順次所定のパ
ターンに形成して設け、高濃度層2及び7並びに高濃度
ベース層5b上にそれぞれコレクタ及びエミッタ並びに
ベース電極8c及び8e並びに8bを設けた構造をして
いる。
This embodiment is partitioned by an insulating region 1a formed by ion-implanting protons on a semi-insulating substrate 1 and has Si as a dopant and an impurity concentration of 3 × 10 18 atom / cm 3 Thickness 40
A high-concentration layer 2 made of an n + -GaAs layer of 00 Å is formed by the MBE method. Dopan is Si on the high-concentration layer 2 with an impurity concentration of 5 × 10 16 atom / cm 3 and a thickness of 5000 Å n −.
-The collector layer 3 made of a GaAs layer, the dopant is Be, and the impurity concentrations are 1 × 10 18 atom / cm 3 and 1 × 10 20 respectively.
p and p + -Ga with atom / cm 3 and thickness of 100Å and 400Å
Lamination of low-concentration and high-concentration base layers 4a and 4b composed of As layers, with Be as a dopant and an impurity concentration of 1 × 1
0 18 atom / cm 3 and 1 × 10 20 atom / cm 3 and 100 Å and 400 Å of p and p + -Al 0.15 Ga 0.85 As layers of low-concentration and high-concentration base layers 5a and 5b, and a dopant. N-A with Si and impurity concentration of 3 × 10 17 atom / cm 3
l 0.3 Ga 0.7 As layer emitter layer 6 and Si as a dopant, and n + -GaAs with an impurity concentration of 5 × 10 18 atom / cm 3
A high-concentration layer 7 composed of layers is sequentially formed in a predetermined pattern by the MBE method or the like, and collectors and emitters and base electrodes 8c and 8e and 8b are provided on the high-concentration layers 2 and 7 and the high-concentration base layer 5b, respectively. It has a different structure.

第2図は本発明の一実施例のバンド構造図である。FIG. 2 is a band structure diagram of an embodiment of the present invention.

この実施例では、ベース層が電子親和力の等しい低濃度
及び高濃度ベース層4a及び4bの積層と電子親和力が
高濃度ベース層4bよりも小さくかつ互いに等しい低濃
度及び高濃度ベース層5a及び5bの積層とからなり、
更にエミッタ層が高濃度ベース層5bよりも電子親和力
が小さくかつ禁制帯幅が広くなっているので、高濃度及
び低濃度ベース層4b及び5aの界面並びに高濃度ベー
ス層5b及びエミッタ層6の界面にそれぞれ伝導帯の不
連続δE′並びにδEが約0.1 eV程度生じる。こ
こで、高濃度ベース層4b及び5bの濃度は電子の平均
自由行程程度である。
In this embodiment, the base layer is formed by stacking the low-concentration and high-concentration base layers 4a and 4b having the same electron affinity and the low-concentration and high-concentration base layers 5a and 5b having the electron affinity smaller than and equal to each other. Consists of laminated,
Further, since the emitter layer has a smaller electron affinity and a wider band gap than the high-concentration base layer 5b, the interface between the high-concentration and low-concentration base layers 4b and 5a and the interface between the high-concentration base layer 5b and the emitter layer 6 are high. discontinuity &Dgr; E c 'and &Dgr; E c of each conduction band occurs about 0.1 eV. Here, the concentration of the high-concentration base layers 4b and 5b is about the mean free path of electrons.

従って、この実施例では、エミッタ層6から注入された
電子9が、矢印10に示すように、δEを初期運動エ
ネルギーとして高濃度ベース層5b中をバリスティック
飛行による伝導をし、次に、低濃度ベース層5aを拡散
走行し、次に、高濃度ベース層4b中をδE′を初期
運動エネルギーとして再びバリスティック飛行による伝
導をし、更に、低濃度ベース層4aを拡散走行してコレ
クタ層3に到達する。
Therefore, in this embodiment, the electrons 9 injected from the emitter layer 6 conduct as ballistic flight in the high-concentration base layer 5b with δE c as an initial kinetic energy, as shown by an arrow 10, and then, Diffusive running through the low-concentration base layer 5a, then conducting again by ballistic flight in the high-concentration base layer 4b with δE c ′ as the initial kinetic energy, and further diffusively running through the low-concentration base layer 4a Reach layer 3.

ここで、本発明の実施例においては、半導体材料として
互いに格子整合しているAlGaAsとGaAsを用いたが、材
料はこれに限らず、電子親和力に差のあるものなら何れ
でもよい。また、本発明に用いるヘテロ接合は、格子整
合系に限らず格子不整合系でもよい。
Here, in the embodiment of the present invention, AlGaAs and GaAs which are lattice-matched with each other are used as the semiconductor material, but the material is not limited to this and any material having a difference in electron affinity may be used. Further, the heterojunction used in the present invention is not limited to the lattice matching system, but may be a lattice mismatching system.

〔発明の効果〕〔The invention's effect〕

以上述べたように本発明は、ベース層を所定の厚さの低
濃度及び高濃度ベース層からなる積層を、複数電子親和
力が順次小さくなるように堆積し、その上に更に電子親
和の小さなエミッタ層を形成することにより、エミッタ
層からの注入キャリヤがベース層中をバリスティック飛
行及び拡散走行による伝導を複数回くり返しながらコレ
クタ層に到達するようにすることにより、従来のものよ
り拡散走行距離の割合が少なくしてバリスティック飛行
距離の割合を大きくした、ベース層の走行時間が短くし
かも少数キャリヤの再結合確率も低減したベース抵抗の
小さな高速・高周波性能の一段と優れたヘテロ接合バイ
ポーラトランジスタが実現出来るという効果がある。
As described above, according to the present invention, a base layer having a predetermined thickness is formed by stacking a low-concentration base layer and a high-concentration base layer so that the electron affinities of the base layers are sequentially reduced, and an emitter having a smaller electron affinity is further deposited thereon. By forming the layer, the injected carriers from the emitter layer reach the collector layer while repeating conduction by ballistic flight and diffusion traveling in the base layer a plurality of times, so that the diffusion traveling distance can be made smaller than the conventional one. Realization of a heterojunction bipolar transistor with a high proportion of the ballistic flight distance, a short proportion of the ballistic flight distance, a short base layer travel time, and a small recombination probability of minority carriers, high resistance and high frequency performance with a small base resistance. There is an effect that you can.

【図面の簡単な説明】[Brief description of drawings]

第1図及び第2図はそれぞれ本発明の一実施例の断面図
及びバンド構造図、第3図及び第4図はそれぞれ従来の
ヘテロ接合バイポーラトランジスタの第1及び第2の例
のバンド構造図である。 1……半絶縁性基板、1a……絶縁領域、2……高濃度
層、3,3′,3″……コレクタ層、4a,5a……低
濃度ベース層、4b,5b……ベース層、6,6′,
6″……エミッタ層、7……高濃度層、8b……ベース
電極、8c……コレクタ電極、8e……エミッタ電極、
11,11′,11″,12,12′,12″,13,
13′,13″……フェルミレベル。
1 and 2 are cross-sectional views and band structure diagrams of one embodiment of the present invention, and FIGS. 3 and 4 are band structure diagrams of first and second examples of conventional heterojunction bipolar transistors, respectively. Is. 1 ... Semi-insulating substrate, 1a ... Insulating region, 2 ... High concentration layer, 3, 3 ', 3 "... Collector layer, 4a, 5a ... Low concentration base layer, 4b, 5b ... Base layer , 6, 6 ',
6 ″ ... Emitter layer, 7 ... High concentration layer, 8b ... Base electrode, 8c ... Collector electrode, 8e ... Emitter electrode,
11, 11 ', 11 ", 12, 12', 12", 13,
13 ', 13 "... Fermi level.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】エミッタとベースが階段型ヘテロ接合をな
すヘテロ接合バイポーラトランジスタにおいて、前記ベ
ース層が前記エミッタ層に近いほど禁制帯幅が大きくな
る複数のサブベース層に分割され、さらに各サブベース
層が前記エミッタ層に近い側の高濃度サブベース層と低
濃度サブベース層とに分割されることを特徴とするヘテ
ロ接合バイポーラトランジスタ。
1. In a heterojunction bipolar transistor in which an emitter and a base form a staircase type heterojunction, the base layer is divided into a plurality of sub-base layers whose forbidden band width increases toward the emitter layer, and each sub-base is further divided. A heterojunction bipolar transistor, wherein the layer is divided into a high-concentration sub-base layer and a low-concentration sub-base layer on the side close to the emitter layer.
JP62158100A 1986-12-22 1987-06-24 Heterojunction bipolar transistor Expired - Fee Related JPH0656852B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP62158100A JPH0656852B2 (en) 1987-06-24 1987-06-24 Heterojunction bipolar transistor
DE8787119044T DE3780284T2 (en) 1986-12-22 1987-12-22 BIPOLAR HETEROUISITION TRANSISTOR WITH BALLISTIC OPERATION.
EP87119044A EP0273363B1 (en) 1986-12-22 1987-12-22 Heterojunction bipolar transistor with ballistic operation
US07/136,589 US4929997A (en) 1986-12-22 1987-12-22 Heterojunction bipolar transistor with ballistic operation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62158100A JPH0656852B2 (en) 1987-06-24 1987-06-24 Heterojunction bipolar transistor

Publications (3)

Publication Number Publication Date
JPS642358A JPS642358A (en) 1989-01-06
JPH012358A JPH012358A (en) 1989-01-06
JPH0656852B2 true JPH0656852B2 (en) 1994-07-27

Family

ID=15664302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62158100A Expired - Fee Related JPH0656852B2 (en) 1986-12-22 1987-06-24 Heterojunction bipolar transistor

Country Status (1)

Country Link
JP (1) JPH0656852B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63280674A (en) * 1987-05-13 1988-11-17 Canon Inc document processing device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH067554B2 (en) * 1986-12-22 1994-01-26 日本電気株式会社 Varistable heterojunction bipolar transistor

Also Published As

Publication number Publication date
JPS642358A (en) 1989-01-06

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