JPH0670639B2 - Directional Discrimination Circuit for Polyphase Square Wave - Google Patents
Directional Discrimination Circuit for Polyphase Square WaveInfo
- Publication number
- JPH0670639B2 JPH0670639B2 JP24737788A JP24737788A JPH0670639B2 JP H0670639 B2 JPH0670639 B2 JP H0670639B2 JP 24737788 A JP24737788 A JP 24737788A JP 24737788 A JP24737788 A JP 24737788A JP H0670639 B2 JPH0670639 B2 JP H0670639B2
- Authority
- JP
- Japan
- Prior art keywords
- phase
- output
- positive
- data
- delay flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Landscapes
- Indicating Or Recording The Presence, Absence, Or Direction Of Movement (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多相矩形波の方向弁別回路、特に工作機械の制
御に使用されるサーボモータの回転方向を弁別するため
の多相矩形波の方向弁別回路に関するものである。The present invention relates to a directional discriminating circuit for a polyphase rectangular wave, and more particularly to a polyphase rectangular wave for discriminating the rotational direction of a servomotor used for controlling a machine tool. The present invention relates to a direction discriminating circuit.
一般に工作機械の制御に使用されるサーボモータの回転
方向はサーボモータに連結された位相検出信号発生装置
(エンコーダ)よりの出力を方向弁別回路によって弁別
している。Generally, the direction of rotation of a servo motor used for controlling a machine tool is discriminated by a direction discriminating circuit from an output from a phase detection signal generator (encoder) connected to the servo motor.
第4図は従来の方向弁別回路を示し、A,Bはサーボモー
タに連結されたエンコーダ(図示せず)よりの互いに90
゜位相の異なるA相及びB相出力の入力端子、1〜4は
夫々遅延フリップフロップ(DFF)、6,7は夫々排泄的論
理和回路(EXOR)、8は否定回路(NOT)、9〜12は夫
々否定オア回路(OR)、13,14は夫々ナンド回路(NAN
D)である。FIG. 4 shows a conventional direction discriminating circuit, in which A and B are 90 degrees apart from each other by an encoder (not shown) connected to a servomotor.
Input terminals for A-phase and B-phase outputs having different phases, 1 to 4 are delay flip-flops (DFFs), 6 and 7 are respectively exclusive OR circuits (EXOR), 8 is a NOT circuit (NOT), and 9 to 12 is a negative OR circuit (OR), 13 and 14 are NAND circuits (NAN)
D).
このような従来の方向弁別回路においてはエンコーダよ
りのA相,B相出力信号を入力端子A,Bに夫々加え、各信
号の立ち上がり、立ち下がりに応じてパルス信号を作
り、各パルス信号のタイミングを比較してサーボモータ
の回転方向に対応した出力をナンド回路13,14より得る
ようにしているが構成部品が多く回路が複雑であり、こ
れら部品の取付基板の面積も大きく、高価となる欠点が
あった。In such a conventional direction discriminating circuit, the A-phase and B-phase output signals from the encoder are added to the input terminals A and B, respectively, to generate pulse signals according to the rising and falling edges of each signal, and the timing of each pulse signal. However, the output corresponding to the rotation direction of the servomotor is obtained from the NAND circuits 13 and 14, but the circuit is complicated because there are many components and the area of the mounting board for these components is large, which is expensive. was there.
本発明の多相矩形波の方向弁別回路は、回転体の位置検
出信号発生装置より得られる多相矩形波の互いに位相の
異なる第1,第2の相の出力信号が夫々入力される各相に
対応する互いに直列接続された第1,第2の遅延フリップ
フロップの群と、前記第1,第2の相に対応するデータセ
レクト回路の群とより成り、前記第1の相の第2の遅延
フリップフロップの正相出力が前記各データセレクト回
路の上位のセレクト端子に共通に入力され、前記第2の
相の第2の遅延フリップフロップの正相出力が前記各デ
ータセレクト回路の下位のセレクト端子に共通に入力さ
れ、前記第1の相の第1の遅延フリップフロップの正相
出力及び逆相出力が前記各データセレクト回路の第1,第
2のデータ端子に共通に入力され、前記第2の相の第1
の遅延フリップフロップの正相出力及び逆相出力が前記
各データセレクト回路の第3,第4のデータ端子に共通に
入力され、前記各データセレクト回路より夫々回転体の
回転方向に対応した負から正または正から負に変化する
出力を得るようにしたことを特徴とする。The direction discriminating circuit of the multi-phase rectangular wave of the present invention is configured such that the output signals of the first and second phases having different phases of the multi-phase rectangular wave obtained from the position detection signal generator of the rotating body are input to each phase. And a group of data selection circuits corresponding to the first and second phases and a group of first and second delay flip-flops connected in series corresponding to each other. The normal phase output of the delay flip-flops is commonly input to the upper select terminals of each of the data select circuits, and the normal phase output of the second delay flip-flop of the second phase is the lower select of each of the data select circuits. Common input to the terminals, the positive phase output and the negative phase output of the first delay flip-flop of the first phase are commonly input to the first and second data terminals of each of the data select circuits, and Phase 1 of 2
The positive-phase output and the negative-phase output of the delay flip-flop are commonly input to the third and fourth data terminals of each of the data select circuits, and the negative data corresponding to the rotation direction of the rotor is output from each of the data select circuits. It is characterized in that an output that changes from positive to positive or negative is obtained.
本発明の多相矩形波の方向弁別回路によればその構成部
品を減少することができる。The multiphase rectangular wave direction discriminating circuit of the present invention can reduce the number of its components.
本発明においては第1図に示すようにサーボモータに接
続したエンコーダよりの互いに90゜位相の異なる2層の
矩形波信号を入力端子A,Bを介して夫々各相に対応する
互いに直列接続した第1,第2の遅延フリップフロップ
(DFF)15,16及び17,18の入力端子に加え、これら第1,
第2の遅延フリップフロップ16,18の正相出力を夫々第
1,第2のデータセレクト回路19,20の上位及び下位セレ
クト端子に共通に加える。In the present invention, as shown in FIG. 1, two layers of rectangular wave signals having different 90 ° phases from an encoder connected to a servomotor are connected in series via input terminals A and B, respectively corresponding to each phase. In addition to the input terminals of the first and second delay flip-flops (DFFs) 15, 16 and 17, 18,
The positive phase outputs of the second delay flip-flops 16 and 18 are respectively
1, common to the upper and lower select terminals of the second data select circuits 19 and 20.
また、A相の前記第1の遅延フリップフロップ15の正相
出力及び逆相出力を前記第1,第2のデータセレクト回路
19,20の第1,第2のデータ端子に共通に加え、B相の前
記第1の遅延フリップフロップ17の正相出力及び逆相出
力を前記第1,第2のデータセレクト回路19,20の第3,第
4のデータ端子に加えるようにする。The positive phase output and the negative phase output of the first delay flip-flop 15 of the A phase are set to the first and second data select circuits.
In addition to the common first and second data terminals 19 and 20, the positive phase output and the negative phase output of the B phase first delay flip-flop 17 are used for the first and second data select circuits 19, 20. Are added to the third and fourth data terminals of.
本発明の多相矩形波の方向弁別回路は上記のような構成
であるから前記第1,第2のデータセレクト回路19,20よ
り夫々サーボモータの回転方向に対応した出力が得られ
るようになる。Since the direction discriminating circuit of the multi-phase rectangular wave of the present invention is configured as described above, the first and second data select circuits 19 and 20 can obtain outputs corresponding to the rotation directions of the servo motors. .
即ちエンコーダより得られる出力が例えば第2図,
に示すように互いに90゜位相の異なる2相の矩形波の場
合、第1の遅延フリップフロップ15,17から得られる正
相出力は僅か遅延されて夫々,となり、逆相出力は
,となり、第2の遅延フリップフロップ16,18の正
相出力は更に僅か遅延されて,に示すようになる。That is, the output obtained from the encoder is, for example, as shown in FIG.
In the case of two-phase rectangular waves 90 ° out of phase with each other, the positive-phase outputs obtained from the first delay flip-flops 15 and 17 are slightly delayed, respectively, and the negative-phase outputs become, The positive phase outputs of the delay flip-flops 16 and 18 of 2 are further delayed by a little and become as shown in.
入力,を2進数データと見立てれば第2図の(イ)
〜(ニ)の出力は夫々10,11,01,00で示される。If the input is regarded as binary data, (a) in Fig. 2
The outputs of (d) are shown as 10, 11, 01, 00, respectively.
データセレクト回路19,20は入力,で指定された値
に対応するデータ、即ち正転時にはY2,Y3,Y1,Y0,Y2・・
・、逆転時にはY0,Y1,Y3,Y2,Y0・・・の値を順次出力す
ることになる。The data select circuits 19 and 20 are the data corresponding to the values specified by the input, that is, Y 2 , Y 3 , Y 1 , Y 0 , Y 2 ...
.. During reverse rotation, the values of Y 0 , Y 1 , Y 3 , Y 2 , Y 0 ... Will be sequentially output.
こゝでデータセレクト回路19,20に対する入力を第3図
の通りに接続する場合、正転時にはデータセレクト回路
19から逆転時にはデータセレクト回路20から信号が出力
されることになり回転方向を弁別できると共にL0アクテ
ィブの4逓倍信号が得られたことになる。If the inputs to the data select circuits 19 and 20 are connected as shown in Fig. 3 here, the data select circuits will be in the normal rotation.
Since the signal is output from the data select circuit 20 during reverse rotation from 19, the rotation direction can be discriminated and the L0 active quadruple signal is obtained.
尚以上は2相出力のみならず位相差が90゜以外の3相以
上の多相出力の場合にも同様に適用できる。The above is applicable not only to two-phase output but also to multi-phase output of three or more phases with a phase difference other than 90 °.
上記のように本発明によれば少ない部品点数で初期の目
的を達成でき、コスト及び占有面積を減少できる大きな
利益がある。As described above, according to the present invention, the initial object can be achieved with a small number of parts, and there is a great advantage that the cost and the occupied area can be reduced.
第1図は本発明多相矩形波の方向弁別回路のブロック
図、第2図はその各部の波形図、第3図は説明用テーブ
ル、第4図は従来の方向弁別回路のブロック図である。 A,B……入力端子、1〜4……遅延フリップフロップ(D
FF)、6〜7……排他的論理和回路(XOR)、8……否
定回路(NOT)、9〜12……否定オア回路(OR)、13,14
……ナンド回路(NAND)、15,16,17,18……遅延フリッ
プフロップ、19,20……データセレクト回路。FIG. 1 is a block diagram of a directional discriminating circuit of a polyphase rectangular wave of the present invention, FIG. 2 is a waveform diagram of each part thereof, FIG. 3 is an explanatory table, and FIG. 4 is a block diagram of a conventional directional discriminating circuit. . A, B ... Input terminals, 1-4 ... Delay flip-flop (D
FF), 6 to 7 ... Exclusive OR circuit (XOR), 8 ... Negative circuit (NOT), 9 to 12 ... Negative OR circuit (OR), 13, 14
...... NAND circuit (NAND), 15,16,17,18 …… Delay flip-flop, 19,20 …… Data select circuit.
Claims (1)
る多相矩形波の互いに位相の異なる第1,第2の相の出力
信号が夫々入力される各相に対応する互いに直列接続さ
れた第1,第2の遅延フリップフロップの群と、前記第1,
第2の相に対応するデータセレクト回路の群とより成
り、前記第1の相の第2の遅延フリップフロップの正相
出力が前記各データセレクト回路の上位のセレクト端子
に共通に入力され、前記第2の相の第2の遅延フリップ
フロップの正相出力が前記各データセレクト回路の下位
のセレクト端子に共通に入力され、前記第1の相の第1
の遅延フリップフロップの正相出力及び逆相出力が前記
各データセレクト回路の第1,第2のデータ端子に共通に
入力され、前記第2の相の第1の遅延フリップフロップ
の正相出力及び逆相出力が前記各データセレクト回路の
第3,第4のデータ端子に共通に入力され、前記各データ
セレクト回路より夫々回転体の回転方向に対応した負か
ら正または正から負に変化する出力を得るようにしたこ
とを特徴とする多相矩形波の方向弁別回路Claims: 1. A multi-phase rectangular wave obtained by a position detection signal generator for a rotating body, which is connected in series to each other corresponding to respective phases to which output signals of first and second phases having different phases are inputted. A group of first and second delay flip-flops, and
A group of data select circuits corresponding to the second phase, the positive phase output of the second delay flip-flop of the first phase is commonly input to the upper select terminals of each data select circuit, and The positive phase output of the second delay flip-flop of the second phase is commonly input to the lower select terminals of the data select circuits, and the first phase of the first phase
The positive-phase output and the negative-phase output of the delay flip-flop of are commonly input to the first and second data terminals of each of the data select circuits, and the positive-phase output of the first delay flip-flop of the second phase and An output in which a reverse phase output is commonly input to the third and fourth data terminals of each of the data select circuits, and which changes from negative to positive or from positive to negative corresponding to the rotating direction of the rotating body from each of the data select circuits. Directional discriminating circuit for multi-phase rectangular waves characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24737788A JPH0670639B2 (en) | 1988-10-03 | 1988-10-03 | Directional Discrimination Circuit for Polyphase Square Wave |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24737788A JPH0670639B2 (en) | 1988-10-03 | 1988-10-03 | Directional Discrimination Circuit for Polyphase Square Wave |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0296660A JPH0296660A (en) | 1990-04-09 |
| JPH0670639B2 true JPH0670639B2 (en) | 1994-09-07 |
Family
ID=17162522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24737788A Expired - Fee Related JPH0670639B2 (en) | 1988-10-03 | 1988-10-03 | Directional Discrimination Circuit for Polyphase Square Wave |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0670639B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6176381B1 (en) * | 2000-01-04 | 2001-01-23 | Stanley C. Mader | Child resistant container system with movable latch |
-
1988
- 1988-10-03 JP JP24737788A patent/JPH0670639B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0296660A (en) | 1990-04-09 |
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