JPS5952369B2 - Centering device for electronic weighing devices - Google Patents

Description

[Detailed description of the invention] The present invention relates to a centering device for an electronic weighing device.

Conventionally, the centering of the zero position in electronic weighing devices, such as electronic scales and electronic scales, has been done by attaching a fine adjustment device to the encoder, which is an A/D conversion device, and operating this fine adjustment device manually or with an electric motor. was working.

However, such fine adjustment methods have drawbacks such as difficulty in accurate centering, time-consuming adjustment, and the need to add a new fine adjustment device.

This invention was made in view of the above-mentioned drawbacks, and uses a multiphase signal supplied from an encoder to generate a plurality of count pulses, and among the plurality of count pulses,
Select a count pulse whose position at the time of turning on the centering switch is approximately in the center of two pulses that are close to each other among the plurality of count pulses, and as a result, one-touch operation of the external switch The object of the present invention is to provide an electronic weighing device that can automatically align the center with just an operation.

The gist of the present invention for achieving the above object is as described in the claims above. Hereinafter, a preferred embodiment of the present invention will be described in detail based on the drawings.

FIG. 1 of the drawings is a block diagram of a three-phase signal one period three count pulse system according to an embodiment of the present invention, and FIG. 2 is a time chart of signals of each part in FIG. 1.

This type of centering device is installed in the zero position centering part of an electronic weighing device such as an electronic scale, and uses a multiphase signal supplied from an encoder as an input signal, and generates an addition signal, a subtraction signal, and a count pulse. Output to up/down counter. In FIG. 1, symbols A, b and ゛C
is an input terminal into which a three-phase signal supplied from an encoder (not shown), which is an A/D conversion device, is input.

Input terminal a receives a signal with the waveform shown in Fig. 2A, input terminal b receives a signal with the waveform shown in Fig. 2B, which is delayed by 120 degrees from A, and input terminal C receives a signal with the waveform shown in Fig. 2B, which is delayed by 120 degrees in phase from A. A signal having a waveform shown in FIG. 2C, which is 120 degrees phase advanced, is supplied. Input signal A is supplied to subtraction circuits 1 and 3, input signal B is supplied to subtraction circuits 1 and 2, input signal C is supplied to subtraction circuits 2 and 3, and the input signals A, B and C are each supplied to a waveform shaping circuit. 7, 8 and 9.

The signals supplied to the waveform shaping circuits 7, 8, and 9 are waveform-shaped as shown in FIG. 2 A'', B'', and C''. is connected to the first differentiating circuit 10, to the second differentiating circuit 11 via the inverter 12, and further to the AND gates 28, 29, 30,
32, 33, 34, 36, 37, 38, 40, 41, 4
2 and 0R gates 31, 35, 39, and 43 in AND gates 29, 34, 38, and 41, respectively.

The output waveform of the first differentiating circuit 10 is shown in FIG. 2G, and the output waveform of the second differentiating circuit 10 is shown in FIG. 2H. The output waveform of the waveform shaping circuit 8 in FIG.
4 and further AND gates 30, 32, 36 and 42
are supplied respectively. The output waveform of the first differentiating circuit 13 is shown in FIG. 21, and the output waveform of the second differentiating circuit 14 is shown in FIG. 2J. The output waveform of the waveform shaping circuit 9, C'' in FIG.
to the second differentiating circuit 17 via the AND gate 2
8, 33, 37 and 40, respectively. 1st
The output waveform of the second differentiator]6 is shown in FIG. 2K, and the output waveform of the second differentiator]7 is shown in FIG. 2L. and,
These AND gates 28, 29, 30, 32, 33, 3
AND circuit group 20 consisting of 4, 36, 37, 38, 40, 41, 42 and 0R gates 31, 35, 39, 43
0 outputs multiple count pulses M, N, P and ゛T.

First differential circuit] The output waveform G of 0 and the output waveform C1 of the waveform shaping circuit 9 are connected to the 0R gate 3 via an AND gate 28.
], the output waveform 1 of the first differentiating circuit 13 and the output waveform A' of the waveform shaping circuit 7 are sent to the 0R gate 31 via the AND gate 29, and the output waveform K of the first differentiating circuit 16 and the waveform shaping circuit The output waveform B'' of 8 is supplied to the 0R gate 31 via the AND gate 30, and the 0R gate 31
, outputs an addition signal M in which waveforms G, I, and K are used as addition count pulse waveforms.

H Output waveform H of second differentiating circuit 11 and waveform shaping circuit 8
The output waveform B" of the
The output waveform L of the R gate 35 and the output waveform A'' of the waveform shaping circuit 7 are respectively supplied to the 0R gate 35 via the AND gate 34, and from the 0R gate 35, the waveform An addition signal N is output when H, J, and L are used as addition count pulse waveforms.

Output waveform G of first differentiating circuit 10 and waveform shaping circuit 8
The output waveform B'' of
The output waveform K of the first differentiating circuit 16 and the output waveform A'' of the waveform shaping circuit 7 are respectively supplied to the R gate 39 and the 0R gate 39 via the AND gate 38.
From 9, a subtraction signal P is output when the hexagonal shapes G, I, and K are used as subtraction count pulse waveforms.

This means that in Figure 2, when the encoder rotation direction is in the addition direction, the signals A, B, and C change from left to right, but when the encoder rotation direction is in the subtraction direction, the signals A, B, and C change from right to left. As a result, the rising differential waveform G of the waveform A'' is at the same position as the waveform H in the addition direction.Therefore, in the case of the subtraction direction, a subtraction signal P is output from the waveform G and waveform B''. become. The output waveform H of the second differentiating circuit 11 and the output waveform C'' of the waveform shaping circuit 9 are connected to 0 through an AND gate 40.
The output waveform J of the second differentiating circuit 14 and the output waveform A'' of the waveform shaping circuit 7 are sent to the R gate 43 via the AND gate 41 to the output waveform L of the second differentiating circuit 17 and the output waveform A'' of the second differentiating circuit 17. The output waveform B″ of the shaping circuit 8 is output from the AND gate 4
2 to the 0R gate 43, and the 0R gate 43 outputs a subtraction signal T when the waveforms H, J, and soil are used as a subtraction count pulse waveform.

On the other hand, A and B in FIG. 2 supplied to the subtraction circuit 1 are subtracted in the subtraction circuit 1 as shown in FIG. 1 is supplied to the waveform shaping circuit 4.

2B and C supplied to the subtraction circuit 2 are subtracted in the subtraction circuit 2 as B-C=E, and the waveform shown in FIG. 2E is outputted from the subtraction circuit 2. 1 waveform shaping circuit 5.

Further, C and A in FIG. 2 supplied to the subtraction circuit 3 are subjected to subtraction of C-A=F in the subtraction circuit 3, and the waveform shown in FIG. 2F is output from the subtraction circuit 3. The signal is supplied to the waveform shaping circuit 6.

The respective signals supplied to the first waveform shaping circuits 4, 5 and 6 are waveform shaped as shown in FIG. 2 D'', E'' and F''.

The output waveform of the first waveform shaping circuit 4, D'' in FIG.
The output waveform of the first waveform shaping circuit 5, E'' in FIG. , the output waveform of the second waveform shaping circuit 6 is applied to the AND gates 19 and 20 in FIG.
'' are supplied to the AND gates 20 and 21, respectively.The storage control circuit 100 is connected to the first waveform shaping circuits 4 and 5.
The output signals D″, E″, and F″ of 6 and the command signal V of the centering switch 23, which will be described later, are input, and the command signal V of the centering switch 23 is inputted to the bistable multivibrator circuit 27, which is a storage circuit described later. The output waveform D'' of the first waveform shaping circuit 4 and the output waveform E'' of the first waveform shaping circuit 5 are sent to the 0R gate 22 via the AND gate 19, Output waveform E″
and the output waveform F of the first waveform shaping circuit 6 are determined by the AND gate 2
0 to the 0R gate 22, the output waveform F'' of the first waveform shaping circuit 6 and the output waveform D'' of the first waveform shaping circuit 4 are
The signals are respectively supplied to the 0R gate 22 via the ND gate 21, and the 0R gate 22 outputs the waveform shown in FIG. 2U. With the above circuit configuration, if the width of one cycle of the input signal supplied from the encoder is 1, then the width of two adjacent pulses of waveforms M, N, P, and T is 1.
/3, and the width of each of the high level and low level of waveform U is 1/6. That is, when the waveform U is at a high level, no matter when or how you turn on the centering switch 23, which will be described later, at the moment when the centering switch 23 is turned on, the waveform
It is found that the position is within ±25% from the center of the pulse of
It can be seen that the ratio is within 25%. On the other hand, when the waveform U is at a low level, no matter when or how the centering switch 23 (described later) is turned on, the point of turning on the centering switch 23 must be within ±25% of the center of two adjacent pulses of the waveform M. It can be seen that the waveform T is located within ±25% from the center of two adjacent pulses. Next, the waveform U
is supplied to the AND gate 25 together with the command signal V from the centering switch 23 and the counter zero signal 0, the logical product of these is output, and is supplied as the set S1 side input of the bistable multivibrator circuit 27 which is a storage circuit. Ru.

Further, the waveform U is input to the inverter 24, and its output is supplied to the AND gate 26 along with the command signal V from the centering switch 23 and the force counter zero signal 0, and the logical product of these is output, which is a memory circuit. The bistable multivibrator circuit 27 is supplied as an input on the R1 side. In this case, if the counter is configured to operate without supplying the counter zero signal 0, centering can be performed at any position within ±25%, and position correction can be performed. The bistable multivibrator circuit 27 is
Output Q1 is generated when waveforms H, J, and SAT are addition count pulse waveforms, and waveforms G, I, and K are subtraction count pulse waveforms.

The output Q1 is output from an AND gate 44 along with an addition signal N when the waveforms H, J and soil are used as an addition count pulse waveform.
, 45, 47, 48 and 0R gates 46, 49 in the addition/subtraction discrimination circuit 300, the logical product of these is applied, and the output of the bistable multivibrator circuit 50 is applied via the 0R gate 46. It is supplied as the set S2 side input. As a result, the bistable multivibrator circuit 50 outputs the addition signal Q2. In addition, the output Q1 is combined with the subtraction signal P when the waveforms G, I, and K are subtraction count pulse waveforms, and the AND gate 4
7, the AND of these is outputted, and is supplied via the 0R gate 49 as an input to the bistable multivibrator circuit 50 on the reset R2 side. As a result, the bistable multivibrator circuit 50 generates a subtracted signal force. Similarly, the bistable multivibrator circuit 27 is
Output Q1 is generated when waveforms G, I, and K are addition count pulse waveforms, and waveforms H, J, and L are subtraction count pulse waveforms.

Output Q1 is output from AND gate 44 along with addition signal M when waveforms G, I, and K are used as addition count pulse waveforms.
The logical product of these is outputted and supplied as the set S2 side input of the bistable multivibrator circuit 50 via the 0R gate 46. As a result, the bistable multivibrator circuit 50 outputs the addition signal Q2. In addition, output 1 is ANDed with subtraction signal T when waveforms H, J, and L are used as subtraction count pulse waveforms.
It is supplied to the gate 48 and the logical product of these is outputted, and the result is 0.
It is supplied to the bistable multivibrator circuit 50 through the R gate 49 as an input to the R2 side of the bistable multivibrator circuit 50. As a result, the bistable multipipulator circuit 50 outputs the subtraction signal Q2. The output of the 0R gate 46 and the output of the 0R gate 49 are supplied to the 0R gate 51, and their logical sum is outputted to form a count pulse.

As explained in detail above, the present invention provides a method for turning on a centering switch by an external operation, so that the command signal when the switch is turned on can be obtained from multiple directions of addition and subtraction from each phase of a multiphase signal. The electrical precision can be easily improved by automatically selecting a count pulse waveform in which the command signal is located approximately at the center of two adjacent pulses among the count pulses. Therefore, according to the present invention, accurate centering can be achieved with a single switch operation.
In other words, it can be done with just one-touch operation, and there is no need to install a fine adjustment device like in the past.

Further, it is particularly advantageous if the balance is linked with a tare switch of an electronic scale, since tare weight cancellation and centering can be easily achieved at the same time with a single switch operation. Furthermore, positional correction of electronic scales, electronic scales, etc. becomes accurate and easy. In the above embodiment, a case was explained in which a 1-period 3-count pulse method using a three-phase signal is used, but a 1-period 1-count pulse method using a multi-phase signal is used, and a method other than the 1-period 3-count pulse method using a 3-phase signal is also applicable. It goes without saying that the present invention can be similarly applied to a single-period multi-count pulse system using polyphase signals, and the differentiating circuit may be replaced with another circuit that performs the same function.

[Brief explanation of the drawing]

FIG. 1 is a program diagram of one embodiment of the present invention, and FIG. 2 is a time chart of signals at various parts in FIG. 1, 2, 3... Subtraction circuit, 4, 5, 6...
...First waveform shaping circuit, 7, 8, 9... Waveform shaping circuit, 10, 13, 16... First differentiation circuit, 11, 14, 17...・Second differentiation circuit, 12
, 15, 18... Inverter, 23...
・Command signal supply means, 27... Memory circuit, 1
00... Memory control circuit, 200... AND circuit group, 300... Addition/subtraction discrimination circuit, M,
N, P, T...Multiple count pulses, V...
...Command signal.

Claims (1)

[Claims] 1. A subtraction circuit that performs subtraction by inputting two signals of the polyphase signals supplied from the encoder, a first waveform shaping circuit that shapes the waveform of the output signal of this subtraction circuit, and a waveform shaping circuit provided corresponding to the supplied signal; a first differentiation circuit which receives the signal waveform-shaped by the waveform shaping circuit; a second differentiating circuit as an input; and a group of AND circuits receiving the signal waveform-shaped by the waveform shaping circuit and the output signals of the first and second differentiating circuits and outputting a plurality of count pulses; a centering switch for selecting any one of the plurality of count pulses, and a centering switch that inputs the output signal of the first waveform shaping circuit and the signal of the centering switch to a storage circuit to be described later. A memory control circuit performs control such that the command signal is held, and when the centering switch is turned on, the command signal is positioned approximately at the center of two pulses that are close to each other in each count pulse among the plurality of count pulses. an electronic measuring device comprising a memory circuit comprising a bistable multivibrator for selecting count pulses such as Centering device.