JPH0677477B2 - Dimming control device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a dimming control device that is preferably implemented in a stage, a studio, or the like.

BACKGROUND ART In a typical prior art, a fader as a lighting level setting means is provided for each channel of an illuminating lamp, and a signal having a voltage corresponding to a dimming level from this fader is given to a dimmer to illuminate. The energization angle of the lamp is controlled.

In such a prior art, since the dimming level of the illumination lamp changes in response to the manual operation of the fader, the fader operation is performed rapidly to change the brightness from the darkest condition to the maximum brightness. Then, the brightness of the illuminating lamp also changes at the same time, and the desired effect of the stage lighting cannot be achieved.

OBJECT The object of the present invention is to solve the above-mentioned technical problems and to change the dimming level of an illuminating lamp when operating the illuminating level setting means from the current illuminating level of the illuminating lamp. It is an object of the present invention to provide a dimming control device capable of varying the response speed until the illumination level set by the setting means is reached.

Embodiment FIG. 1 is an electric circuit diagram of an embodiment of the present invention. The dimming control device 1 includes illumination lights L1 to L5 provided for each channel.
(Generally referred to by reference numeral L), and faders F1 to F5 as level setting means which are manually operated to individually set the dimming levels of the lamps L1 to L5 (referred to by reference numeral F when collectively referred to). (Shown), a multiplexer 3 for deriving the outputs from the faders F1 to F5 in time series, and sample and hold circuits S1 to S5 (indicated by reference numeral S when collectively referred to) provided for each channel, and a sample The dimmers D1 to D5 that receive the dimming signal from the hold circuit S and perform the conduction angle control so that the lighting lamps L1 to L5 are turned on at desired lighting levels.
(Reference numeral D is used for generic name) and multiplexer 3
And a resistor R interposed between the sample hold circuit S and the sample hold circuit S. The power supply voltage Vcc is applied to the faders F1 to F5.

The multiplexer 3 is a switch SW that switches the dimming level signals from the faders F1 to F5 in time series and leads them to the resistor R.
It has 3 ₁ , SW3 _2, ..., SW3 ₅ . Sample hold circuit S1
Is a sampling switch SW1, a capacitor C1,
And an operational amplifier OP1. Residual sample and hold circuit S
2 to S5 have the same configuration as the sample and hold circuit S1, and the corresponding parts are shown by adding subscripts 2 to 5 to each reference numeral.

The clock signal from the clock generation means 4 is supplied to the counter 5
Given to. The output from the counter 5 is given to the switches SW3 _{1 to} SW3 ₅ of the multiplexer 3, and
Sampling switches for sample hold circuits S1 to S5
It is given to SW1 to SW5. Therefore, when the output from the counter 5 indicates "1" as shown in FIG. 2 (1), the multiplexer 3 is connected as shown in FIG. 2 (2).
The switch SW31 of ₁ and the sampling switch SW1 of the sample hold circuit S1 are electrically connected as shown in FIG. 2 (3). The remaining switches SW3 _{2 to} SW3 ₅ are cut off, and the switches SW2 to SW5 are cut off. Similarly, when the output from the counter 5 indicates "2", the switch SW3 ₂
When the output from the counter 5 indicates "3", the switch SW3 ₃ and the switch SW3 are conducted, and when the output from the counter 5 indicates "4", the switch SW3 ₄ and the switch SW4 are conducted. DOO conducts, when the output from the counter 5 indicates "5" is conductive and the switch SW3 ₅ and switch SW5.

When the switch SW3 ₁ and the switch SW1 are conducted, the dimming level signal from the fader F1 is given to the dimmer D1 via the switch SW3 ₁ , the resistor R, and the sample hold circuit S1. The dimmer D1 energizes the illumination lamp L1 at an energization angle corresponding to the output signal h1 of the sample hold S1. Similarly, switch SW3 ₂ to SW3 ₅ and sampling switch
SW2 to SW5 are turned on in time series, and the dimming level signals of the faders F2 to F5 are applied to the dimmers D2 to D5 in time series through the sample hold circuits S2 to S5. As a result, the dimmers D2 to D5 output the sample hold signals S2 to S5 from the output signals h2 to
Energize the lamps L2 to L5 with an energization angle corresponding to h5.

When the switch SW1 becomes conductive, the resistor R and the capacitor C1 of the sample hold circuit S1 form an integrating circuit. When the remaining switches SW2 to SW5 are turned on, the capacitors C2 to C5 and the resistor R form an integrating circuit. Therefore, the time constant τ = Ci · Ci determined by the holding capacitors C1 to C5 and the resistor R.
The output signals h1 to h5 of the sample hold circuits S1 to S5 are changed by R (here, i = 1, 2, ..., 5). If the sample-hold cycle of the sample-hold circuit S is T, in this embodiment, the dimming level signals from the faders F1 to F5 are processed in time series, so that the time constant of the integrating circuit is equivalent to It is shown by one equation.

τ ′ = (T / t1) · τ = (T / t1) · Ci · R (1) where t1 is the sample time and t2 is the hold time.
Therefore, the cycle becomes T = t1 + t2.

On the other hand, the clock signal from the clock generator 4 is given to the pulse width control circuit 6. This pulse width control circuit 6
The duty of the clock signal is changed according to the operation of the variable resistor VR to which the power supply voltage Vcc is applied. The output n from the pulse width control circuit 6 is given to the sample hold circuits S1 to S5 via the line 1. The signal of the pulse width control circuit 6 given through the line 1 is a so-called prohibition signal and is a sampling switch SW1 to SW5.
Functions to change the conduction time ratio of. The conduction time ratio X is expressed by the second equation.

X = t1 / T (2) More specifically, for example, when the prohibition signal is at the high level during the high level of the signal output from the counter 5 to make the switch SW1 conductive,
During the high level period of the inhibit signal, the switch SW1 is in the cutoff state, and during the remaining period, the switch SW1 is in the conductive state.

As is clear from the first and second equations, by making the variable resistance VR variable, it is possible to change the conduction time ratio X and thereby adjust the charging / discharging time of the hold capacitor Ci. . Therefore, it becomes possible to change the illumination lamps L1 to L5 according to the speed set by the variable resistor VR with respect to the rapid change of the faders F1 to F5.

FIG. 3 is a time chart showing the states of the fader F1, the inhibition signal n, and the output signal h1 from the sample hold circuit S1. Switch of multiplexer 3 from counter 5
SW3 ₁ and the signal waveform applied to the sampling switch SW1 of the sample-and-hold circuit S1 is shown in FIG. 3 (1). In the FIG. 3 (1) high level period W in, switches SW3 ₁ and switch SW1 is turned on.

Here, the inhibition signal n remains in the low level state as shown in FIG. 3 (3), and the fader F1 is kept in the state of FIG.
Assume that a rapid operation is performed at time p1 as shown by. At this time, switches SW3 ₁ and SW1
Is the time when the control signal from the counter 5 goes high
In the high level period W from p2 to time p3, it becomes conductive. As a result, an integrating circuit is formed by the capacitor C1 and the resistor R. Therefore, due to the time constant τ'of the capacitor C1 and the resistor R, the output h1 of the sample hold circuit S1 as shown in FIG. 3 (5) is the fader F1 at the sample time t1 from the time p2 to the time p3. Ascend to reach the set dimming label. In this example, the sample time t1 is the same as the period W.

Next, the case where the inhibition signal n has the waveform shown in FIG. 3 (6) will be described. The inhibition signal n shown in FIG. 3 (6) changes the conduction time of the sampling switch SW1 as shown in FIG. 3 (7). Therefore, as shown in FIG. 3 (8), the output signal h1 of the sample-hold circuit S1 has a sampling time t'from time p2 to time p4.
Then, the constant output state is maintained for a hold period t'2 from time p4 to time p5 at which the next switch SW6 becomes conductive. After that, a similar increase in the dimming level is repeated every cycle T, and the set level of the fader F1 is reached at time pi. As a result, the illumination lamp L1 gradually increases its illumination level in the period from the time p2 to the time pi, and thus achieves a gradual change in brightness even with a rapid change in the fader F1. can do.

In the above example, the illumination lamp for the operation of the fader F1
I explained about the change in lighting of L1.
The same applies to the case of F5 and the illumination lamps L2 to L5. Although only the sample time t1 is changed to adjust the conduction time ratio X of the switch SW, the cycle T may be changed to adjust the conduction time ratio X, or the cycle T and the sample time t '. The configuration may be such that 1 is changed to adjust the conduction time ratio X.

FIG. 4 is an electric circuit diagram of another embodiment of the present invention. This embodiment is similar to the previous embodiment, and corresponding parts bear the same reference numerals. It should be noted that, in this embodiment, the inhibit signal n is applied to the multiplexer 3 instead of being applied to the sampling switches SW1 to SW5 of the sample hold circuits S1 to S5. Even with such a configuration, it is possible to achieve the same effect as that of the above-described embodiment.

FIG. 5 is an electric circuit diagram of still another embodiment of the present invention. This embodiment is similar to the previous embodiment, and the corresponding parts bear the same reference numerals. It should be noted that the data conversion circuit 20 is provided between the counter 5 and the multiplexer 3 in this embodiment. By providing the data conversion circuit 20, the connection relationship between the faders F1 to F5 and the dimming circuits D1 to D5 can be arbitrarily changed.

Effects As described above, according to the present invention, it is possible to change the changing speed of the illumination level of the illuminating lamp with respect to the rapid change of the dimming level of the fader. Further, since the equivalent time constant is increased by performing the time series processing, it is possible to set the time constant for a long time by using a smaller capacitor and resistor.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram of an embodiment of the present invention, FIG. 2 is a time chart showing conduction / interruption states of switches SW3 _{1 to} SW35 of sampler ₃ and sample hold circuits S1 to S5, and FIG. 3 is a fader. F1 and inhibit signal n1 and sample and hold circuit
Time charts showing respective states of the output signal h1 of S2, FIG. 4 is an electric circuit diagram of another embodiment of the present invention, and FIG. 5 is an electric circuit diagram of yet another embodiment of the present invention. 1 ... Dimming control device, 3 ... Multiplexer, 4 ... Clock generator, 5 ... Counter, 6 ... Pulse width control circuit, F1-F5 ... Fader, L1-L5 ... Illumination lamp, S1- S5 ...
… Sample hold circuit, D1 to D5 …… Dimmer, R …… Resistance, VR …… Variable resistance, C1 to C5 …… Capacitor, SW1 to SW
5, SW3 _{1 to} SW3 ₅ ...... Switch

Claims (1)

[Claims] 1. An illumination lamp provided for each channel, an illumination level setting means that is manually operated and provided for each channel, and a multiplexer that switches the output from the illumination level setting means in time series and derives the output. A resistor to which the output from the multiplexer is given and a capacitor which is provided for each channel and which forms an integrating circuit together with the resistor, and which corresponds to the sample and hold circuit for holding the output of this capacitor and the conductive channel of the multiplexer. A means for deactivating the sample-hold circuit, a dimmer for energizing the lamp at an energization angle corresponding to the output of the sample-hold circuit, and an operation period for one of the multiplexer and the immobilizing means are set. A dimming control device comprising means for adjusting.