JPH0682822B2 - Scanning charge input circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A photovoltaic type infrared detection element and a signal processing circuit through a field effect transistor are coupled to perform signal multiplexing inside the element to output an infrared light imaging signal. Regarding the obtained scanning-type charge input circuit, the photovoltaic-type infrared detection element is connected to the source of the field-effect transistor that constitutes the input, with the aim of realizing high injection efficiency coupling with a simple structure. In a scanning type charge input circuit using a charge input circuit for inputting electric charges to the signal processing signal from the drain of the effect transistor, a plurality of detection element substrates of the photovoltaic type infrared detection elements arranged in a matrix are arranged in a line. The substrates of the plurality of photovoltaic infrared detecting elements in the direction orthogonal to the address direction are common, and the substrates of the plurality of photovoltaic infrared detecting elements in the line address direction are separated from each other. A plurality of photovoltaic infrared detection elements in a direction orthogonal to the line address direction are formed on another substrate through an address switch formed on a substrate different from the plurality of detection element substrates. Is connected to the source of the corresponding field effect transistor among the plurality of field effect transistors provided for each column in the direction orthogonal to the line address, and the source potential of the field effect transistor is gained to the separated sensing element substrate with a gain of 1 It is configured such that positive feedback is performed via the following impedance conversion circuit.

[Industrial application field]

The present invention relates to a scanning charge input circuit, and more particularly to a signal processing circuit via a photovoltaic infrared detection element (hereinafter referred to as a PV element) and a MOS field effect transistor (hereinafter referred to as a MOS FET). Combine and perform signal multiplexing inside the element,
The present invention relates to a scanning charge input circuit that obtains an image signal output of infrared light.

An infrared imaging device that obtains a video signal by multiplexing electric charges generated by infrared light detected by PV elements arranged in a matrix in a signal processing circuit has been attracting attention as a next-generation infrared sensor. Is being promoted.

In this infrared imaging device, a charge input circuit for inputting charges (photocurrent) obtained by photoelectric conversion by a PV element to a signal processing circuit is used, and the injection efficiency of the charges is important.

[Conventional technology]

The most general circuit in the charge input circuit used in the conventional infrared imaging device is the charge input circuit having the circuit configuration shown in FIG. 6 (A). In this charge input circuit, the cathode of the PV element 1 is connected to the MOS type field effect transistor (FET) 2
It is called "direct injection type" because it is directly connected to the source diffusion layer of.

The gate of the MOS type FET2 is gate voltage Vg via the input terminal 3.
Is applied, and its drain is connected to a signal processing circuit such as a CCD to which a charge is to be input.

FIG. 6B shows an AC equivalent circuit of the above direct injection type charge input circuit. In the same figure (B), 4 is a current source by the PV element 1, and by receiving the infrared light by the PV element 1,
Photocurrent I ₀ generated output from the current source 4, are respectively divided into an impedance 1 / g _m is the inverse of the transconductance g _m of the internal resistance R ₀ and the MOS type FET2 of the PV element 1.

A current I ₂ flowing through the input impedance 1 / g _m is injected into the signal processing circuit (charge is input). Where this current
I ₂ is given by the following equation, where I ₁ is the current flowing through the internal resistance R ₀ .

Since the band gap of the PV element 1 is narrow, the internal resistance R ₀ is relatively small, on the order of 10 kΩ to 1 GΩ, and its value decreases significantly as the infrared light received has a longer wavelength and the ambient temperature becomes higher. Is known to do.

On the other hand, the input impedance 1 / g _m depends on the shape ratio of the MOS type FET2, but under normal operating conditions, the operating region of the MOS type FET2 is in the weak inversion region. Almost does not depend on the shape ratio.

Therefore, as can be seen from the above equation, the current I ₂ injected into the signal processing circuit is quite small, and this conventional charge input circuit has a problem that injection efficiency is poor and sensitivity is poor.

Therefore, the present inventor has filed a patent application (F2) with the same date as this application.
As shown in FIG. 7 (A), the charge input for positively feeding back the source potential Vs of the MOS type FET 2 to the substrate potential of the PV element 1 via the impedance conversion circuit 5 Suggested a circuit.

The AC equivalent circuit of this proposed circuit is as shown in FIG. 7 (B). 6B, the same components as those in FIG. 6B are designated by the same reference numerals, and the description thereof will be omitted. Fig. 7 (B)
6 is a voltage source obtained by positively feeding back the source potential Vs of the MOS type FET 2 to the substrate potential of the PV element 1, and its output voltage is AVs when the gain of the impedance conversion circuit 5 is A.

In FIG. 7 (B), the following equation is established.

I ₀ = I ₁ + I ₂ (2) Vs = I ₂ / g _m (3) Vs = R ₀ · I ₁ + A · Vs (4) Solve for I ₀ and I ₁ from these equations (2) to (4) When Therefore, when compared with the injection current I _{2 of the} formula (1) of the conventional charge input circuit shown in FIG. 6 (A), R ₀ is 1 / (1-A)
It can be seen that it is doubled.

[Problems to be solved by the invention]

However, providing the charge input circuit shown in FIG. 7 (A) for each PV element makes the structure extremely complicated because there are a large number of PV elements arranged in a matrix (array). Will end up.

The present invention was created in view of the above points, and an object of the present invention is to provide a scanning type charge input circuit that realizes coupling with high injection efficiency with a simple structure.

[Means for solving problems]

FIG. 1 shows the principle configuration of the present invention. In the figure, 8 ₁₁ to 8 _mn are n × n in the line direction (line address direction), m in the direction orthogonal to the line address direction, and m × n in total in a matrix form. Infrared detection element (PV element), 9 _{1 to} 9 _n are detection element substrates, 10 is another substrate, 11
_{1 to} 11 _n constitute an input gate provided for each column orthogonal to the line address direction on another substrate 10 such as a MOS
Type field effect transistors (FETs), 12 _{1 to} 12 _n are impedance conversion circuits, and SW _{11 to} SW _mn are address switches provided in one-to-one correspondence with the PV elements 8 ₁₁ to 8 _mn .

The detection element substrates 9 _{1 to} 9 _n are commonly provided for every _m PV elements 8 ₁₁ to 8 _m1 , ..., 8 _1n to 8 _mn in the direction orthogonal to the line address direction. When,
Each of the n PV elements in the line address direction is provided on a different sensing element substrate.

The address switches SW _{11 to} S _mn , the MOS type FETs 11 _{1 to} 11 _n, and the impedance conversion circuits 12 _{1 to} 12 _n are provided on the same different substrate 10 as the signal processing circuit (not shown).

Multiple m PV elements 8 _1i to 8 _mi on the same sensing element substrate 9 _i
Is commonly connected to the source of the MOS type FET 11 _i via the address switches SW _{1i to} SW _mi, and is also connected to the sensing element substrate 9 _i via the impedance conversion circuit 12 _i .

[Action]

Of m × n PV elements 8 ₁₁ to 8 _mn arranged in a matrix, m PVs in each direction orthogonal to the line address direction.
The sensing element substrate is common to each element, and the MOS type FETs 11 ₁ to ₁ are connected via m corresponding address switches.
It is connected to the corresponding MOS FET of 1 _n , and
It is connected to a common sensing element substrate via a corresponding one impedance conversion circuit among the impedance conversion circuits 12 _{1 to} 12 _n .

Of the address switches SW _{11 to} SW _mn , n address switches SW _{11 to} SW _1n and SW _{21 to} S in the line address direction are provided.
Input terminals 13 _{1 to} 13 _{m for} W _2n , SW _{31 to} SW _3n , ..., SW _{m1 to} SW _mn
On the basis of the switching signal, the switches having the same line address are turned on at the same time, and are turned on in order of line address.

On the other hand, the MOS type FETs 11 _{1 to} 11 _n are sequentially turned on within a period in which n address switches of the same line address are simultaneously turned on based on the gate voltage applied to their gate terminals.

Here, the m PV elements, for example 8 ₁₁ to 8 _m1 is connected to the m-number of address switches SW ₁₁ to SW _m1, the address switch SW ₁₁ to SW _m1 from the input terminal 13 ₁ to 13 _m based on the switching signal, are sequentially turned on and, therefore will not be turned on two or more simultaneously, the photocurrent (electric charge) of from PV element 8 ₁₁ to 8 _m1 among the address switch SW ₁₁ to SW _m1, oN only a photocurrent of any corresponding one of the PV device via an address switch (charge) is supplied to the MOS type FET 11 ₁ source.

Therefore, the source potential of the MOS type FET 11 ₁ is the same as that of the sensing element substrate 9
_Of the m PV elements 8 ₁₁ to 8 _m1 on one, only the photocurrent of one PV element is used, and the photocurrent of two or more PV elements is not mixed. The electric charge can be input from the PV element of and the impedance conversion circuit 12
By positively feeding back to the PV element substrate 9 ₁ via ₁ , the injection efficiency can be improved.

Therefore, the charge input from one PV element and the positive feedback of the source potential to the PV element substrate are performed for each of m PV elements and address switches in the direction orthogonal to the line address direction.
The MOS type FETs 11 _{1 to} 11 _n , the impedance conversion circuits 12 _{1 to} 12 _n, and the detection element substrates 9 _{1 to} 9 _n can be shared.

〔Example〕

FIG. 2 shows a circuit diagram of an embodiment of the main part of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals.
This embodiment illustrates a circuit configuration of only one row orthogonal to the line address direction, in which each cathode of the PV elements 8 ₁₁ to 8 _m1 corresponds to the address switch SW _{11 to} SW _m1.
S-type FET 14 _{11 to} 14 _m1 Common MO via the source and drain
The source of the S-type FET 11 ₁ and the impedance conversion circuit 12 ₁
Are respectively connected to the input ends of the buffer amplifier 15 ₁ .

The buffer amplifier 15 ₁ is a non-inverting amplifier having a gain A of 1 or less, and is composed of, for example, a source follower, an emitter follower, or a voltage follower using an operational amplifier, and its output terminal is connected to the detection element substrate 9 ₁ .

As a result, among the MOS type FETs 14 _{11 to} 14 _m1 , the photocurrent from the one PV element connected to the one MOS type FET that is turned on is the same as that of the one MOS type FET that is turned on. Source,
A common MOS FET that forms the input gate through the drain
Is supplied to the 11 _first source, thereby the source potential generated in the MOS type FET 11 ₁ sources, m-number of PV elements 8 ₁₁ to 8 _m1 including one PV elements selected via the buffer amplifier 15 ₁
Positive feedback to the anode of.

Therefore, the injection efficiency is improved by the same operation principle as that shown in FIG.

Next, the structure of each embodiment of the present invention will be described.
FIG. 4 is a perspective view of an embodiment of the main part of the present invention, and FIG. In both figures, the same components are designated by the same reference numerals.

Figure 3 shows the structure of the sensing element substrate 9 ₁ to 9 _n, illustration of another substrate 10 is omitted. 17 is sapphire, GaAs, Cd
After forming a semiconductor thin film layer made of InSb, HgCdTe, etc. on an insulating substrate made of Te, etc., and patterning it in a strip shape to separate it from other columns, the sensing element substrate
9 _1, 9 ₂ corresponds to detecting the element substrate 18 _1, 18 ₂ are formed.

On detection element substrate 18 ₁ is formed with a photodiode 19 ₁₁ ~ 19 _m1 corresponding to PV element 8 ₁₁ to 8 _m1, likewise also on the sensing element substrate 18 ₂ photodiodes 19 ₁₂ ~ 19 _{m @ 2} is formed There is. Further, 20 ₁ and 20 ₂ are impedance conversion circuits 12
Input terminal to which signals from ₁ and 12 ₂ are input.
The source potentials of T11 ₁ and 11 ₂ are fed back and input.

FIG. 4 is a side view showing the sensing element substrate shown in FIG. 3 together with a substrate 25 corresponding to another substrate 10. The same components as those in FIG. 2 are designated by the same reference numerals. The sensing element substrate 18 ₁ is InSb,
It is a P-type substrate made of HgCdTe, etc., on which an n ⁺ region 21
_{11 to} 21 _m1 are formed, and these photodiodes are
19 _{11 to} 19 _m1 (PV elements 8 ₁₁ to 8 _m1 ) are configured.

A thin film 22 made of SiO ₂ , ZnS or the like is formed on the sensing element substrate 18 ₁ , and a n ⁺ region 21 is formed by a bump electrode 23 made of In or the like through a contact hole formed in the thin film 22.
_{11 to} 21 _m1 and the sources of the MOS type FETs 14 _{11 to} 14 _m1 formed on the substrate 25. The output terminal of the buffer amplifier 15 ₁ formed on the substrate 25 is connected to the detection element substrate 18 ₁ by the bump electrode 24.

Infrared light is incident on the back surface of the insulating substrate 17 from above in FIG. 4 to generate minority carriers.

In FIG. 4, for convenience of illustration, the substrate 25 has a row of address-switching MOS type FETs 14 _{11 to} 14 _m1 and a buffer amplifier.
Although only 15 ₁ and the MOS type FET 11 ₁ are shown, it is needless to say that a total of n columns of similar circuits are formed in parallel.

By the way, the method for separating the substrate is not limited to the method of patterning the semiconductor thin film layer formed on the insulating substrate 17 into a strip shape as shown in FIG. 3, but may be the method shown in FIG.

That is, as shown in FIG. 5, by using an infrared detecting material (InSb, HgCdTe, etc.), the scanning circuits such as the MOS type FETs _{11 1} , 14 _{11 to} 14 _{m 1} , and the buffer amplifier 15 ₁ are arranged in parallel for a total of n columns. On the formed silicon (Si) substrate 25, a thin band-shaped detection element substrate 27 _{1 to} 27 _n (however, 27 ₂ to 2 in FIG. 5 is used.
7 _n is omitted in the drawing) to form a scanning charge input circuit.

In FIG. 5, 28 _{11 to} 28 _m1 are photodiodes corresponding to the PV elements 8 ₁₁ to 8 _m1 , and these photodiodes 28 _{11 to} 28 _m1 are before bonding the detection element substrate 27 ₁ onto the Si-scanning circuit substrate 25. It does not matter whether it is formed in advance or after being adhered.

In the case of this embodiment, infrared light is incident from above the detection element substrate such as 27 ₁ .

Although the MOS type FET has been described in the embodiments, the same effect can be obtained with the junction type FET.

〔The invention's effect〕

As described above, according to the present invention, the input gate, the impedance conversion circuit, and the sensing element substrate have a common structure for each of a plurality of PV elements in the direction orthogonal to the line address direction. Using a circuit, it is possible to realize a high injection efficiency coupling between the PV element array and the input of the MOS FET of the input gate with a simple structure, especially in the red light operating under long wavelength infrared light and high temperature conditions. It has features such as being particularly suitable when applied to an external imaging device.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a circuit diagram of an example of an essential part of the present invention, FIG. 3 is a perspective view of an example of an essential part of the present invention, and FIG. FIG. 5 is a side view showing a schematic configuration of one embodiment of the invention, FIG. 5 is a perspective view of another embodiment of the essential part of the present invention, FIG. 6 is a circuit diagram of an example of a conventional charge input circuit, and FIG. It is a circuit diagram of an example of the charge input circuit which this inventor proposed. In the figure, 8 ₁₁ to 8 _mn are photovoltaic type infrared detection elements (PV elements), 9 _{1 to} 9 _n , 18 ₁ , 18 ₂ and 27 ₁ are detection element substrates, 10 is another substrate, and 11 ₁ to 11 _n , 14 _{11 to} 14 _m1 are MOS field effect transistors (FE
T), 12 _{1 to} 12 _n are impedance conversion circuits, 13 _{1 to} 13 _m are switching signal input terminals, 15 ₁ is a buffer amplifier, and SW _{11 to} SW _mn are address switches.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor, Kajuya Kubo 1015, Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Nobuyuki Kajiwara, 1015, Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited

Claims (1)

[Claims] 1. A photovoltaic infrared detecting element (8 ₁₁ ~8 _mn),
In a scan-type charge input circuit, which is connected to the sources of field effect transistors (11 _{1 to} 11 _n ) forming an input and inputs charges from a drain of the field effect transistors (11 _{1 to} 11 _n ) to a signal processing circuit, a matrix a number of photovoltaic infrared detecting sensing element substrate element (8 ₁₁ ~8 _mn) arranged in Jo (9 ₁ ~9 _n), a plurality of photovoltaic in the direction perpendicular to the line address direction infrared detection device _{(8 11 ~8 m1, ...,} 8 1n ~8 mn) in a common substrate of, and, a plurality of photovoltaic infrared detecting elements of the line address direction (8 ₁₁ ~8 _1n, 8 _{21 ~8 2n, ..., 8 m1} ~8 substrate _mn) is formed so as to separate from each other, the direction of the plurality of photovoltaic infrared detecting element (eight hundred and eleven to eight _m1 perpendicular to the line address direction, ... , 8 _1n to 8 _mn ) are addresses formed on a substrate (10) different from the plurality of sensing element substrates (9 _{1 to} 9 _n ). Switch (SW _{11 to} S _m1 , ..., SW _{1n to} SW _mn )
Connected to the source of the corresponding field effect transistor among the plurality of field effect transistors (11 _{1 to} 11 _n ) provided for each column orthogonal to the line address direction on the other substrate (10) via Positive feedback of the source potential of the field effect transistors (11 _{1 to} 11 _n ) to the separated sensing element substrate (9 _{1 to} 9 _n ) via an impedance conversion circuit (12 _{1 to} 12 _n ) having a gain of 1 or less. A scanning charge input circuit characterized by: