JPH073869B2 - Charge input circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A charge input circuit for an infrared detection element, in which a photovoltaic type infrared detection element and a signal processing circuit are combined to perform signal multiplexing inside the element, and injection efficiency is improved. In the charge input circuit, in which the photovoltaic type infrared detection element is connected to the source of the field effect transistor, and the charge is input from the drain of the field effect transistor to the signal processing circuit, the source of the field effect transistor The potential is fed back to the substrate potential of the photovoltaic infrared detecting element through an impedance conversion circuit having a gain of 1 or less.

[Industrial application field]

The present invention relates to a charge input circuit, and more particularly to a charge input circuit for an infrared detection element that couples a photovoltaic infrared detection element (hereinafter referred to as a PV element) and a signal processing circuit to multiplex signals inside the element. .

PV element and Charge Coupled Device (CC)
Infrared detectors that combine signal processing circuits such as D) to multiplex signals inside the device are attracting attention as next-generation infrared sensors and are being researched and developed.

In this infrared detection element, the electric charge (photocurrent) obtained by photoelectric conversion by the PV element is injected into the signal processing circuit via the field effect transistor, so that the injection efficiency is important.

[Conventional technology]

The most common type of conventional charge input circuit is the ninth
It is a charge input circuit having the circuit configuration shown in FIG. This charge input circuit is called a "direct injection type" because the cathode of the PV element 1 is directly connected to the source diffusion layer of the MOS field effect transistor (FET) 2.

The gate of the MOS type FET2 is gate voltage Vg via the input terminal 3.
Is applied, and its drain is connected to a signal processing circuit such as a CCD to which a charge is to be input.

FIG. 9B shows an AC equivalent circuit of the above direct injection type charge input circuit. In the same figure (B), 4 is a current source by the PV element 1, and by receiving the infrared light by the PV element 1,
Photocurrent I ₀ generated output from the current source 4, are respectively divided into an impedance 1 / gm is the inverse of the mutual conductance gm of the internal resistance R ₀ and the MOS type FET2 of the PV element 1.

The current I ₂ flowing through the input impedance 1 / gm is injected into the signal processing circuit (charge is input). Where this current
I ₂ is given by the following equation, where I ₁ is the current flowing through the internal resistance R ₀ .

[Problems to be Solved by the Invention] The internal resistance R ₀ is relatively small, on the order of 10 KΩ to 1 GΩ, because the band cap of the PV element 1 is narrow, and its value is that the infrared light received has a long wavelength. Also, it is known that the higher the ambient temperature is, the lower the temperature becomes.

On the other hand, the input impedance 1 / gm usually depends on the shape ratio of the MOS type FET2, but under normal operating conditions, the operating region of the MOS type FET2 is in the weak inversion region, and for such a minute level current, Almost does not depend on the shape ratio.

Therefore, as can be seen from the above equation, the current I ₂ injected into the signal processing circuit is considerably small, and this conventional charge input circuit has a problem that injection efficiency is poor and sensitivity is poor.

The present invention was created in view of the above points, and an object thereof is to provide a charge input circuit that can improve injection efficiency.

[Means for solving problems]

FIG. 1 shows a principle block diagram of the present invention described in claim 1. In FIG. 1A, the same components as those in FIG. 9A are designated by the same reference numerals. In FIG. 1 (A),
The source potential Vs of the field effect transistor 2a has a gain A of
It is fed back to the substrate potential of the PV element 1 through the impedance conversion circuit 5 of 1 or less.

FIG. 2 shows a principle block diagram of the present invention as set forth in claim 2. In the figure, the same components as those in FIG. 1A are designated by the same reference numerals, and the description thereof will be omitted.

In FIG. 2, the present invention provides a low-pass filter 7 in the feedback path for feeding back the source potential Vs of the FET 2 to the substrate potential of the PV element 1 via the impedance conversion circuit 5.

[Action]

The AC equivalent circuit of the circuit of the present invention shown in FIG. 1 (A) is as shown in FIG. 1 (B). FIG. 9 (B) in FIG. 9 (B)
The same components as in FIG. In FIG. 1 (B), 6 is the source potential Vs of the FET 2a.
Is a voltage source obtained by inputting positive feedback to the substrate potential of the PV element 1, and its output voltage is AVs when the gain of the impedance conversion circuit 5 is A.

In FIG. 1 (B), the following equation holds.

I ₀ = I ₁ + I ₂ (2) Vs = I ₂ / gm (3) Vs = R ₀ · I ₁ + A · Vs (4) Solving for I ₀ and I ₂ from these equations (2) to (4) Therefore, it is understood that R ₀ is improved by 1 / (1-A) times as compared with the injection current I ₂ of the circuit (1) shown in FIG. 9 (A) of the related art.

A is 1 or less. For example, if A = 1, then I ₂ = I ₀ , I ₁
= 0, and the maximum injection efficiency is obtained.

As described above, in the circuit of the present invention shown in FIG. 1 (A), the source potential Vs of the transistor 2a is fed back to the substrate potential of the PV element 1 to change the operating point according to the input photocurrent I ₀ and keep it constant. It enables operation at the operating point.

Next, the circuit of the present invention shown in FIG. 2 reduces the feedback gain in the high frequency region by the low pass filter 7, thereby reducing the injection efficiency of the high frequency component and improving the S / N ratio. .

That is, the circuit of the present invention shown in FIG.
The white noise, which is the dominant noise of the PV element 1, is also efficiently injected. Therefore, the sensitivity is improved,
S / N ratio is improved against external noise, but S / N of PV element 1
It does not contribute to the improvement of the ratio.

White noise is added and increased due to the aliasing effect during multiplexing in, for example, the horizontal transfer register in the signal processing circuit, and thus the S / N ratio of the image signal output from the horizontal transfer register is significantly deteriorated.

Therefore, in the present invention shown in FIG. 2, the low-pass filter 7 reduces the injection efficiency of high-frequency components.

The injection current I 2 in FIG. ₂ is expressed by the following equation.

When operating a PV element that receives long-wavelength infrared light or at high temperature,
The internal resistance R ₀ is extremely low and can be gm · R ₀ 1. Therefore, assuming that A = 0.9, the injection efficiency η shown by the coefficient of I _{0 in} the equation (6) is 91% in the pass frequency region of the low pass filter 7 when gm · R ₀ = 1.

On the other hand, in the high frequency region blocked by the low-pass filter 7, it can be regarded as A0 substantially, so that the injection efficiency η is 50%. Therefore, by selecting the cutoff frequency (corner frequency) of the low-pass filter 7 as a value that allows the input signal to pass, high-frequency white noise is reduced to about 1 /.
Can be suppressed to 2.

〔Example〕

FIG. 3 shows a circuit diagram of a first embodiment of the present invention corresponding to the invention shown in FIG. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted. In FIG. 3, 10 is a MOS which constitutes the impedance conversion circuit 5.
Type FET, whose gate is the source of MOS type FET2 and PV element 1
Respectively connected to the cathodes of.

Further, 11 is a MOS type FET 10 which is a load of the MOS type FET 10, and its drain is connected to a common connection point between the source of the MOS type FET 10 and the PV element 1.

A structural sectional view of the first embodiment of the present invention is shown in FIG.
In the figure, 1 is a PV element, which is an n ₊ diffusion layer 13 formed on a P-type substrate 12 such as InSb (indium antimony), PbSnTe (lead tin telluride), HgCdTe (mercury cadmium telluride), and the like. It is composed of an insulating thin film 14 such as SiO ₂ (silicon oxide film) or ZnS (zinc sulfide film) formed on the above.

On the other hand, two P wells 16 and 17 are formed on the n-type silicon (Si) substrate 15, and an n ₊ diffusion layer is formed in the P well 16.
18, 19 and 20 are formed. An n ₊ diffusion layer 21 is formed in the other P well 17, and this n ₊ diffusion layer 21 constitutes the source region of the MOS type FET 2 and also constitutes an input diode together with the P well 17. ing.

An oxide film 22 made of SiO ₂ is formed on the n-type Si substrate 15 in which the above regions are formed by a known method, and gate electrodes 23 and 24 of polycrystalline silicon or the like and an input gate are further formed thereon. An electrode 25, a storage gate 26, an electrode 27 forming a part of the CCD, and the like are formed.

The drain of the MOS type FET 2 corresponding to the above-mentioned FET 2a corresponds to the region of the P well 17 immediately below the storage gate 26, and the gate corresponds to the input gate electrode 25. Further, the n ₊ diffusion layer 18 corresponds to the drain of the MOS type FET 10, and since the source of the MOS type FET 10 and the drain of the MOS type FET 11 are always at the same potential, both are shared by the n ₊ diffusion layer 19. It is configured.
Further, the n ₊ diffusion layer 20 corresponds to the source of the MOS type FET 11.

In such a configuration, the photocurrent generated by the infrared light received by the PV element 1 is supplied from the n ₊ diffusion layer 13 to the n ₊ diffusion layer 21, and further passes through the region of the P well 17 directly below the input gate electrode 25 to form the storage gate. The signal charge is accumulated in the potential well in the region of the P well 17 immediately below 26. Here, the n ₊ diffusion layer 21, and the potential well immediately below the gate electrodes 25 and 26 substantially form the MOS type FET 2. This signal charge is then transferred to the CCD.

The source potential Vs in the n ₊ diffusion layer 21 is fed back to the P-type substrate 12 of the PV element 1 via the gate electrode 23, the n ₊ diffusion layer 19 and the connection line 28. As a result, the injection efficiency of this embodiment is improved as compared with the conventional circuit (for example, the MOS type FETs 10 and 11 in FIG. 3 constitute a source follower, and the gain A thereof is about 0.9. As you can see, R ₀ is improved more than 10 times.)

This will be described in more detail with reference to FIG. When the infrared light from the object to be detected is not incident on the PV element 1, the source potential Vs and the PV element current have characteristics as shown by I in FIG. At this time, even if there is no target to be detected, a direct current indicated by I _B in FIG. 5 is generated due to background light or the like.

On the other hand, when the input gate voltage Vg is set to a predetermined constant value, MO
The input source voltage Vs vs. output current characteristic of S-type FET2 is shown in Fig.
As shown by I, the intersection A with the curve I is the operating point when there is no target to be detected.

Next, when infrared light from the target to be detected is incident on the PV element 1, in the conventional charge injection circuit, the source voltage Vs
As shown by the solid line III in FIG. 5, the current characteristic with respect to the PV element is a characteristic obtained by moving the AC current I _{0 in} parallel with the solid line I. Therefore, as shown by B in FIG. 5, the operating point at this time is at a position where the injection current is increased by I ₂ as compared with the operating point when there is no light input.

On the other hand, in this embodiment, when the infrared light from the object to be detected is incident on the PV element 1, the source voltage vs. PV element current characteristic is as shown by the alternate long and short dash line IV in FIG.
Is smaller than that in the conventional circuit, and the substrate potential of the PV element 1 is also moved to a smaller one with a certain gain. Therefore, the operating point in this embodiment is as shown by C, and the injection current at this time is I ₀ (> I ₂ ) is larger than when there is no light input. Therefore, according to this example, it is understood that the injection efficiency is improved as compared with the conventional case.

Next, another embodiment of the present invention will be described. Figure 6 is second
The circuit diagram of 2nd Example of this invention corresponding to the invention shown in the figure is shown. In the figure, the same components as those in FIG. 3 are designated by the same reference numerals, and the description thereof will be omitted.

In FIG. 6, the capacitor C ₁ has one end connected to the substrate (anode) of the PV element 1 and the other end grounded. As a result, this capacitor C ₁ and the source follower MOS type FET 10
7 and the impedance of the MOS-type FET 11 constitute a low-pass filter 7 which imparts a frequency characteristic as shown in FIG. 7 to the voltage extracted from the source of the MOS-type FET 10.

FIG. 8 shows a circuit diagram of a third embodiment of the present invention in which a resistor R ₁ is further added to the embodiment shown in FIG. In the figure, R ₁ is a resistor, one end of which is connected to the source of the FET 10 and the drain of the FET 11, and the other end of which is connected to the capacitor C ₁ and the substrate of the PV element, respectively. The resistor R ₁ is a resistor for defining the frequency characteristic of the low pass filter 7. The low-pass filter characteristic can be realized without the resistor R ₁ as shown in Fig. 6, but R ₁
The capacitor C ₁ terminal voltage will be more stable if the capacitor is inserted.

According to this embodiment, as in the second embodiment, since the source potential Vs is fed back to the substrate potential of the PV element 1 after the low-pass filter characteristic is given, the dominant noise of the PV element 1 is reduced. It is possible to reduce the injection efficiency of the high frequency component of a certain white noise, and thereby improve the S / N ratio.

The impedance conversion circuit 5 is not limited to a source follower, and an emitter follower may be used, and the low pass filter 7 may reduce frequency characteristics in a high band by determining various constants at the time of circuit design. The impedance conversion circuit 5 and the low-pass filter 7 can be integrated by making the operational amplifier have a low-pass filter characteristic.

Further, also in the second and third embodiments, the MOS type FET 2, the impedance conversion circuit 5, the signal processing circuit, the low-pass filter 7 and the like can be formed on the same substrate as in the first embodiment.

Furthermore, in the present embodiment, the description has been given using the MOS type FET2,
Of course, a junction type FET or the like has the same effect.

〔The invention's effect〕

As described above, according to the present invention, since the source potential is fed back to the substrate potential of the PV element, the operating point is changed according to the input photocurrent.
It is possible to obtain the same effect of improving the injection efficiency that is improved by more than double, and it is extremely effective especially when applied to PV elements that detect long-wavelength infrared light and PV elements that operate at high temperatures. Since the low-pass filter is provided in the positive feedback path to the substrate of the device to reduce the injection efficiency of the high frequency component of white noise, it is possible to improve the S / N ratio of the PV device. It is effective in reducing aliasing noise when multiplexing in a signal processing circuit that consists of a CCD, etc., in which a plurality of them are regularly provided, and those charges are input in parallel and output in series in time series. It has many features such as certain features.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle configuration of the present invention, FIG. 2 is a diagram showing another principle configuration of the present invention, FIG. 3 is a circuit diagram of a first embodiment of the present invention, and FIG. 4 is a diagram showing the present invention. 1 is a structural sectional view of an embodiment, FIG. 5 is a voltage-current characteristic diagram schematically showing injection efficiency, FIG. 6 is a circuit diagram of a second embodiment of the present invention, FIG. 7 is a filter characteristic of FIG. FIG. 8 shows an example, FIG. 8 shows a circuit diagram of a third embodiment of the present invention, and FIG. 9 shows a circuit diagram of an example of a conventional charge input circuit. In the figure, 1 is a photovoltaic infrared detection element (PV element), and 2, 10 and 11 are MOS
Type field effect transistor (FET), 2a is a field effect transistor (FET), 4 is a current source, 5 is an impedance conversion circuit, 6 is a voltage source, 7 is a low-pass filter, C ₁ is a capacitor, and R ₁ is a resistor. .

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor, Kajuya Kubo 1015, Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Nobuyuki Kajiwara, 1015, Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited

Claims (4)

[Claims] 1. A charge input circuit for connecting a photovoltaic infrared detection element (1) to a source of a field effect transistor (2a) and inputting a charge from a drain of the field effect transistor (2a) to a signal processing circuit. The source potential of the field effect transistor (2a) is fed back to the substrate potential of the photovoltaic infrared detection element (1) through an impedance conversion circuit (5) having a gain of 1 or less. Charge input circuit. 2. The charge input circuit according to claim 1, wherein the field effect transistor (2a), the signal processing circuit and the impedance conversion circuit (5) are formed on the same substrate. 3. A charge input circuit for connecting a photovoltaic infrared detecting element (1) to a source of a field effect transistor (2a) and inputting a charge from a drain of the field effect transistor (2a) to a signal processing circuit. At the same time, the source potential of the field effect transistor (2a) is fed back to the substrate potential of the photovoltaic infrared detection element (1) through an impedance conversion circuit (5) having a gain of 1 or less, and the feedback path is A charge input circuit having a low-pass filter (7) provided therein. 4. The field effect transistor (2a), the signal processing circuit, the impedance conversion circuit (5), and the low-pass filter (7) are formed on the same substrate. The charge input circuit described.