JPH07104392B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and more particularly to a structure for inspecting a semiconductor device.

[Conventional technology]

In recent years, as the scale of integrated circuits has increased, the so-called standard cell method has come to be regarded as important as a method of integrating circuit functions. The standard cell method is a circuit that has a relatively large number of functions in advance when the required functions are integrated (for example, a multiplication circuit or an accumulator, and such a circuit will be referred to as a "cell" hereinafter). .) Is prepared and an integrated circuit is designed by combining these cells.

Recently, the functions required for integrated circuits have diversified, and the circuit configurations have become complicated and large-scale.
(Computer-Aided-Design) technology has been used to develop integrated circuits by the standard cell method. In such an integrated circuit, it is necessary to check whether the desired function is achieved.
This inspection is difficult for standard cell type integrated circuits.

FIG. 3 is a plan view showing a simplified basic configuration of a standard cell type LSI chip. This LSI chip 1 is usually made of plastic or ceramics.
It is mounted on an LSI package (not shown) for easy handling. This LSI chip 1 is formed by forming elements such as switching elements and wiring conductors on a semiconductor substrate. The LSI chip 1 is formed with a bonding pad 2 connected to the element or the like by a wiring conductor such as a thin aluminum layer, and this bonding pad 2 and an external connection terminal (not shown) provided in the LSI package.
A thin gold wire having a diameter of about 25 μm or the like (not shown) is used to connect between and.

Reference numerals 3 and 4 are the standard cells described above, and although only two cells are shown in FIG. 3, usually a considerable number of standard cells are provided. The cells 3 and 4 are connected by an interconnection bus 7, and these cells 3 and 4 lead signals corresponding to the signals input from the bonding pad groups 5 and 6 to the bonding pads 8 and 9, respectively.

When the LSI chip 1 is defective and cannot perform its function normally, if such an LSI chip 1 is sealed in an LSI package, the yield of the integrated circuit is deteriorated and the cost is reduced. Cause an increase. Therefore, the function of the LSI chip 1 is usually inspected before the LSI chip 1 is sealed.

When inspecting the function of this LSI chip 1, the pad group
5 and 6 respectively (4) (1), (2); (3),
Input the test signal shown in (4) and correspond to the signal derived to the pads 8 and 9 and the test signal from the pad groups 5 and 6 when the cells 3 and 4 are functioning normally. This is done by comparing the signal expected to be delivered to pads 8,9. The waveform of the test signal shown in FIG. 4 is an example, and should be appropriately set by the designer of the LSI chip 1.

The inspection of the function of the above-described LSI chip 1 will be described in more detail with a simple example. For example, the cell 3 shown in FIG.
It is assumed that the cell 4 has the circuit function shown in FIG.
Has the circuit function shown in FIG. 5 (2). In the following, the circuit functions of the cells 3 and 4 are referred to as function [A] and function [B], respectively.

For example, when the function [A] is checked when the cell 3 shown in FIG. 5 exists independently, the input terminals a, b, c of the cell 3 are connected to the input terminals a, b, c of FIG. ) And (3) may be input respectively. The signal that is expected to be delivered to the output terminal d at this time is shown in FIG. 6 (4), and therefore the signal actually delivered and the signal shown in FIG. 6 (4) should match. It can be seen that cell 3 is operating properly, and if they do not match, cell 3 is defective.

Similarly, when the function [B] is inspected when the cell 4 exists alone, the test signal shown in, for example, FIG. 6 (5) is applied to the input terminal e and derived to the output terminal f. The signal may be compared with the signal shown in FIG. 6 (6).

The signals shown in FIG. 6 are shown as a truth table in Tables 1 and 2 below.

In the actual circuit shown in FIG. 3, cells 3 and 4 are connected by an interconnection bus 7. At this time, for example, the cells 3, 4
It is assumed that the circuit shown in FIG. 7 is configured by the connection of 1 and the new function [C] is realized by the connection of the cells 3 and 4.

The truth table of the circuit shown in FIG. 7 is shown in Table 3 below.

That is, the circuit function [C] shown in FIG. 7 inputs the test signal corresponding to the truth table to the terminals a, b and e, and the signal shown in the truth table outputs the output terminal d, It can be checked by observing whether or not f is available.

[Problems to be Solved by the Invention]

As described above, when inspecting the circuit function of the LSI chip 1, the test signal corresponding to the function [C] obtained by combining the functions [A] and [B] of the cells 3 and 4 is input. For example, in a large-scale LSI chip that uses several tens of standard cells of each type, a great deal of time and labor is required to create the test signal. In addition, because it is necessary to create a test signal corresponding to each LSI chip with different specifications, and in addition, there are restrictions on the number and types of terminals to which the test signal can be added, the functions of the LSI chip are limited. Inspection was extremely difficult.

An object of the present invention is to provide a semiconductor device in which the function inspection is significantly facilitated.

[Means for Solving the Problems]

The semiconductor device of the present invention is provided with a plurality of standard cells, switching means for connecting / disconnecting the standard cells, and each standard cell.
It is provided with a storage means for storing a test signal for inspecting the function of the cell, and when inspecting the function, the switching means cuts off between standard cells, and each standard cell corresponds to this standard cell. The test signal is provided from the storage means provided.

[Action]

According to the configuration of the present invention, for each standard cell,
Storage means for storing a test signal for testing each function of each standard cell is provided. Switching means for connecting / disconnecting the standard cells is provided between the standard cells to be connected to each other, and when the function of the semiconductor device is inspected, the switching means is the standard cells to be connected to each other. Isolate each standard cell by blocking the gap. In this way, each standard
Each standard cell can be inspected by inputting the test signal from the storage means to the corresponding standard cell in a state where the cells are independent.

Thus, according to the present invention, the function of the semiconductor device is inspected by individually inspecting each standard cell. After the inspection of the function, the switching means connects the standard cells to be connected to each other, thereby achieving the connection for realizing the function of the semiconductor device as a whole.

〔Example〕

FIG. 1 is a plan view showing a simplified structure of an LSI chip 10 which is a semiconductor device according to an embodiment of the present invention. This first
In the figure, parts that are the same as the parts shown in FIG. 3 are given the same reference numerals.

This LSI chip 10 is provided with a plurality of standard cells, and only two of the standard cells 3 and 4 (hereinafter referred to as "cells 3 and 4") are shown in FIG. . A switching means 34 for connecting / disconnecting the cells 3 and 4 is provided between the cells 3 and 4. The switching means 34 and the cell 3 are connected by a bus 11, and the switching means 34 and the cell 4 are connected by a bus 12.

Switching means similar to the switching means 34 is provided between the standard cells to be mutually connected in the plurality of standard cells including the cells 3 and 4. A ROM (Read Only Memory) storing test signals for inspecting each function of each standard cell is provided in association with each of the plurality of standard cells. The ROMs corresponding to are indicated by reference numerals 31 and 41, respectively.

The switching means 34 is composed of a tri-state circuit or the like when the LSI chip 10 is manufactured by a MOS process, for example. This switching means 34 is the LSI chip 1
When performing the inspection of the function of 0, the cells 3 and 4 are cut off, and after the inspection is completed, the cells 3 and 4 are connected.

The function of the LSI chip 10 is inspected by inputting a test signal from the ROMs 31 and 41 provided corresponding to the cells 3 and 4 in a state where the cells 3 and 4 are cut off by the switching means 34. The output signals of the cells 3 and 4 are monitored. This output signal is monitored by, for example, the ROM 31, 41
In addition, when each output signal of the cells 3 and 4 expected for the input of the test signal is stored, it is realized by detecting the coincidence between the stored output signal and the actual output signal.

The inspection of the function of the above-described LSI chip 10 will be described in more detail with a simple example. For example, assume that the cells 3 and 4 shown in FIG. 1 each have the circuit function shown in FIG.
The test signal from the ROM 31 is input from the input terminals T11, T12, T13, and the test signal from the ROM 41 is input from the input terminal T14. Switching means S1 and S2 are provided between the input terminals T11 and T12 and the input terminals T1 and T2 of the cell 3, respectively,
To the input terminal T3 connected to the bus 11, the output signal of the cell 4 from the bus 12 and the test signal from the input terminal T13 are switched by the switching means 34 and given. A switching means S4 is provided between the input terminal T14 and the input terminal T4 of the cell 4.

When inspecting the LSI chip 10, the switching means S1,
S2 and S4 are made conductive, and the switching means 34 connects the input terminal T3 to the input terminal T13 side. This makes ROM in cell 3
Each test signal from the ROM 41 is input to the cell 4 from 31. An example of a test signal input to the input terminals T1 to T3 of the cell 3 and the input of this test signal to the cell 3
The signal derived at the output terminal T5 of the cell 3 when the function of is normal is shown in the following Table 4 as a truth table, and a similar truth table for the cell 4 is shown in Table 5 below. It is shown. Note that T6 is the output terminal of the cell 4.

Therefore, it is possible to judge whether the functions of the cells 3 and 4 are normal by monitoring whether or not the signals shown in Table 4 or Table 5 are derived at the output terminals T5 and T6. .

After it is confirmed that the functions of all the standard cells including the cells 3 and 4 are normal as a result of such inspection, the switching means S1, S2 and S4 are shut off and the switching means 34 is connected to the input terminal. It can be switched to connect T3 to the bus line 12 side. After this, the LSI chip 10 is sealed in an LSI package or the like.

As described above, in this embodiment, the standard cells are cut off by the switching means such as the switching means 34 to make each standard cell independent, and the function of each standard cell is inspected. The function is tested. This inspection is, so to speak, an approximate inspection of the overall function of the LSI chip 10. However, since the inspection points are subdivided, it is easier to find a failure point. Moreover, in the conventional inspection of the function of the LSI chip, in consideration of the fact that the degree of freedom of the test signal is actually small due to the limitation of the number of terminals and its type, the accuracy thereof is limited. It is understood that the inspection accuracy in the example is significantly improved.

The test signals stored in ROM31, 41, etc. can be standardized for each type of standard cell.
It is not necessary to create a new IC chip each time it is developed, and this makes the inspection of the LSI chip much easier.

〔The invention's effect〕

As described above, according to the semiconductor device of the present invention, the inspection of each standard cell constituting the semiconductor device is made independent by the switching means, and each independent standard cell is converted into each standard cell. This is done by inputting the test signal from the correspondingly provided storage means, and the entire semiconductor device is inspected in this way. Therefore, a new test signal is added every time the design of the semiconductor device is changed. Therefore, the semiconductor device can be inspected remarkably easily.
Moreover, since the semiconductor device inspection is subdivided into standard cells, so to speak, it becomes easier to find a failure point and the inspection accuracy can be improved, and the degree of freedom of inspection can be further increased. Can be increased.

[Brief description of drawings]

FIG. 1 is a plan view showing a simplified basic configuration of an LSI chip 10 which is a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a block diagram for explaining a method of inspecting the LSI chip 10. FIG. 3 is a simplified plan view showing the basic configuration of a prior art LSI chip 1, FIG. 4 is a waveform diagram showing an example of a test signal input to the LSI chip 1, and FIG.
A block diagram showing an example of each function of the standard cells 3 and 4 of the LSI chip 1, and FIG. 6 shows a test signal to be input to the standard cells 3 and 4 shown in FIG. 5 and an output signal corresponding thereto. Waveform diagram shown in Fig. 7, standard cell
FIG. 3 is a block diagram showing a circuit function configured by connecting 3, 4; 10 …… LSI chip (semiconductor device), 3,4 …… Standard cell, 31,41 …… ROM (storage means), 34 …… Switching means

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Claims (1)

[Claims] 1. A plurality of standard cells, switching means for connecting / disconnecting between the standard cells, and each standard cell provided for each standard cell.
It is provided with a storage means for storing a test signal for inspecting the function of the cell, and when inspecting the function, the switching means cuts off between standard cells, and each standard cell corresponds to this standard cell. A semiconductor device adapted to receive a test signal from the storage means provided.