JPH0716096B2 - Method for manufacturing multilayer printed wiring board - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a multilayer printed wiring board, and in particular, multilayer printing partially having through holes formed by dividing conductor layers for high-density mounting. The present invention relates to a method for manufacturing a wiring board.

[Conventional technology]

The density of multilayer printed wiring boards (hereinafter referred to as “multilayer boards”) is increasing in order to achieve high integration of LSIs and ICs, high performance of electronic devices, and improvement of economic efficiency.

Two main measures are taken to increase the density of multilayer boards. The first is the increase in the number of conductor layers, that is, the increase in the number of layers, and the second is the increase in the number of wirings between the basic lattices. However, in the first measure, the number of via holes connecting the conductor layers between the layers is increased, and the second measure increases the number of wirings, and the wiring accommodability is significantly limited. Therefore, in particular, when this via hole is provided as a through hole in the multilayer plate, it is dealt with by reducing the diameter of the via hole, but the plate thickness / hole diameter ratio (aspect ratio) is increased to improve the productivity of the multilayer plate. It is significantly hindered.

Therefore, as a means for solving the above-mentioned drawbacks, as shown in FIG. 2 (A), two sets of the catalyst-containing insulating substrates 2 on which the conductor circuit patterns 1 are formed are arranged in the outermost layers, respectively.
As shown in FIG. 2 (B), an insulating substrate 3 without catalyst and a prepreg 4 with catalyst provided therein are provided with a hole 14 which is hollowed out in a concentric circle having a diameter larger than the diameter of the through hole of the multilayer plate. To heat and pressurize to form the multilayer substrate 6, and to form through holes 7a and 7b at predetermined positions of the multilayer substrate 6 as shown in FIG. 2 (C). As shown in FIG. 2D, the catalyst-containing insulating substrate 2 on the inner wall of the through hole 7a of the multilayer substrate 6
Conductor layer which is electrically connected to the end face of the conductor circuit pattern 1 on the end face
There is an example in which high density is achieved by selectively forming divided via holes 11 and normal through holes 12 through a step of forming 10 by electroless plating (Japanese Patent Application No. 61-61).
-029361).

[Problems to be Solved by the Invention]

However, in the above-mentioned conventional manufacturing method, in order to provide a hole formed in a concentric circle having a diameter larger than the diameter of the through hole at the drilling position of the through hole for forming a normal through hole on the insulating substrate without a catalyst inside the multilayer substrate. However, there is a drawback in that a clearance is required between the through hole and the hole portion, the basic lattice in the plane direction cannot be made small, and it becomes a factor that hinders high density in the plane direction.

Further, since it is necessary to fill the above-mentioned holes only with the catalyst-containing resin impregnated in the catalyst-containing prepreg, if the thickness of the insulating substrate without a catalyst is too thick, voids will occur, which causes thickness restrictions, There is a drawback that it becomes a limiting factor for the electrical characteristics, especially the impedance characteristics, of the multilayer board.

Furthermore, it is necessary to adjust the amount of resin in the catalyst-containing prepreg layer according to the number of holes in the holes, and it is difficult to control the smoothness and interlayer thickness of the multilayer board depending on the degree of concentration of holes in the plane direction. There is a drawback that

An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board which has a high density and has no restriction on impedance characteristics and which can control smoothness and interlayer thickness.

[Means for Solving the Problems]

The method for manufacturing a multilayer printed wiring board according to the present invention is such that two sets of catalyst-containing insulating substrates having conductor circuit patterns provided on both front and back surfaces in advance are arranged in the outermost layers, and an insulating substrate without a catalyst and a catalyst-containing substrate are provided inside thereof. A step of forming a multi-layered substrate by inserting a prepreg and heating and pressurizing, a step of forming a through hole at a predetermined position of the multi-layered substrate, and a mask after masking a part of the through hole. A step of adsorbing a catalyst on the inner wall of the through hole that is not formed; a step of removing the mask;
And a catalyst-containing insulating layer formed by the catalyst-containing insulating substrate and the catalyst-containing prepreg on the inner wall of the through hole, and a step of forming a conductor layer by electroless plating including a catalyst-adsorbed portion. It

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a vertical sectional view showing the manufacturing method of an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1 (A), a conductor circuit pattern is previously prepared.
Two pieces of insulating substrate 2 with catalyst 1a and 1b on both sides
Each set is arranged in the outermost layer, and the insulating substrate 3 without a catalyst and the prepreg 4 with a catalyst are set inside the set.

Next, as shown in FIG. 1 (B), heating and pressurization are performed to obtain a multi-layer substrate 6 including the catalyst-containing insulating layer 5 and the catalyst-free insulating substrate 3.

Next, as shown in FIG. 1 (C), through holes 7a and 7b are drilled at predetermined positions by an N / C drilling device.

Next, as shown in FIG.
The through holes 7a forming the rule by a photo printing method, for example,
DuPont Dry Film Liston 1220 Using,
After forming the mask 8, based on palladium chloride
Through hole 7b without mask 8 by immersing in catalyst liquid
The catalyst 9 is adsorbed on the entire inner wall of the.

Next, after removing the mask 8 with an organic solvent (not shown), the first
As shown in FIG. 6E, when electroless copper plating is performed, the exposed conductor circuit pattern 1a and the through holes 7a, 7 of the multilayer substrate 6 are exposed.
The conductor layer 10 is formed on the inner wall of b. In this case, the through hole 7a
In this case, since the conductor layer 10 is formed only on the catalyst-containing insulating layer 5 and not on the insulating substrate 3 without a catalyst, the conductor layer 10 is separated at the inner wall of the through hole 7a, and the conductor circuit pattern 1a is formed. And 1b are connected, while in the through hole 7b,
The conductive layer 10 is formed on the entire inner wall by the catalyst 9 adsorbed in advance, so that the multilayer printed wiring board 13 including the divided via hole 11 and the normal through hole 12 is obtained.

〔The invention's effect〕

As described above, according to the present invention, when selectively forming divided via holes in a multilayer printed wiring board, various design constraint elements such as the basic lattice arrangement, the interlayer thickness, and the characteristic impedance setting as in the prior art are used. There is no effect, and there is an effect that a high-density multilayer printed wiring board having a significantly improved wiring accommodation property can be obtained.

[Brief description of drawings]

1 (A) to 1 (E) are longitudinal sectional views showing the manufacturing method of one embodiment of the present invention in the order of steps, and FIGS. 2 (A) to 2 (E).
(D) is a longitudinal cross-sectional view showing an example of a conventional manufacturing method in the order of steps. 1a, 1b ... Conductor circuit pattern, 2 ... Insulating substrate with catalyst, 3 ... Insulating substrate without catalyst, 4 ... Prepreg with catalyst, 5 ... Insulating layer with catalyst, 6 ... Multilayer substrate, 7a, 7
b ... through hole, 8 ... mask, 9 ... catalyst, 10 ... conductor layer, 11 ... divided via hole, 12 ... normal through hole, 13 ... multilayer printed wiring board, 14 ... hole Department.

Claims (1)

[Claims] 1. A set of two insulating substrates containing a catalyst having conductor circuit patterns provided on both front and back sides in advance is arranged in the outermost layer, and an insulating substrate without a catalyst and a prepreg containing a catalyst are inserted inside the outermost layers. A step of forming a multilayer substrate by heating and pressurizing, a step of forming a through hole at a predetermined position of the multilayer substrate, and a part of the through hole being masked, and then the inner wall of the through hole that is not masked A step of adsorbing a catalyst on
Forming a conductor layer by electroless plating including the step of removing the mask, the insulating layer containing the catalyst formed by the insulating substrate containing the catalyst and the prepreg containing the catalyst on the inner wall of the through hole, and the portion where the catalyst is adsorbed A method of manufacturing a multilayer printed wiring board, comprising: