JPH0748139B2 - Driving method of display device - Google Patents

Abstract

PURPOSE:To enable all picture elements to illuminate with the same brightness as to the same display data by correcting and setting the pulse width of a modulating voltage small or large previously by the increment or decrement in the pulse width of the modulating voltage applied to the picture elements due to the influence of the line resistance of a data-side electrode. CONSTITUTION:The pulse width of the modulating voltages applied from end part sides of 1st electrodes X1...Xn-1 (odd-numbered) of data-side electrodes in the line sequence of scanning-side electrodes Y1-Ym is increased or decreased in order and thus corrected. The pulse width of modulating voltages applied to end part sides of 2nd electrodes X2...Xn (even-numbered) of data-side electrodes is increased or decreased in order and thus corrected so as to have complementary relation to the correction of the modulating voltages applied from the end part sides of the 1st electrodes X1...Xn-1. Namely, the pulse width of the modulating voltages is corrected and set wide or narrow by the increment or decrement in the pulse width of the modulating voltages applied to the picture elements due to the influence of the line resistance of the data-side electrodes X1-Xn. Consequently, the picture elements can be made to illuminate with the same brightness for the same display data.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method of a display device such as a capacitive flat matrix display panel (hereinafter referred to as a thin film EL display device).

2. Description of the Related Art For example, a double-insulation (or three-layer structure) thin film EL device is constructed as follows.

As shown in FIG. 7, a strip-shaped transparent electrode 2 made of In ₂ O ₃ is provided in parallel on a glass substrate 1 and, for example, Y ₂
An EL layer 4 made of ZnS doped with a dielectric material 3a such as O ₃ , Si ₃ N ₄ , Al ₂ O _{3 and} an activator such as Mn, and Y ₂ O ₃ , Si ₃ N ₄ ,
Dielectric materials 3b such as TiO ₂ and Al ₂ O ₃ are sequentially laminated by a thin film technique such as vapor deposition and sputtering to a film thickness of 500 to 10000Å to form a three-layer structure, on which the transparent electrode 2 and A strip-shaped back electrode 5 made of Al (aluminum) in the orthogonal direction
Are provided in parallel.

Since the thin film EL element has the EL material 4 sandwiched between the dielectric materials 3a and 3b between its electrodes, it can be regarded as a capacitive element in terms of an equivalent circuit. Also, this thin film EL
As is clear from the voltage-luminance characteristics shown in FIG.
It is driven by applying a relatively high voltage of about 200V. This thin film EL element is characterized in that it emits light with high brightness due to an AC electric field and has a long life.

Basic display driving of a thin film EL display device using the thin film EL element as a display panel is performed by using one of the transparent electrode 2 and the back electrode 5 of the thin film EL element as a scanning side electrode and the other as a data side electrode, and a data side electrode. A modulation voltage corresponding to display data for determining light emission / non-light emission is applied to the scanning side electrode, and a writing voltage is applied to the scanning side electrode line-sequentially. By this display driving, a superimposing effect or a canceling effect of the write voltage and the modulation voltage is generated in the pixel portion where the scanning side electrode and the data side electrode intersect in the EL layer 4 described above, and the pixel has a light emission threshold voltage. A voltage above or below the light emission threshold voltage (hereinafter referred to as an effective voltage) is applied, whereby each pixel is brought into a light emitting / non-light emitting state and a predetermined display is obtained.

Conventionally, in such a thin film EL display device, as a driving method for performing gradation display in which the brightness of each pixel is changed to a plurality of stages, the pulse width of the modulation voltage applied to the data side electrode is gradation display data (brightness data). There is known a pulse width modulation method in which the area of the effective voltage applied to the pixel is controlled by changing the pulse width modulation method according to.

However, in the driving method described above, when a transparent electrode having a high line resistance is used as the data-side electrode, the modulation voltage applied to the data-side electrode is affected by the line resistance, As described below, there is a problem that a luminance difference occurs between pixels.

FIG. 9 is a connection configuration diagram of the display panel 6 of the thin film EL display device and a part of a drive circuit thereof for explaining the cause of such a brightness difference. In FIG. 9, the odd-numbered data-side electrodes 7a are output ports 8a of the data-side drive circuit for applying the modulation voltage V _M to the data-side electrodes 7a at the electrode ends drawn to the upper side of the same figure. Further, the output port 8b of the data side drive circuit is connected to the electrode end of the even-numbered data side electrode 7b which is drawn out to the lower side of the figure.

On the other hand, a plurality of scanning side electrodes 9a, 9b, 9c, 9d are arranged in parallel to each other in a direction orthogonal to these data side electrodes 7a, 7b, and each scanning side electrode 9a-9d is on the left side of FIG. the electrode end drawn, the output port 10a of the scanning side drive circuit for applying them to the write voltage -V _W, 10b, 10c, 10d are respectively connected. In FIG. 9, each data side electrode
Each pixel located at the intersection of 7a, 7b and each scanning side electrode 9a-9d is represented by a capacitor, and the line resistance in the middle of each data side electrode 7a, 7b is represented by a resistor R.

In the thin film EL display device having the above structure, for example, in order to make the two pixels 11A and 11B located on the scanning side electrode 9a emit the same brightness, the output ports 8a and 8a of the data side drive circuit are used.
If the voltages of the same waveform are set as the modulation voltages V _M applied to the corresponding data-side electrodes 7a and 7b from b, the pixels receiving the modulation voltage V _M from the output port 8a located near the scanning-side electrode 9a In 11A, since the line length of the data side electrode 7a from the output port 8a to the pixel 11A is short, it is hardly affected by the line resistance. Therefore, the pixel 11A has the output port 8a as shown in FIG. 10 (1). A voltage having substantially the same waveform as the modulation voltage V _M output from is applied.

At this time, if the write voltage −V _W corresponding to the light emission threshold voltage V _th having a waveform as shown in FIG. 10B is applied from the output port 10a of the scan side drive circuit to the scan side electrode 9a. , The effective voltage having the waveform shown in FIG. 10 (3) is applied to the pixel 11A.

On the other hand, in the pixel 11B that receives the modulation voltage V _M from the output port 8b located far from the scanning side electrode 9a, the line length of the data side electrode 7b from the output port 8b to the pixel 11B is long and the line resistance between them is long. Since R becomes large, the modulation voltage
V _M is greatly affected by the line resistance R. Therefore,
As shown in FIG. 11 (1), the pixel 11B is applied with a voltage having an integral waveform such that the modulation voltage V _M output from the output port 8b is passed through an integrating circuit. At this time, the eleventh electrode from the output port 10a of the scanning side driving circuit to the scanning side electrode 9a.
The same light emission threshold voltage V with the waveform shown in Fig. (2)
_When a write voltage −V _W corresponding to _th is applied, the pixel 11B
The effective voltage having the waveform shown in FIG. 11 (3) is applied to the.

Of the effective voltages applied to the pixels 11A and 11B, the voltage that substantially contributes to the light emission is the portion equal to or higher than the light emission threshold voltage V _{th. Therefore} , the waveform of FIG. 10 (3) and the waveform of FIG. 11 (3) are shown. Comparing the waveforms of the light emission threshold voltage V _{th and} above,
The area of the waveform in FIG. (3) is wider by the shaded area. Since this difference in area becomes the difference in brightness as it is, the pixel 11B becomes brighter than the pixel 11A, even though the pixels 11A and 11B should emit light at the same brightness. That is, the modulation voltage of the same waveform
Even if V _M is applied, the pixels closer to the output port of the data side drive circuit become darker, and the pixels farther away become brighter, resulting in brightness variation, and the difference in brightness between adjacent pixels that should have the same gradation. The display quality is deteriorated due to the occurrence of such problems.

Therefore, an object of the present invention is to provide a driving method of a display device capable of causing each pixel to emit light of uniform brightness for the same gradation display data without being affected by the line resistance of the data side electrode. That is.

Means for Solving the Problems According to the present invention, a dielectric layer is interposed between a plurality of scanning side electrodes and a plurality of data side electrodes arranged in directions intersecting with each other,
The data-side electrode is pulsed from the first electrode end side and the second electrode end side, which are opposite to each other with respect to the extending direction of the data-side electrode, for each line or a plurality of lines according to display data. While applying the modulation voltage with the width changed, the writing voltage is applied line-sequentially to the scanning-side electrode, so that each pixel formed of the dielectric layer at the intersection of the scanning-side electrode and the data-side electrode is in the non-light emitting state. In a method of driving a display device that emits light with different brightness over several stages, the first side of the data side electrode is arranged in line order of the scanning side electrode.
The pulse width of the modulation voltage applied from the electrode end side of the data side electrode is sequentially decreased or increased, while the pulse width is corrected to the modulation voltage applied from the second electrode end side of the data side electrode. The width is sequentially increased or decreased so as to complement the correction for the modulation voltage applied from the first electrode end side so that all pixels have the same brightness for the same display data. This is a method for driving a display device.

Operation According to the present invention, the pulse width of the modulation voltage is set to be widened or narrowed in advance by the amount by which the pulse width of the modulation voltage applied to the pixel increases or decreases due to the influence of the line resistance of the data side electrode. Therefore, all pixels emit light with the same brightness for the same display data.

Embodiment FIG. 1 is a block diagram showing a schematic structure of a thin film EL display device to which a driving method according to an embodiment of the present invention is applied. In the figure, the display panel 13 is composed of a thin film EL element,
Since the specific configuration is the same as the configuration described in the related art, the description thereof is omitted here.

A plurality of scanning side electrodes Y1, Y2, which are arranged on the display panel 13.
, Ym−1, Ym (hereinafter, any scanning side electrode is represented by reference numeral Y) are connected to the scanning side drive circuit 14 provided on the right side of FIG. Also, a plurality of data side electrodes arranged in a direction orthogonal to the scan side electrodes Y1 to Ym.
Of X1, X2, ..., Xn−1, Xn, odd-numbered data-side electrodes X1,
, Xn-1 (hereinafter, any data-side electrode is represented by reference numeral X) is connected to the first data-side driving circuit 15a provided on the upper side of FIG. , Xn are connected to the second data side drive circuit 15b provided on the lower side of FIG.

In the scan side drive circuit 14, an output port 16 is individually connected to each of the scan side electrodes Y1 to Ym, and a write voltage corresponding to the light emission threshold voltage V _th is supplied from a power supply 17 via the output port 16. V _W is selectively applied to each of the scanning side electrodes Y1 to Ym.
Each of these output ports 16 is connected to the shift register 18, and in order to set the scanning side electrodes Y1 to Ym in the shift register 18 in line sequential order in synchronization with the clock CLK3 input from the clock input terminal of the shift register 18. Scan data S-
DATA is transferred, whereby the output ports 16 are turned on in a line-sequential manner on the scanning side electrodes Y1 to Ym.

In the first data side driving circuit 15a, the output ports 19a are individually connected to the odd-numbered data side electrodes X1, ..., Xn−1, and the modulation voltage V is supplied from the power source 20 via the output ports 19a. _M is selectively applied to each data side electrode X1, ..., Xn-1. Further, depending on the setting state of the output port 19a, each data side electrode X1, ..., Xn-1 is clamped to the ground.

These output ports 19a are connected to the comparator 21a. The comparator 21a is connected to the shift register 23a via the latch circuit 22a. Shift register 23a
Is the clock CLK1 input from its clock input terminal
Is a circuit for performing a shift operation in synchronism with and transferring the gradation display data corresponding to each of the data side electrodes X1, ..., Xn−1,
The gradation display data transferred to the shift register 23a is temporarily held by the latch circuit 22a and then sent to the comparator 21a. The comparator 21a has a function of comparing the 3-bit parallel data supplied from the counter 24a with the gradation display data supplied from the latch circuit 22a to determine the gradation width corresponding to the gradation display data.

The configuration of the second data side drive circuit 15b is also the same as that of the first data side drive circuit 15a, and even-numbered data side electrodes X2,
... individually to the output port 19b against the Xn-1 is connected, the modulation voltage V _M from the power supply 20 through the output port 19b is the data side electrodes X2, ..., it is selectively applied to Xn.

These output ports 19b are connected to the comparator 21b,
The comparator 21b is connected to the shift register 23b via the latch circuit 22b. The comparator 21b is a counter
The 3-bit parallel data given from 24b and the gradation display data given from the latch circuit 22b are compared,
It has a function of determining the gradation width corresponding to the gradation display data. In FIG. 1, each pixel on the display panel 13 is equivalently represented by a capacitor.

FIG. 3 is a block diagram showing a correction circuit for correcting the luminance difference between pixels caused by the line resistance of the data side electrodes X1 to Xn in the thin film EL display device described above. In the correction circuit of FIG. 3, the clock generator 25 is a basic clock CL for determining the gradation width according to the gradation display data.
It is a circuit for generating K, and can be operated by an enable signal CLK given from its input terminal 30.

In the next stage of the clock generator 25, there is provided a first delay circuit 26a which delays the basic clock CLK by a predetermined amount and gives it as the clock ODD-CLK2 of the counter 24a of the first data side drive circuit 15a, It is connected to a second delay circuit 26b which delays the basic clock CLK by a predetermined amount and supplies it as the clock EVEN-CLK2 of the counter 24b of the second data side drive circuit 15b. In addition, these delay circuits 2
A scanning line position detection circuit 27 is connected to 6a and 26b.

The scanning line position detection circuit 27 has a function of counting up and a function of counting down the horizontal synchronizing signal HD input from its input terminal 31 as a clock, and a vertical synchronizing signal VD input from the input terminal 32. Will be reset. Then, one of the count-up signal and the count-down signal of the scanning line position detection circuit 27 is given to the first delay circuit 26a, and the other is given to the second delay circuit 26b, and an amount corresponding to those signals is given. Only the delay circuits 26a and 26b perform delay processing. A signal EDD for determining which of the two delay circuits 26a and 26b the above-described count-up signal and count-down signal is sent to is input to the input terminal 33 of the scanning line position detection circuit 27.

In this embodiment, the signal EDD is set to the “L” level and the first
The delay circuit 26a is provided with a countdown signal, and the second delay circuit 26b is provided with a countup signal. When the signal EDD is set to the "H" level, the count-up signal is given to the first delay circuit 26a and the count-down signal is given to the second delay circuit 26b.

Next, the basic operation of the thin film EL display device shown in FIG. 1 will be described with reference to the timing chart shown in FIG.

Grayscale display data is transferred in the form of a 3-bit binary code to the shift registers 23a and 23b of the first and second data side drive circuits 15a and 15b in synchronization with the clock CLK1. The 3-bit gradation display data is temporarily held by the latch circuits 22a and 22b. Under this condition, when the clear signal ▲ ▼ previously input to the comparators 21a and 21b and the counters 24a and 24b is released as shown in FIG. 2 (1), the latch circuits 22a and 22b hold the signals. The data side electrode X corresponding to the data of "0" in the displayed gradation display data is clamped to the ground, and all the data side electrodes X corresponding to the other data are raised to the modulation voltage V _M.

Now, for example, the gradation display data "0", "2", "4", "at the output ports 19a, 19b corresponding to the data side electrodes X1, X2, Xn-1, Xn of the data side drive circuits 15a, 15b. 7 ”shall be given. At this time, the output port 19a of the data side electrode X1 is clamped to the ground at the same time when the clear signal {circle around ()} is released (time t0), and the waveform shown in FIG. That is, the gradation width is set to zero.

At the output port 19b of the data side electrode X2, the count value of the clock CLK2 shown in FIG. 2 (2) counted by the counter 24b is compared with the gradation display data "2" by the comparator 21b, and the count value is "2". Timing (time
It is clamped to the ground at t1) and the gradation width T2 of the waveform shown in FIG. 2 (4) is set. Similarly, the data side electrode Xn
The -1 output port 19a is clamped to the ground at the timing (time t2) when the count value of the counter 24a becomes "4", and the gradation width T4 of the waveform shown in FIG. 2 (5) is set. Also for the output port 19b of the data side electrode Xn,
It is clamped to the ground at the timing (time t3) when the count value of the counter 24b becomes "7", and then is shown in FIG. 2 (6).
The gradation width T7 of the waveform shown in is set. Therefore, the modulation voltage V _M having a pulse width corresponding to the gradation display data “0”, “2”, “4”, “7” is applied to each of the data side electrodes X1, X2, Xn−1, Xn. Will be done.

On the other hand, in the scanning side driving circuit 14, the data side driving circuits 15a, 15
While the clear signal ▲ ▼ is released in b, only one of all the output ports 16 is turned on, and only one scanning side electrode Y corresponding to this corresponds to the light emission threshold voltage V _th . Write voltage −V _{W is} applied.

By repeating the above operation in line-sequential order of the scanning-side electrodes Y, the pixels located on each scanning-side electrode Y emit light or do not emit light at the brightness according to the gradation display data, and the brightness becomes overall. A screen with gradation is displayed.

Next, the brightness correction operation by the correction circuit shown in FIG. 3 will be described with reference to the timing chart shown in FIG.

The clock generator 25 outputs a basic clock CLK that is a basis for determining the gradation width (see FIG. 4 (1)).
In the scanning line position detection circuit 27, after receiving the vertical synchronizing signal VD and being reset, the horizontal synchronizing signal HD is used as a clock to count up and count down. In the count-up operation, "0" is set as the initial value. In the countdown operation, the number of horizontal sync signals HD for one field is "m".
Is set as the initial value.

When the first horizontal synchronizing signal VD is counted, the countdown signal "m-1" is sent to the first delay circuit 26a, and the countup signal "1" is sent to the second delay circuit 26b.
Sent to. Each delay circuit is provided in an amount corresponding to the countdown signal "m-1" and the countup signal "1".
In 26a and 26b, delay processing is applied to the basic clock CLK, and these clocks are respectively supplied to the clock ODD-CLK2 of the counter 24a of the first data side drive circuit 15a and the counter 24b of the second data side drive circuit 15b. Clock EVEN-CL
Given as K2.

In this case, since the countdown signal "m-1" is sufficiently larger than the countup signal "1", the clock ODD-C
The delay amount Ta of LK2 with respect to the basic clock CLK is shown in Fig. 4 (3).
As shown in, the clock is even large, while the clock EVEN-CL is
The delay amount Tb of K2 has a small value as shown in FIG. Therefore, in the first data side driving circuit 15a of the thin film EL display device shown in FIG. 1, the timing of starting the counting of the clock ODD-CLK2 by the counter 24a is considerably delayed and corresponds to the gradation display data. A gradation width wider than the gradation width is set at the output port 19a, and a modulation voltage of a pulse width tA + Ta wider than the pulse width tA corresponding to the gradation display data is applied to the odd-numbered data side electrodes X1, ..., Xn-1.
V _M is applied.

On the other hand, in the second data side drive circuit 15b, there is almost no delay in the timing at which the counter 24b starts counting the clock EVEN-CLK2, and the gradation width substantially corresponding to the gradation display data is output port 19b. , And the even-numbered data-side electrodes X2, ..., Xn are applied with a modulation voltage V _M having a pulse width tA substantially corresponding to the gradation display data.

FIG. 5 shows the waveform of the voltage applied to the pixel at the intersection of the first scanning side electrode Y1 and the odd number side data side electrodes X1, ..., Xn-1 at this time. Of which, the fifth
(1) shows the waveform of the modulation voltage V _M applied from the data side electrodes X1, ..., Xn−1, and FIG. 5 (2) shows the light emission threshold voltage applied from the first scanning side electrode Y1. The waveform of the write voltage −V _W corresponding to V _th is shown.

At this time, the effective voltage applied to the pixel is shown in FIG.
The waveform is as shown in. That is, as described above, in this pixel, the pulse width tA + Ta which is wider than the pulse width tA corresponding to the gradation display data by the delay amount Ta of the clock ODD-CLK2.
Since the modulation voltage V _{M of} is applied, the area increases only in the portion of the effective voltage that is equal to or higher than the light emission threshold voltage Vth that contributes to light emission and that is shaded in FIG. The brightness is corrected to be higher by the area increase.

On the other hand, FIG. 6 shows the waveform of the applied voltage to the pixel at the intersection of the first scanning side electrode Y1 and the even number side data side electrodes X2, ..., Xn at this time. Of which, the sixth
6 (1) shows the waveform of the modulation voltage V _M applied from the data side electrodes X2, ..., Xn, and FIG. 6 (2) shows the same light emission threshold voltage V applied from the first scanning side electrode Y1. The waveform of the write voltage −V _W corresponding to _th is shown. Therefore,
At this time, the effective voltage applied to the pixel is shown in FIG. 6 (3).
The waveform is as shown in.

Since the pixel in this case is located far from the output port 19b, it is greatly affected by the line resistance, and the applied modulation voltage V _M has an integral waveform as shown in FIG. 6 (1), which contributes to light emission at the effective voltage. Among the portions having the light emission threshold voltage V _th or higher, the shaded portion in FIG. 6 (3) increases.

Since the modulation voltage V _M having the pulse width tA substantially corresponding to the gradation display data is applied to this pixel as described above,
At this time, if the same gradation display data is set to the odd-numbered data-side electrodes X1, ..., Xn−1 and the even-numbered data-side electrodes X2, ..., Xn, the odd-numbered data-side electrodes X1 ,. …,
The increase in area shaded in FIG. 5 (3) caused by the effective voltage applied to the pixel corresponding to Xn−1 is applied to the pixels corresponding to the even-numbered data side electrodes X2, ..., Xn. The effective voltage is approximately equal to the area increase due to the influence of the line resistance shown by hatching in FIG. Therefore, the same brightness is obtained for the same gradation display data among the pixels located on the first scanning-side electrode Y1.

In the correction circuit of FIG. 3, the scanning line position detection circuit 27
As the count-up and count-down of (therefore, the scanning-side electrode Y to which the write voltage -V _W is applied also moves downward), the first delay circuit 26
The delay amount Ta of the clock ODD-CLK2 output from a gradually decreases, while the delay amount Tb of the clock EVEN-CLK2 output from the second delay circuit 26b gradually increases to the central scanning electrode. When the write voltage -V _W is applied to Y, the delay amount of the two clocks ODD-CLK2 and EVEN-CLK2
Ta and Tb are equal.

At this time, in the pixel located on the central scanning-side electrode Y, the odd-numbered data-side electrodes X1 from the output port 19a
, Xn−1 and the even-numbered data side electrodes X2, ..., Xn from the output port 19b have the same line length, and the influence of the line resistance is substantially equal. Therefore, the same amount of luminance correction is performed as described above, and the luminance of each pixel becomes the same.

When the count-up and count-down of the scanning line position detection circuit 27 in the correction circuit of FIG. 3 further proceed (therefore, the scanning side electrode to which the write voltage −V _W is applied moves downward from the center), the first delay circuit 26a. The delay amount Ta of the clock ODD-CLK2 output from the second delay circuit 26b
The relationship with the delay amount Tb of the clock EVEN-CLK2 output from the above is reversed, and the luminance correction corresponding to each delay amount is performed on the corresponding pixel in the same manner as in the above case. That is, the delay amount of the two clocks ODD-CLK2 and EVEN-CLK2
Ta and Tb always have a complementary relationship in one field.

In this way, the same brightness can be obtained for the same gradation display data among the pixels over the entire screen.

In the above embodiment, as shown in FIGS. 5 and 6, the modulation voltage V _M is adjusted so that the rising portion of the modulation voltage V _M is deviated from the portion contributing to the light emission in the effective voltage applied to the pixel.
Since the application timing of is set, there is no problem in the rising portion when the modulation voltage V _M is affected by the line resistance and becomes an integral waveform.

On the other hand, when the trailing edge of the modulation voltage V _M to set the application timing of the modulation voltage V _M to deviate from the portion contributing to light emission of the effective voltage, the falling portion of the integrated waveform does not become a problem But this time, the rising part becomes a problem. Contrary to the case of the above-mentioned embodiment, the rising portion of this integral waveform works to reduce the area of the voltage applied to the pixel as the influence of the line resistance increases, so that the luminance correction in this case is the same as that of the present embodiment. The opposite is true. That is, the signal EDD applied to the input terminal of the scanning line position detection circuit 27 shown in FIG. 3 may be set to the "H" level, contrary to the above embodiment.

As described above, according to the driving method of the display device of the present invention,
Since the pulse width of the modulation voltage applied to the pixel increases or decreases due to the influence of the line resistance of the data-side electrode, the pulse width of the modulation voltage is corrected in advance to be set to be smaller or larger, so that the same display data is set. On the other hand, all pixels can emit light with the same brightness.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a thin film EL display device to which a driving method according to an embodiment of the present invention is applied, FIG. 2 is a timing chart showing its basic operation, and FIG. FIG. 4 is a block diagram showing a schematic configuration of a correction circuit for performing luminance correction of the display device, FIG. 4 is a timing chart showing the operation of the correction circuit, and FIG. 5 is an odd-numbered data side electrode of the thin film EL display device. FIG. 6 is a waveform diagram showing the voltage applied to the pixel located, FIG. 6 is a waveform diagram showing the voltage applied to the pixel located on the even-numbered data side electrode of the thin film EL display device, and FIG. 7 is a part of the thin film EL device. FIG. 8 is a cutaway perspective view, FIG. 8 is a graph showing voltage-luminance characteristics of a thin film EL element, FIG. 9 is a circuit diagram showing a schematic configuration of a main part of a thin film EL display device to which a conventional driving method is applied, and FIG. The figure shows the odd-numbered data-side electrodes of the thin-film EL display device. Waveform diagram showing voltages applied to pixels positioned, FIG. 11 is a waveform diagram showing voltages applied to the pixels located in the even-numbered data side on electrodes of the thin film EL display device. 13 ... Display panel, 14 ... Scanning side drive circuit, 15a, 15b ...
… Data side drive circuit, X1 to Xn …… Data side electrodes, Y1 to Ym
...... Scanning side electrode, 25 …… Clock generator, 26a, 26b ……
Delay circuit, 27 ... Scan line position detection circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hiroshi Kishishita 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Corporation (72) Hisashi Kamiide 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Corporation (56) Reference JP-A-59-228698 (JP, A) JP-A-59-121390 (JP, A) JP-A-59-53891 (JP, A)

Claims (1)

[Claims] 1. A dielectric layer is interposed between a plurality of scanning-side electrodes and a plurality of data-side electrodes arranged in a direction intersecting with each other, and the data-side electrodes are provided for each data line or for each data line. A modulation voltage with a pulse width changed according to display data is applied from the first electrode end side and the second electrode end side that are opposite to each other with respect to the extending direction, while the scanning side electrode is applied. A method of driving a display device in which a writing voltage is applied line-sequentially to make each pixel formed of a dielectric layer at a portion where a scanning side electrode and a data side electrode intersect each other in a non-light emitting state and a light emitting state in which luminance is different over several steps. At the first side of the data side electrode in line order of the scanning side electrode.
The pulse width of the modulation voltage applied from the electrode end side of the data side electrode is sequentially decreased or increased, while the pulse width is corrected to the modulation voltage applied from the second electrode end side of the data side electrode. The width is sequentially increased or decreased so as to complement the correction for the modulation voltage applied from the first electrode end side so that all pixels have the same brightness for the same display data. A method for driving a display device characterized by the above.