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JPH0754837B2 - Integrated circuit structure - Google Patents
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JPH0754837B2 - Integrated circuit structure - Google Patents

Integrated circuit structure

Info

Publication number
JPH0754837B2
JPH0754837B2 JP13483886A JP13483886A JPH0754837B2 JP H0754837 B2 JPH0754837 B2 JP H0754837B2 JP 13483886 A JP13483886 A JP 13483886A JP 13483886 A JP13483886 A JP 13483886A JP H0754837 B2 JPH0754837 B2 JP H0754837B2
Authority
JP
Japan
Prior art keywords
input
integrated circuit
wiring board
printed wiring
output pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP13483886A
Other languages
Japanese (ja)
Other versions
JPS62291950A (en
Inventor
弘行 小嶋
達事 坂本
貢 白井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13483886A priority Critical patent/JPH0754837B2/en
Publication of JPS62291950A publication Critical patent/JPS62291950A/en
Publication of JPH0754837B2 publication Critical patent/JPH0754837B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は集積回路構造体に係り、特に、ICチツプを高密
度に集積したモジユールのパツケージ化に好適な集積回
路構造体に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit structure, and more particularly to an integrated circuit structure suitable for packaging a module in which IC chips are integrated at high density.

〔従来の技術〕[Conventional technology]

半導体デバイスの製造技術における微小化と単一装置上
の集積回路素子数の増加という傾向にともなつて、これ
らのデバイス間の信号接続および供給電源などとの外部
信号接続についても微小化が要求される。このため、信
号接続の信頼性向上とともに不良素子交換の容易な接続
構造を有する集積回路パツケージを提供する必要があ
る。
With the trend toward miniaturization in semiconductor device manufacturing technology and the increase in the number of integrated circuit elements on a single device, miniaturization is also required for signal connections between these devices and external signal connections such as power supply. It For this reason, it is necessary to provide an integrated circuit package having a connection structure in which reliability of signal connection is improved and defective elements can be easily replaced.

例えば、特開昭59−165446号公報記載の集積回路構造体
では、単一の集積回路素子(以下ICチツプという)の内
部配線を被覆するポリイミド系樹脂の表面に金属パツド
を形成し、この金属パツドに端子部材に係る入出力ピン
を固着し、プリント基板のスルーホールに挿入すること
により接続の微小化を図つている。
For example, in the integrated circuit structure described in JP-A-59-165446, a metal pad is formed on the surface of a polyimide resin that covers the internal wiring of a single integrated circuit element (hereinafter referred to as an IC chip). By fixing the input / output pins related to the terminal member to the pad and inserting them into the through holes of the printed circuit board, the connection is miniaturized.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

上記従来技術に見られるように、ICチツプ間の信号接続
や外部回路との信号接続には、入出力ピン接続によつて
実装距離の微小化を図ることが行われている。しかし、
ICチツプの高集積化にともない単一のピン接続面積は増
加傾向にあり、入出力ピンをはさむセラミツクス基板,
プリント配線基板の両部材間の、増大する熱変形差を十
分に吸収しうる入出力ピン構造が要求される。
As seen in the above-mentioned prior art, for the signal connection between IC chips and the signal connection with an external circuit, the mounting distance is miniaturized by the input / output pin connection. But,
With the high integration of IC chips, the single pin connection area tends to increase.
An input / output pin structure capable of sufficiently absorbing the increasing thermal deformation difference between both members of the printed wiring board is required.

しかし、ICチップ側に入出力ピンを固着したのち、これ
をプリント配線基板のスルーホールに一括して挿入しよ
うとすると、入出力ピンには一定の剛性が要求され、し
たがって、熱変形を十分に吸収しうるたわみ性の大きな
入出力ピンを採用することは困難である。
However, if the I / O pins are fixed to the IC chip side and then inserted into the through holes of the printed wiring board all at once, the I / O pins are required to have a certain rigidity, and therefore thermal deformation is sufficient. It is difficult to adopt an input / output pin that can absorb a large amount of flexibility.

本発明は、前述の従来技術の問題点を解決するためにな
されたもので、セラミックス基板とプリント配線基板と
を複数の端子部材により接続するに際し、多数の端子部
材を効率的に接続することができ、接続部に及ぼす熱変
形を端子部材に係る入出力ピン自身の柔構造によって吸
収しうる、信号接続の信頼性の高い集積回路構造対を提
供することを目的とする。
The present invention has been made in order to solve the above-mentioned problems of the prior art, and when connecting a ceramic substrate and a printed wiring board with a plurality of terminal members, it is possible to efficiently connect a large number of terminal members. It is an object of the present invention to provide an integrated circuit structure pair having high signal connection reliability, which can absorb thermal deformation exerted on the connection portion by the flexible structure of the input / output pin itself related to the terminal member.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的を達成するために、本発明に係る集積回路構造
体の構成は、1個あるいは複数個の集積回路素子を搭載
し、この集積回路素子を外部回路に接続するための金属
パッドを形成してなるセラミックス基板と、内層配線を
有するプリント配線基板とを備え、これらセラミックス
基板とプリント配線基板とを複数の端子部材により電気
的に接続してなる集積回路構造体において、前記複数の
端子部材は、前記プリント配線基板のスルーホールめっ
きにはんだ接合してなる複数のたわみ性の大きい入出力
ピンであり、これら複数の入出力ピンの端部と前記セラ
ミックス基板の金属パッドとを、前記入出力ピンと前記
スルーホールめっきとの間のはんだ材より融点の低いは
んだ材を用いて接合したものである。
In order to achieve the above object, the structure of an integrated circuit structure according to the present invention is such that one or a plurality of integrated circuit elements are mounted and metal pads for connecting the integrated circuit elements to an external circuit are formed. An integrated circuit structure comprising: a ceramics substrate made of; and a printed wiring board having inner layer wiring, wherein the ceramics substrate and the printed wiring board are electrically connected by a plurality of terminal members. A plurality of flexible I / O pins solder-bonded to the through-hole plating of the printed wiring board, the end portions of the plurality of I / O pins and the metal pads of the ceramic substrate being the I / O pins; It is joined by using a solder material having a melting point lower than that of the solder material between the through hole plating.

なお付記すると、本発明では、従来、ICチツプ側に入出
力ピンを固定し、この入出力ピンをプリント配線基板の
スルーホールに挿入する手順であつたものとは逆に、入
出力ピン単独の状態で、まず、プリント配線基板のスル
ーホールに固定したのち、ICチップ側の金属パッドには
んだ接合する手順を採用したものである。
In addition, in the present invention, contrary to the conventional procedure of fixing the input / output pin to the IC chip side and inserting the input / output pin into the through hole of the printed wiring board, the input / output pin alone In this state, first, it is fixed to the through hole of the printed wiring board and then soldered to the metal pad on the IC chip side.

入出力ピンを単独で扱うことから、挿入接合作業の自由
度が高まり、入出力ピンの形状や構造をたわみ性の大き
いものにすることによつて、入出力ピンの両端接続部に
おける熱変形差を十分に吸収することができる。
Since the I / O pin is handled independently, the flexibility of insertion and joining work is increased, and the shape and structure of the I / O pin is made to have a large flexibility, so that the difference in thermal deformation between both ends of the I / O pin can be improved. Can be fully absorbed.

〔作用〕[Action]

多数のICチツプを搭載した樹脂あるいはセラミツクス基
板表面の金属パツドとプリント配線基板のスルーホール
が入出力ピンで接続された集積回路構造では、通電によ
るICチツプの発熱によつて各部材は温度上昇を受ける。
このとき、入出力ピン両端の各構成部材が異なる線膨張
係数を有することから、各構成部材間で熱変形差を生じ
る。この熱変形差は、ICチツプ搭載寸法の大ささに比例
して増大する。この熱変形差は、入出力ピンの曲げ剛性
が大きいと入出力ピン両端の接続部に集中して接続部に
損傷をきたす。
In an integrated circuit structure in which resin pads with a large number of IC chips or metal pads on the surface of the ceramics board and through holes of the printed wiring board are connected by input / output pins, the temperature of each member rises due to the heat generated by the IC chips due to energization. receive.
At this time, since the respective structural members at both ends of the input / output pin have different linear expansion coefficients, a thermal deformation difference occurs between the respective structural members. This thermal deformation difference increases in proportion to the size of the IC chip mounting dimension. If the bending rigidity of the input / output pin is large, the thermal deformation difference concentrates on the connecting portion at both ends of the input / output pin and damages the connecting portion.

本発明のように、入出力ピンのたわみ性を十分に大きく
すれば、上記熱変形差は入出力ピンの曲げ変形によつて
吸収され、入出力ピン接続部の応力負担を軽減すること
ができる。
If the flexibility of the input / output pin is made sufficiently large as in the present invention, the thermal deformation difference can be absorbed by the bending deformation of the input / output pin, and the stress load on the input / output pin connecting portion can be reduced. .

〔実施例〕〔Example〕

以下、本発明の各実施例を第1図ないし第6図を参照し
て説明する。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 6.

第1図は、本発明の一実施例に係る集積回路構造体の接
続構造および接続方法を示す構成図である。
FIG. 1 is a configuration diagram showing a connection structure and connection method of an integrated circuit structure according to an embodiment of the present invention.

第1図に示すように、集積回路素子すなわちICチツプ5
は、セラミツクス基板1の上表面において電気的に接続
されている複数個のはんだボール6上に取りつけられて
いる。一方、1個あるいは複数個(図では複数個)のIC
チツプ5を外部回路に接続するため、はんだボール6と
セラミツクス基板1の表面層および内層配線とを電気的
に導通してなる金属パツド8がセラミツクス基板1の裏
面に設けられている。
As shown in FIG. 1, an integrated circuit element or IC chip 5
Are mounted on a plurality of solder balls 6 which are electrically connected to each other on the upper surface of the ceramic substrate 1. On the other hand, one or more (more than one in the figure) ICs
In order to connect the chip 5 to an external circuit, a metal pad 8 which electrically connects the solder ball 6 and the surface layer and inner layer wiring of the ceramic substrate 1 is provided on the back surface of the ceramic substrate 1.

封止キヤツプ2は、セラミツクス基板1上に搭載された
ICチツプ5を密封手段7を介して密封するものである。
The sealing cap 2 was mounted on the ceramic substrate 1.
The IC chip 5 is sealed via a sealing means 7.

封止キヤツプ2内には、キヤツプ天井板2a内面とICチツ
プ5との間に伝熱手段3を備え、ICチツプ5の発熱をキ
ヤツプ天井板2aに伝えるようになつている。また封止キ
ヤツプ2上には、キヤツプ天井板2aに伝えられて熱を吸
収しICチツプ5の冷却を促進する流体を流通させる冷却
ジヤケツト4が取付けられている。
Inside the sealing cap 2, a heat transfer means 3 is provided between the inner surface of the cap ceiling plate 2a and the IC chip 5, so that the heat generated by the IC chip 5 is transmitted to the cap ceiling plate 2a. Further, on the sealing cap 2, a cooling jacket 4 is attached which circulates a fluid which is transmitted to the cap ceiling plate 2a and absorbs heat to promote cooling of the IC chip 5.

これらセラミツクス基板1、封止キヤツプ2、ICチツプ
5、伝熱手段3、冷却ジヤケツト4などによつて単一の
モジユールが構成される。
A single module is constituted by the ceramic substrate 1, the sealing cap 2, the IC chip 5, the heat transfer means 3, the cooling jacket 4, and the like.

一方、内層配線を有するプリント配線基板10には多数の
スルーホールを設け、多数の端子部材に係るたわみ性の
大きい入出力ピン9をスルーホールに挿入し、スルーホ
ールめつき11の入出力ピン9とをはんだ付け接合し、こ
れら多数の入出力ピン9を、前記モジユール内部とプリ
ント配線基板10との電気的接続あるいはモジユール間の
電気的接続のための外部信号伝送部品とする。
On the other hand, the printed wiring board 10 having the inner layer wiring is provided with a large number of through holes, and the flexible I / O pins 9 associated with a large number of terminal members are inserted into the through holes. These are connected by soldering, and these many input / output pins 9 are used as external signal transmission parts for electrical connection between the inside of the module and the printed wiring board 10 or between the modules.

そして、第1図に示すように、単一あるいは複数のモジ
ユールとプリント配線基板10とを太い矢印のように対向
させ、セラミツクス基板1の裏面に形成されている多数
の金属パツド8とプリント配線基板10側に固着された多
数の入出力ピン9とをはんだ接合する。このはんだ材と
して前述の入出力ピン9とプリント配線基板10のスルー
ホールめつき11との間のはんだ材より融点の低いはんだ
材を用いる。
Then, as shown in FIG. 1, a single or a plurality of modules and a printed wiring board 10 are opposed to each other as shown by thick arrows, and a large number of metal pads 8 and a printed wiring board formed on the back surface of the ceramics board 1 are arranged. A large number of input / output pins 9 fixed to the 10 side are soldered. As the solder material, a solder material having a melting point lower than that of the solder material between the input / output pin 9 and the through hole plate 11 of the printed wiring board 10 is used.

これにより、入出力ピン9のプリント配線基板10側のは
んだ接続に損傷を生じることなく、入出力ピン9とセラ
ミック基板1裏面の金属パッド8とのはんだ接合が可能
となる。それだけではなく、セラミック基板1を直接赤
外線等で加熱するか、またはセラミック基板1とプリン
ト配線基板10との間に、例えば熱風を流すなどの方法に
より、入出力ピン9と金属パッド8とのはんだ接合を外
すことができ、モジュールの交換が可能となるものであ
る。
As a result, the solder connection between the input / output pin 9 and the metal pad 8 on the rear surface of the ceramic substrate 1 can be performed without damaging the solder connection of the input / output pin 9 on the printed wiring board 10 side. Not only that, the ceramic substrate 1 is directly heated by infrared rays or the like, or the method of blowing hot air between the ceramic substrate 1 and the printed wiring board 10 is used to solder the input / output pins 9 and the metal pads 8. The joint can be removed, and the module can be replaced.

すなわち、上記の接続方法によって、多数の入出力ピン
9の同時接合がセラミツクス基板1の金属パツド8の面
上で容易に行うことができ、かつ、入出力ピン構造を極
端に柔らかくするなどのピン構造に対する細工が容易と
なる。
That is, by the above connection method, a large number of input / output pins 9 can be easily simultaneously joined on the surface of the metal pad 8 of the ceramics substrate 1, and the input / output pin structure can be made extremely soft. The structure can be easily modified.

本実施例によれば、モジユール内の回路との信号接続手
段である多数の入出力ピンの同時接続を金属パツド面上
で行うことができるので、ピン接続が容易となる。ま
た、接続に際し、接続面を対向接触してはんだ付けで
き、押しつけ力が不要となり、入出力ピン自身を柔構造
とすることが可能となる。このことは、結果的に接続部
に及ぼす熱変形を入出力ピン自身の変形で吸収でき、最
弱部である入出力ピンはんだ接合部の応力低減を図るこ
とができるものである。
According to this embodiment, since a large number of input / output pins, which are signal connecting means with the circuit in the module, can be simultaneously connected on the metal pad surface, the pin connection becomes easy. Further, at the time of connection, the connection surfaces can be brought into contact with each other to be soldered, pressing force is not required, and the input / output pin itself can have a flexible structure. As a result, the thermal deformation exerted on the connection portion can be absorbed by the deformation of the input / output pin itself, and the stress of the solder joint portion of the input / output pin, which is the weakest portion, can be reduced.

入出力ピンを柔構造にした例を第2図および第3図を参
照して説明する。
An example in which the input / output pins have a flexible structure will be described with reference to FIGS. 2 and 3.

第2図は、本発明の他の実施例に係る集積回路構造体の
端子部材の接続構造を示す断面図、第3図は、本発明の
さらに他の実施例に係る集積回路構造体の端子部材の接
続構造を示す断面図である。これら各図において、第1
図と同一符号のものは先の実施例と同等部分であるか
ら、その説明を省略する。
FIG. 2 is a sectional view showing a connection structure of terminal members of an integrated circuit structure according to another embodiment of the present invention, and FIG. 3 is a terminal of an integrated circuit structure according to still another embodiment of the present invention. It is sectional drawing which shows the connection structure of a member. In each of these figures,
The parts having the same reference numerals as those in the figure are the same parts as those in the previous embodiment, and therefore their explanations are omitted.

第2図の実施例では、プリント配線基板10のスルーホー
ルに多数の細線を束ねて挿入し、スルーホールめつき11
とはんだ接合し、細線ピン12として端子部材を形成した
ものである。
In the embodiment shown in FIG. 2, a large number of thin wires are bundled and inserted into the through holes of the printed wiring board 10, and the through holes are attached.
And a terminal member is formed as the thin wire pin 12 by soldering.

第2図の実施例によれば、先の第1図の実施例で説明し
たと同様の効果が期待され、特に細線ピン12がたわみ性
の大きい柔構造であるため、接続部における熱変形の吸
収が効果的に行われる。
According to the embodiment shown in FIG. 2, the same effect as that described in the embodiment shown in FIG. 1 is expected, and in particular, since the thin wire pin 12 has a flexible structure having a large flexibility, the thermal deformation of the connecting portion is prevented. The absorption is effective.

次に第3図の実施例では、プリント配線基板10のスルー
ホールに挿入固着する端子部材を、セラミツクス基板1
とプリント配線基板10との間で螺旋状に形成された螺旋
状部材14としたものである。スルーホール内に挿入する
部分はほぼ真値のピンを形成しており、スルーホール充
填用はんだ13によつて確実に固着される。
Next, in the embodiment shown in FIG. 3, the terminal member which is inserted into and fixed to the through hole of the printed wiring board 10 is attached to the ceramic board 1.
The spiral member 14 is formed in a spiral shape between the printed wiring board 10 and the printed wiring board 10. The portion to be inserted into the through hole forms a pin having a substantially true value, and is securely fixed by the through hole filling solder 13.

第3図の実施例によれば、前述の第1,2図の各実施例と
同様の効果が期待されるほか、部材の螺旋加工は、部材
をスルーホールに挿入する前後いずれの工程においても
行うことが可能である。
According to the embodiment of FIG. 3, the same effect as that of each of the embodiments of FIGS. 1 and 2 described above can be expected, and the spiral machining of the member can be performed both before and after inserting the member into the through hole. It is possible to do.

螺旋状部材14は、十分な弾性をもつ柔構造の端子部材と
して機能することはいうまでもない。
It goes without saying that the spiral member 14 functions as a flexible structure terminal member having sufficient elasticity.

ところで、ICチツプの高集積化にともなつて、プリント
配線基板10の厚さが増し、入出力ピンを挿入するスルー
ホール部分が長くなる。このため、入出力ピンとスルー
ホールとの間のはんだ接合におけるはんだのぬれ性が著
しく低下し、接続不良を生じる恐れがある。
By the way, as the IC chip is highly integrated, the thickness of the printed wiring board 10 is increased, and the through hole portion for inserting the input / output pin becomes longer. For this reason, the wettability of the solder in the solder joint between the input / output pin and the through hole is significantly reduced, and there is a possibility that a connection failure may occur.

そこで、入出力ピンとスルーホールとの間隙におけるは
んだのあがりを促進させた例を以下に説明する。
Therefore, an example in which the rise of the solder in the gap between the input / output pin and the through hole is promoted will be described below.

第4図は、本発明のさらに他の実施例に係る集積回路構
造体の端子部材の接続構造を示す断面図、第5図ないし
第7図は、いずれも端子部材に係る入出力ピンの形状を
示す正面図である。
FIG. 4 is a sectional view showing a connection structure of terminal members of an integrated circuit structure according to still another embodiment of the present invention, and FIGS. 5 to 7 are all shapes of input / output pins related to the terminal members. FIG.

第4図において、第1図と同一符号のものは第1図の実
施例と同等部分であるから、その説明を省略する。
In FIG. 4, the same reference numerals as those in FIG. 1 are the same parts as those in the embodiment of FIG.

第4図の実施例では、端子部材に係る入出力ピン9Aは、
そのピン外周にピン軸方向にはんだ流路となるべき溝16
を複数個形設したもので、セラミツクス基板1とプリン
ト配線基板10との間で開口部を設けている。
In the embodiment of FIG. 4, the input / output pin 9A related to the terminal member is
Groove 16 that should become a solder flow path in the pin axial direction on the outer periphery of the pin
A plurality of openings are provided, and an opening is provided between the ceramics board 1 and the printed wiring board 10.

このようなピン形状により、プリント配線基板10のスル
ーホールにおけるはんだ接合時に、スルーホール充填用
はんだ13は溝16を流路として均一にあがり、スルーホー
ル上部開口部で空気流路が確保され、部分的はんだあが
りによるスルーホールの閉塞が防止される。
With such a pin shape, at the time of solder joining in the through hole of the printed wiring board 10, the through hole filling solder 13 uniformly rises using the groove 16 as a flow path, and an air flow path is secured in the upper opening of the through hole. Through holes are prevented from being blocked by the selective soldering.

第4図において、15は、入出力ピン9Aの頭部と金属パツ
ド1とを接続するろう材を示している。
In FIG. 4, reference numeral 15 denotes a brazing material connecting the head of the input / output pin 9A and the metal pad 1.

入出力ピンのはんだ流路の例を第5図ないし第7図に示
す。
Examples of solder flow paths for the input / output pins are shown in FIGS.

第5図の例は、入出力ピン9Bのはんだ流路を螺旋状の溝
17に加工したもので、はんだは螺旋状の溝17に添つて適
正にあがり、はんだ接合部のぬれ性を良くする。
In the example shown in Fig. 5, the solder flow path of the input / output pin 9B is a spiral groove.
It is processed into 17 and solder properly rises along the spiral groove 17 to improve the wettability of the solder joint.

第6図の例は、入出力ピン9Cの軸心部にパイプ状に流路
18aを加工したもので、スルーホール上部となる位置に
開口部18bを設けたものである。
The example in Fig. 6 shows a pipe-shaped flow path at the center of the input / output pin 9C.
18a is processed, and an opening 18b is provided at a position above the through hole.

第7図の例は、入出力ピン9Dのピン軸方向に、プリント
配線基板10のスルーホールにおけるはんだ接合すべき部
分を複数に細断し割りピン部19を形成したものである。
In the example of FIG. 7, the split pin portion 19 is formed by cutting a plurality of portions of the through hole of the printed wiring board 10 to be soldered in the axial direction of the input / output pin 9D.

このピン形状によれば、はんだは割りピン部19内の間隙
をはんだ流路としてあがることができる。
According to this pin shape, the solder can rise through the gap in the split pin portion 19 as a solder flow path.

このように第4図ないし第7図の各実施例によれば、先
の第1図の実施例と同様の効果が期待されるとともに、
入出力ピンのスルーホール内はんだ接合において、スル
ーホール内のはんだぬれ性が良好となり、接続不良が軽
減できる。結果的には、信頼性が高く、コンパクトな信
号接続構造が得られる。
As described above, according to the embodiments of FIGS. 4 to 7, the same effect as that of the embodiment of FIG. 1 is expected, and
When soldering the input / output pins in the through holes, the solder wettability in the through holes is improved, and connection defects can be reduced. As a result, a highly reliable and compact signal connection structure can be obtained.

なお、前述の各実施例では、多数の入出力ピンは、プリ
ント配線基板のスルーホールにはんだ接合したのち、そ
の入出力ピンの頭部とセラミツクス基板面の金属パツド
とを接続する、本発明の特徴点を説明したが、第4図な
いし第7図の入出力ピンは、これら入出力ピンをろう材
15を介してセラミック基板面の金属パツドに接合したの
ち、その入出力ピンをプリント配線基板のスルーホール
に挿入してはんだ接合する、本発明以外の接合構造にも
適用できることを付記する。
In each of the above-described embodiments, a large number of input / output pins are soldered to the through holes of the printed wiring board, and then the heads of the input / output pins are connected to the metal pads on the surface of the ceramic substrate. The characteristic points have been explained, but the input / output pins of FIGS.
It is also noted that the present invention can be applied to a joining structure other than the present invention in which the input / output pin is inserted into a through hole of a printed wiring board and soldered after being joined to the metal pad on the surface of the ceramic substrate via 15.

〔発明の効果〕 以上詳細に説明したように、本発明によれば、セラミッ
クス基板のプリント配線基板とを複数の端子部材により
接続するに際し、多数の端子部材を効率的に接続するこ
とができ、接続部に及ぼす熱変形を端子部材に係る入出
力ピン自身の柔構造によって吸収しうる、信号接続の信
頼性の高い集積回路構造体を提供することができる。
[Effects of the Invention] As described in detail above, according to the present invention, when connecting a printed wiring board of a ceramic substrate by a plurality of terminal members, a large number of terminal members can be efficiently connected, It is possible to provide an integrated circuit structure with high reliability of signal connection, in which thermal deformation exerted on the connection portion can be absorbed by the flexible structure of the input / output pin itself related to the terminal member.

【図面の簡単な説明】[Brief description of drawings]

第1図は、本発明の一実施例に係る集積回路構造体の接
続構造および接続方法を示す構成図、第2図は、本発明
の他の実施例に係る集積回路構造体の端子部材の接続構
造を示す断面図、第3図は、本発明のさらに他の実施例
に係る集積回路構造体の端子部材の接続構造を示す断面
図、第4図は、本発明のさらに他の実施例に係る集積回
路構造体の端子部材の接続構造を示す断面図、第5図な
いし第7図は、いずれも端子部材の形状を示す正面図で
ある。 1……セラミツクス基板、5……ICチツプ、8……金属
パツド、9,9A,9B,9C,9D……入出力ピン、10……プリン
ト配線基板、12……細線ピン、14……螺旋状部材、16,1
7……溝、18a……流路、19……割りピン部。
FIG. 1 is a configuration diagram showing a connection structure and connection method of an integrated circuit structure according to an embodiment of the present invention, and FIG. 2 is a terminal member of an integrated circuit structure according to another embodiment of the present invention. FIG. 3 is a sectional view showing a connection structure, FIG. 3 is a sectional view showing a connection structure of a terminal member of an integrated circuit structure according to still another embodiment of the present invention, and FIG. 4 is another embodiment of the present invention. 5 to 7 are sectional views showing the connection structure of the terminal members of the integrated circuit structure according to the present invention, and FIGS. 5 to 7 are front views showing the shapes of the terminal members. 1 …… ceramics board, 5 …… IC chip, 8 …… metal pad, 9,9A, 9B, 9C, 9D …… input / output pin, 10 …… printed wiring board, 12 …… fine wire pin, 14 …… spiral Member, 16,1
7 ... Groove, 18a ... Flow path, 19 ... Split pin part.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】1個あるいは複数個の集積回路素子を搭載
し、この集積回路素子を外部回路に接続するための金属
パッドを形成してなるセラミックス基板と、内層配線を
有するプリント配線基板とを備え、これらセラミックス
基板とプリント配線基板とを複数の端子部材により電気
的に接続してなる集積回路構造体において、 前記複数の端子部材は、前記プリント配線基板のスルー
ホールめっきにはんだ接合してなる複数のたわみ性の大
きい入出力ピンであり、 これら複数の入出力ピンの端部と前記セラミックス基板
の金属パッドとを、前記入出力ピンと前記スルーホール
めっきとの間のはんだ材より融点の低いはんだ材を用い
て接合したことを特徴とする集積回路構造体。
1. A ceramic substrate on which one or a plurality of integrated circuit elements are mounted and metal pads for connecting the integrated circuit elements to an external circuit are formed, and a printed wiring board having inner layer wiring. An integrated circuit structure comprising these ceramic substrates and a printed wiring board electrically connected by a plurality of terminal members, wherein the plurality of terminal members are soldered to through-hole plating of the printed wiring board. A plurality of flexible I / O pins, the end portions of the plurality of I / O pins and the metal pad of the ceramic substrate having a lower melting point than the solder material between the I / O pins and the through-hole plating; An integrated circuit structure characterized by being joined using a material.
【請求項2】特許請求の範囲第1項記載のものにおい
て、入出力ピンは、複数本の細線を束ね、スルーホーン
内ではんだ接合したものであることを特徴とする集積回
路構造体。
2. The integrated circuit structure according to claim 1, wherein the input / output pin is formed by bundling a plurality of thin wires and soldering them together in a through horn.
【請求項3】特許請求の範囲第1項記載のものにおい
て、入出力ピンは、セラミックス基板とプリント配線基
板との間で、螺旋状に形成されたものであることを特徴
とする集積回路構造体。
3. The integrated circuit structure according to claim 1, wherein the input / output pins are spirally formed between the ceramic substrate and the printed wiring board. body.
【請求項4】特許請求の範囲第1項記載のものにおい
て、入出力ピンは、プリント配線基板のスルーホールに
おけるはんだ接合時にはんだを流通せしめる流路を形設
してなるものであることを特徴とする集積回路構造体。
4. The input / output pin according to claim 1, wherein the input / output pin is formed with a flow path for allowing the solder to flow during solder joining in a through hole of a printed wiring board. Integrated circuit structure.
【請求項5】特許請求の範囲第1項記載のものにおい
て、入出力ピンは、プリント配線基板のスルーホール内
ではんだ接合すべき部分を複数に細断した割りピン状に
形成したものであることを特徴とする集積回路構造体。
5. The input / output pin according to claim 1, wherein the input / output pin is formed in a split pin shape in which a portion to be soldered in a through hole of a printed wiring board is cut into a plurality of pieces. An integrated circuit structure characterized by the above.
JP13483886A 1986-06-12 1986-06-12 Integrated circuit structure Expired - Lifetime JPH0754837B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13483886A JPH0754837B2 (en) 1986-06-12 1986-06-12 Integrated circuit structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13483886A JPH0754837B2 (en) 1986-06-12 1986-06-12 Integrated circuit structure

Publications (2)

Publication Number Publication Date
JPS62291950A JPS62291950A (en) 1987-12-18
JPH0754837B2 true JPH0754837B2 (en) 1995-06-07

Family

ID=15137645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13483886A Expired - Lifetime JPH0754837B2 (en) 1986-06-12 1986-06-12 Integrated circuit structure

Country Status (1)

Country Link
JP (1) JPH0754837B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2548602B2 (en) * 1988-04-12 1996-10-30 株式会社日立製作所 Semiconductor mounting module
JPH0735412Y2 (en) * 1989-07-31 1995-08-09 太陽誘電株式会社 Hybrid integrated circuit
JP6135296B2 (en) 2013-05-20 2017-05-31 富士通株式会社 Package structure and method for bonding package structure to substrate

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208853A (en) * 1985-03-14 1986-09-17 Toshiba Corp Ic package

Also Published As

Publication number Publication date
JPS62291950A (en) 1987-12-18

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