JPH0758744B2 - Method for manufacturing substrate for mounting semiconductor tower - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor mounting substrate, and more particularly to a method for manufacturing a package substrate having high density electrode terminals on its side surface.

(Prior Art) In recent years, leaded or leadless chip carriers made from ceramic or plastic substrates have been used. A common problem with these chip carriers is that it was difficult to increase the density of external connection terminals.

Japanese Unexamined Patent Publication No. 57-130454 and Japanese Unexamined Patent Publication No. 59-125641 disclose a ceramic leadless chip carrier as shown in FIGS. 7 and 8, and Japanese Unexamined Patent Publication No. 60-249355. A plastic chip carrier with leads as shown in FIG. 9 is introduced.

However, the solder-connecting conductor terminals formed on the side surfaces of the ceramic leadless chip carrier are made of conductors deposited or applied by plating or printing on the inner wall of the through-hole that has been drilled. With these manufacturing methods, there is a limit to the diameter of the holes, and the insulator existing between the holes cannot be extremely thinned.Therefore, the pitch of the side conductor terminals is 1.27 mm, the inner diameter is Was generally 0.8 mm, and it was extremely difficult to set the terminal pitch to 0.6 mm or less.

On the other hand, the plastic chip carrier with leads uses a lead frame made by punching or chemical milling, and is fixed to the plastic substrate by resin bonding, or after mounting the semiconductor element on the lead frame,
A method of resin-molding the entire lead frame except for external terminal portions has been used. In these leaded chip carriers, if the lead frame metal plate is made extremely thin, the adhesive strength or the rigidity in the mold deteriorates. To avoid this, a relatively thick one is used. Therefore, the terminal pitch is limited to about 0.6 mm, and in addition, since the part where this chip carrier external lead is located is smooth, the external lead easily slips and is easily deformed by lateral external force. There was a problem.

As means for solving such a problem, for example, as disclosed in JP-A-61-285740, as shown in FIG. 10, a spacer is provided on the outer peripheral edge of the package body,
It is conceivable that the conductor circuit on the surface of the base material is also routed to the surface of the spacer to use the conductor circuit on the surface of the spacer as an external electrode. As a method of manufacturing such a package, for example, as disclosed in Japanese Patent Laid-Open No. 60-64454, as shown in FIG. 11, a conductor circuit of a portion provided on the surface of the package body is used. And a part of the conductor circuit that is routed to the surface of the spacer are formed in advance by plating, the package body is attached to this conductor circuit, and the conductor circuit is bent in the side direction of the package body to form the external terminals. It is possible to form. Here, since the conductor circuit is formed by plating, a fine external terminal can be obtained.

However, the manufacturing method as described above has a problem that complicated steps such as a plating process and an accompanying plating pretreatment are required to form the conductor circuit.

Depending on the manufacturing method as described above, the conductor circuit (30A in FIG. 10) on the upper surface of the package body can be routed from the side surface of the package body to the spacer surface, but the conductor circuit on the lower surface of the package body ( 30B in FIG. 10) There is a problem that the shape of the package that can be manufactured is limited because it cannot be routed between the package body and the spacer to the surface of the spacer.

(Problems to be Solved by the Invention) The present invention has been made in view of the above circumstances, and it is possible to achieve high density without lowering reliability and sufficiently cope with an increase in external connection terminals. It is an object of the present invention to provide a technique capable of easily manufacturing semiconductor mounting substrates having various shapes.

(Means for Solving Problems) Means adopted by the present invention for solving the above problems include a base material on which a semiconductor element is mounted and an external connection terminal bonded on the base material. And a conductor circuit which is formed of copper foil and is disposed between the base material and the frame body and which is adhered along the surface of the frame body and partially constitutes an external terminal. A method of manufacturing a mounting substrate, comprising: (1) to (7) below, a method of manufacturing a semiconductor mounting substrate, (1) applying an adhesive to a base material surface of a laminate. (2) Cutting the laminated plate along the outer periphery of the base material formed on the laminated plate to form a through groove portion; (3) Attaching a copper foil to the adhesive surface of the laminated plate Step; (4) A conductor circuit is formed on the surface of the base material by etching the copper foil. At the same time, a step of forming a conductor lead for external connection also in the through groove portion; (5) a step of applying an adhesive to a frame body formed in advance and then bonding the frame body along the outer periphery of the base material; (6) A step of cutting the external terminal conductor lead formed in the through groove portion along the outer periphery of the through groove portion; (7) The external terminal conductor lead thus cut is formed on the surface of the frame body. A process of forming an external terminal by adhering along is the gist thereof.

Next, the present invention will be described in detail with reference to the drawings.

As shown in FIG. 1, in the semiconductor mounting substrate manufactured by the manufacturing method of the present invention, the frame body (8) is bonded onto the base material (3). ) A conductor circuit (7) having a length capable of protruding to the outside of the frame body (8) passes between the base material (3) and the frame body (8), and a side surface of the frame body (8). And the lower surface is also adhered, and a part of this conductor circuit (7) forms an external terminal (9).

FIG. 2 shows a vertical cross section of the frame body (8). The shape of the frame body (8) can be selected according to the wiring pattern of the board to be mounted, and as shown in FIG. The body (8) may be larger than the outer circumference of the base material (3) so that the inner peripheral edge of the frame body (8) overlaps the base material (3).

FIG. 4 shows a structure in which a metal plate (11) is attached to the rear surface of the semiconductor element mounting portion of the base material (3) in order to further enhance the heat dissipation effect. Material (3)
It is itself formed of a metal plate (11).

6 (a) to 6 (g) show a method of manufacturing a semiconductor mounting substrate according to the present invention by a vertical cross-sectional view of a chip carrier. Next, a manufacturing method according to the present invention will be described based on this drawing.

The laminated plate (2) shown in FIG. 6 (a) is made of a plastic material such as glass epoxy, triazine or polyimide, or a metal material such as aluminum, copper, iron, or an alloy metal plate thereof whose surface is covered with an insulating film. It may be.

The adhesive shown in FIG. 6 (a) is a mixture of an epoxy resin and an epoxy acrylate resin, or an epoxy resin and a synthetic rubber, and has low resin fluidity during heating.

The through groove portion (5) in FIG. 6 (b) is formed by a die or router process.

The conductor circuit (7) and the conductor lead (6) for external terminals in FIG. 6 (d) are formed by an appropriate etching solution.

The frame body (8) of FIG. 6 (e) can be freely selected according to the material of the wiring board to be mounted. For example, if the wiring board to be mounted is a glass epoxy material, it may be a glass epoxy material molded by a router or a stamping process, a molded body such as polyethylene or polysulfone, or the wiring board to be mounted may be a ceramic material. For example, a ceramic molded body can be used as the frame body (8). That is, since the material of the frame body (8) can be determined according to the linear expansion coefficient of the wiring board material to be mounted,
The connection reliability of the terminal portion can be greatly improved.

The adhesive (12) of FIG. 6 (e) is a synthetic resin that can be in a semi-cured state, such as a mixture of an epoxy resin and an epoxy acrylate resin, or a mixture of an epoxy resin and a synthetic rubber, and the frame body (8). When joining the base material (3) to the base material (3), it is melt-bonded once but in a semi-cured state.
The conductor lead (6) for external terminal shown in FIG. 6 (f) is bent along the frame (8) and then completely cured by heating.

The external terminal conductor lead (6) and the external terminal portion (9) shown in FIG. 6 (f) are cut off from the laminated plate (2) at the end in advance at the circuit forming stage of FIG. 6 (d). There are two methods of making or cutting at the time of bending in Fig. 6 ( g ). Especially in a high-density fine circuit, cutting immediately before bending (Fig. 6 ( g )) is performed. desirable.

(Examples) Next, the present invention will be specifically described by way of examples, but the present invention is not limited to the following examples.

Example 1 A single-sided copper-clad glass epoxy base material was used for the semiconductor element mounting substrate shown in FIG. 6 (a). Polysulfone was used for the external terminal frame (8) shown in FIG. 6 (e) by injection molding in the shape shown in FIG. 2 (b). Sixth
The copper foil for the conductor circuit (7) shown in FIG.
A rolled copper foil having a thickness of μm (manufactured by Nikko Gould Foil Co., Ltd.) was used.

Next, the composition of the adhesive used for attaching the conductor circuit copper foil and adhering the frame is shown. In the following composition, "part"
The term "all" means "parts by weight".

Bisphenol A type epoxy methacrylate resin (average molecular weight 1000, manufactured by Nippon Yupica Co., Ltd., trade name Neopol 810)
(I) is a composition prepared by mixing 100 parts of 4), 75 parts of diallyl phthalate (manufactured by Osaka Soda Co., Ltd.) as a copolymerizable cross-linking agent, and 1.8 parts of benzoyl peroxide as a radical polymerization initiator. Further, a composition prepared by mixing 100 parts of a bisphenol A type epoxy resin (average molecular weight 380, trade name E-828 manufactured by Yuka Shell Co., Ltd.) and 4.0 parts of dicyandiamide as a curing agent is referred to as (II), and the composition (I ) And (II) were mixed at a ratio of 2: 1 and then kneaded by a three-roll mill to obtain an adhesive.

Example 2 A semiconductor element mounting substrate shown in FIG. 6 (a) is provided with a single-sided copper clad polyimide base material, and an external terminal frame body (8) shown in FIG. 6 (e) is formed by injection molding. Polyetherimide processed into the shape shown in FIG. 2 (b) was used. Also, the sixth
The copper foil for the conductor circuit (7) shown in FIG.
Same as Example 1 except that a double-sided roughened foil having a thickness of μm (manufactured by Nikko Gould Foil Co., Ltd.) was used.

Example 3 Example 1 was repeated except that an aluminum plate having a surface covered with an insulating film was used for the semiconductor element mounting substrate shown in FIG. 6 (a).
Same as.

Comparative Example 1 The ceramic leadless chip carrier shown in FIG.

Comparative Example 2 The plastic chip carrier with leads shown in FIG.

The results of evaluation of the conductor width, the external terminal pitch, and the connection reliability of the above Examples 1, 2, 3 and Comparative Examples 1, 2 are shown in the table. The connection reliability was evaluated by the following method.

-65 ℃ ・ 15 minutes, 2 minutes left, 125 ℃ ・ 15 minutes thermal shock test 100
The conduction resistance after the cycle was measured to evaluate the presence or absence of disconnection.

(Effects of the Invention) (1) Since the conductor circuit and the conductor lead for external terminals can be formed by etching a thin copper foil, fine processing with a conductor width of about 0.06 mm is possible, and the external terminal pitch is 0.12 mm. It is possible to some extent.

(2) The laminated plate can be freely selected, and a high heat dissipation substrate such as a metal plate or a ceramic substrate having good heat resistance can be arbitrarily selected.

(3) Since the structure and material of the frame can be freely selected, when mounting a package having a large number of external terminals on a printed wiring board by soldering, the external terminal pitch can be designed according to the mounting technology, In addition, the coefficient of linear expansion of the printed wiring board can be matched.

(4) The heat sink can be easily attached to the back surface of the semiconductor element mounting portion.

(5) The external terminal leads are firmly fixed with an adhesive, and the external leads are not deformed at all.

(6) Since the conductor circuit and the conductor lead for the external terminal can be formed by etching the copper foil, it is possible to form the conductor circuit by a simple process without requiring complicated processes such as plating and pretreatment. .

(7) A variety of semiconductor-mounting substrates, in which the conductor circuit can be drawn not only between the base material and the frame body to the surface of the frame body but also from the side surface of the base material to the surface of the frame body. Can correspond to.

[Brief description of drawings]

1 is a perspective view showing a chip carrier manufactured by the manufacturing method of the present invention, FIG. 2 is a longitudinal sectional view showing a frame body, and FIG. 3 is another chip carrier manufactured by the manufacturing method of the present invention. FIGS. 4 and 5 are vertical sectional views showing a chip carrier with a heat sink, and FIG. 6 is a vertical sectional view showing each step of the method for manufacturing a semiconductor mounting substrate according to the present invention.
FIG. 7 is a perspective view showing a conventional ceramic leadless chip carrier, FIG. 8 is a perspective view showing a conventional ceramic chip carrier with a heat sink, and FIG. 9 is a perspective view showing a conventional plastic chip carrier with leads. , Tenth
FIG. 11 is a vertical sectional view showing a conventional package, and FIG. 11 is a vertical sectional view showing a conventional manufacturing method. DESCRIPTION OF SYMBOLS 1 ... Copper foil, 2 ... Laminated plate, 3 ... Base material, 4 ... Adhesive, 5 ... Through groove, 6 ... Conductor lead for external terminal, 7
... Conductor circuit, 8 ... Frame, 9 ... External terminal, 10 ... Semiconductor element, 11 ... Metal plate, 12 ... Adhesive, 21 ... Base material,
22 …… chip, 23 …… external terminal, 24 …… chip terminal, 25
...... Wire bonding pad, 26 ...... Heat sink, 27 ...... Mold resin, 28 ...... Package, 29 ...... Package body, 30, 30 (A), 30 (B) ...... Conductor circuit,
31 …… Spacer.

Claims (6)

[Claims] 1. A base material on which a semiconductor element is mounted, a frame body for external connection terminals which is adhered onto the base material, and which is formed of copper foil and is arranged between the base material and the frame body. A method for manufacturing a semiconductor mounting substrate having a conductor circuit which is adhered along the surface of a frame and partially constitutes an external terminal, and includes the following steps (1) to (7): A method for manufacturing a semiconductor mounting substrate, including: (1) a step of applying an adhesive to the base material surface of the laminate; (2) cutting the laminate along the outer periphery of the base material formed on the laminate. And (3) a step of adhering a copper foil to the adhesive surface of the laminated plate; (4) a conductor circuit is formed on the surface of the base material by etching the copper foil. At the same time, a step of forming a conductor lead for external connection also in the through groove portion; A step of applying an adhesive to the formed frame body and then adhering the frame body along the outer periphery of the base material; (6) The external terminal conductor lead formed in the through groove portion is provided on the outer periphery of the through groove portion. (7) A step of forming external terminals by adhering the conductor leads for external terminals thus cut along the surface of the frame body. 2. The method for manufacturing a semiconductor mounting substrate according to claim 1, wherein the adhesive applied to the frame is a mixture of an epoxy resin and an epoxy acrylate resin. 3. The method for manufacturing a semiconductor mounting substrate according to claim 1, wherein the conductor circuit is bonded to the side surface and the lower surface of the frame body. 4. The frame body is processed into a trapezoidal shape whose longitudinal section is wide on the side bonded to the base material and narrow on the opposite side.
Item 5. A method for manufacturing a semiconductor mounting substrate according to any one of items 3 to 3. 5. The frame is larger than the outer periphery of the base material,
The method for manufacturing a semiconductor mounting substrate according to any one of claims 1 to 4, wherein an inner peripheral edge portion of the frame body overlaps with the base material. 6. The method for manufacturing a semiconductor mounting substrate according to claim 1, further comprising the step of attaching a metal plate to the back surface of the semiconductor element mounting portion.