JPH0782054B2 - Zero-phase current detection method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for detecting a zero-phase current in an AC circuit, and more particularly to a zero-phase current detection method in which the influence of an error factor on the zero-phase residual current is removed. .

<Prior Art> Conventionally, as a method of adding a current of each phase measured by using a current transformer to obtain a zero-phase current of an alternating current circuit, the same applicant of the present invention has disclosed a Japanese Patent Laid-Open No. 63-304174. There is one disclosed in the publication, which will be described with reference to FIG. Reference numeral 31 is a delay element, 32 is an adder, and 33 is an input terminal for a zero-phase current after currents for three phases have already been added.

The first zero-phase current 35 input from the input terminal 33 is directly input to the adder 32 and is branched at the input end to delay element 31.
After a predetermined delay time (for example, an integral multiple of the frequency of the zero-phase current), the second zero-phase current 36 becomes and the adder is also added.
It is input to 32, subtraction is performed between the two, and output terminal 34
The procedure is to obtain the third zero-phase current 37.

By setting the delay time by the delay element 31 to be sufficiently shorter than the increase / decrease cycle of the current flowing in the electric circuit and sufficiently longer than the detection time of the zero-phase current at the time of a ground fault, the zero-phase residual current that changes gently Has substantially the same waveform at the inlet of the adder 32, so the third zero-phase current 37, which is the output of the adder (actually subtraction), becomes almost zero, and malfunctions due to residual current, etc. even if the circuit is unbalanced. It has the effect of eliminating obstacles.

<Problems to be Solved by the Invention> According to the residual current removal method in the above-described zero-phase current detection method, a constant delay time is passed through the first AC waveform of the fundamental frequency (for example, 60 Hz) and the delay element. Since the subtraction is performed with respect to the given second AC waveform, it is possible to effectively remove a variation or variation equivalent to the delay time. However, for example, when there is an input such as a waveform variation due to a change in frequency, a waveform shift occurs, and residual removal is performed by subtraction, so an error based on the shift occurs as a residual component at each subtraction. The error based on this residual amount often exceeds 5%, which causes a problem of malfunction of the protection relay.

<Means for Solving the Problem> A first zero-phase current detected by an AC device provided in an AC electric path and a second zero-phase current obtained by passing the first zero-phase current through a delay element are provided. In the zero-phase current detection method of a method of obtaining a third zero-phase current by removing a residual current by inputting it to a subtraction circuit provided after the delay element, the delay element is a series of N constituent elements. Arithmetic means for forming an average value f from a part of the already arithmetically processed data stored in each element of the serial register and the latest data A; and the serial register with the obtained average value f. Replacing means for rewriting a predetermined element, means for comparing the latest input data A with a data output F (N) that has been processed before N synchronization and fetched from the serial register, and the latest data A is input. Get when you do It is composed of means for comparing the average value f which is the calculated result and the data output F (N) before the N cycle, and it is judged that the third zero-phase current is generated when these comparing means are satisfied at the same time. I did it.

<Operation> In the present invention, the serial register 25 having the number of constituent elements N is used as the delay element.

In the arithmetic means for performing the averaging process on the input data, each constituent element of the serial register 25 is changed from the left to F1 ,,, FN.
In the first step 1, the contents of the elements F1 to F (N-1) of the serial register are read, added with the latest input data A, divided by the number of elements N, and the average value f It is stored in the register fr for temporary storage.

In the next Step 2, the contents of the serial register 25 are shifted to the right by one element, and then in Step 3, the temporary storage register is newly changed to the pressure end element F1.
A replacement process is executed in which the content f temporarily stored in fr is written.

Also, in step 2, the contents of the rightmost element FN of the serial register 25 is output from the serial register 25 and the second cycle is delayed by N cycles.
Of zero-phase current data F (N).

Since this shift and replacement process is executed, the contents of each element of the serial register always contain only the averaged data, so that the input value A directly
Never written to 25. As a result, for example, even if a single large change amount appears in the input, the operation, shift, and permutation process are repeated N times. Therefore, in the (N + 1) th shift, N cycles before (large change The data (when the minute is input) is averaged with the data that has been subjected to the averaging process before that, and becomes the data in which the variation is sufficiently reduced.

On the other hand, if a change of approximately constant magnitude is continuously input N times or more due to the occurrence of a one-line ground fault accident, the effects of the averaging calculation and the replacement process hardly appear in the calculation result, and the residual removal is eliminated. The third zero-phase current obtained by the subtraction in the circuit clearly determines that the zero-phase current is generated due to the occurrence of the ground fault.

According to the present invention, this operation is performed for all the latest input data, so that all of the data in each element of the serial register is replaced with the data subjected to the average value processing.

Therefore, for example, the latest data A and the average value f are included in the residual removal circuit at the next stage where the residual removal of the zero-phase current is actually performed.
And three input terminals for the arithmetic processing data F (N) before N cycles are provided, and an H determination output and an L determination output are output. That is, H: (f−F (N))> S1 …… (1) L: (A−F (N))> S2 …… (2) However, S1 and S2 are set values for judging relay operation. is there. It is detected by the AND circuit that these judgment expressions are satisfied at the same time, and the generation of the zero-phase current is confirmed by the judgment result.

By appropriately selecting the size of N for the N pieces of data for calculating the average value f, it becomes possible to effectively remove the residual current due to the influence of minute noise or frequency fluctuation. By performing the calculation on the left side of Equation 2, as for the noise input in one shot, its influence does not appear in the next cycle.

<Embodiment> An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram showing the configuration of a delay element circuit that functions as a delay element for N cycles, a residual removal circuit, and a determination circuit in response to an input 3l ₀ from the residual circuit. Reference numeral 1 is an input terminal, 2 is a digital filter circuit having a fundamental wave of 60 Hz, 3 is an arithmetic circuit for performing averaging processing, 4 is a shift and replacement circuit, and the arithmetic circuit 3 and the replacement circuit 4 are delay elements. Serial register for function 25
It is composed by. Reference numeral 5 is a residual removal circuit, which is substantially composed of a circuit for performing comparison and subtraction.

Reference numerals 6 and 7 are failure determination circuits, which compare with settling values S1 and S2 separately determined, and when they are satisfied at the same time, an output is obtained from an OR circuit of 8 and output to an output terminal of 9. It Ten
Indicates the latest data A that has been input as the data of the zero-phase current 3l ₀ and has passed through the digital filter circuit 2, and is a work Ar register arranged immediately before the serial register 25 in FIG. Entered in. The number of constituent elements of the serial register 25 is determined by the delay time required as a delay element, and the value of N is actually selected to be about 10 to 11, but here it is shortened for convenience and determined from the arithmetic processing as N = 4. A method of detecting the zero-phase current that reaches the following will be described below.

FIG. 2 shows a serial register 25 which functions as a delay element.
Is a schematic diagram for explaining the change of data and the situation of movement. In the figure (a), it is shown that A (= 100) is input as the latest data to the work register Ar in step 1. Therefore, it is assumed that the arithmetic processing results 10, 20, 30, and 40 so far have already been entered in the elements F1 to F4 of the serial register. In this figure, in this state, the contents of the working register Ar and the contents of the serial registers F1 to F3 are added, and the average value f obtained by dividing by the number of elements N = 4 is the register fr for temporary storage.
In this case, f (= 50) is written. When this writing is completed, the serial register 25 is then shifted to the right in step 2 of the same figure (b), and the contents of each element are moved to the right one by one. In this state, the content of the F1 element of the serial register 25 is erased and becomes zero, for example. Next, in step 3 of the same figure (c), the contents stored in the register fr are written into the serial register 25F1, and the replacement is performed. Then, the process returns to step 1 of (a) and the circulating work is executed.

On the other hand, in step 1, the latest data A is input to the front work register Ar, and at the same time, its value is also input to the residual elimination circuit 5 by the input terminal 15, and the average value f which is the average calculation result is also input. Input from terminal 14. In step 2, when the shift is performed, the value of the F4 element F (4) (= 4
0) is output so as to be extruded, and this becomes the second zero-phase current, which is input from the input terminal 13 to the residual removal circuit 5.

The residual elimination circuit 5 includes an H residual elimination circuit that subtracts the value of F (4) from the average value f including the latest data A and an L residual elimination circuit that subtracts F (4) from the latest input value A. Each of the decision circuits 6 and 7 in the next stage
Compared with 1, S2. First, as a set value of zero-phase current, for example,
S2 = 80 is determined, and S1 = 20 can be set by similarly setting the value of 1/4, and H: f−F (4)> 20 (3) L: A−F (4)> 80 ...... (4) is the judgment formula, and when the values of A and F (4) are substituted, it becomes H: 40-40 = 0 L: 100-40 = 60, so in this example, both H and L judgment formulas Is not satisfied, it is determined that no zero-phase current is generated.

If the input is a one-shot noise type, the H formula works effectively, and the L judgment formula is 2 for moderate frequency fluctuations.
The generation of zero-phase current is confirmed when it is confirmed that the condition is satisfied continuously for 4 cycles. In this case, N = 10 to 11 is adopted.

It should be noted that what is referred to as a circuit here is not necessarily limited to hardware as an individually assembled individual electric circuit, and can be given as a function or procedure of software centered on a microprocessor, for example. In addition, although the residual current is illustrated as an example, it is needless to say that the current can be replaced with a voltage and the present invention can be applied to vector synthesis of zero-phase voltage. According to the experimental results of the present inventors, in the 60 Hz system, when the number of averages and the value of N are N = 10 and a frequency change of ± 3 Hz at the maximum is given, the removal ratio of residual current (residual amount / input) Is reduced to about 1%, and when a ground fault actually occurs, a zero-phase current output sufficient for relay operation can be obtained, so it is possible to reliably distinguish and detect the zero-phase current and the residual current. It has been confirmed that the same can be applied when the input is a zero-phase voltage.

<Effects of the Invention> The present invention provides the delay element that delays the first zero-phase current for a certain period of time to the second zero-phase current, and sets the latest data value in the data that has been subjected to arithmetic processing, shift, and replacement processing. Since the method of determining is added, the residual component is effectively reduced to detect the normal zero-phase current by distinguishing it against single noise and power supply frequency fluctuation caused by system imbalance. Has the effect of

[Brief description of drawings]

FIG. 1 is a block diagram showing a main configuration of a zero-phase current detection device, FIG. 2 is an operation explanatory diagram of a serial register, and FIG. 3 is a main configuration diagram of a conventional zero-phase current detection device. 1, 33 ... Input terminal 2 ... Digital filter circuit 3 ... Arithmetic circuit, 4 ... Shift and replacement circuit 5 ... Residual removal circuit, 6, 7 ... Judgment circuit 8 ... AND circuit, 9 ... Output terminal 10 …… Ar register output 11 …… fr register output 12 …… Series register output 13,14,15 …… Residual removal circuit input terminal 16 …… H subtraction output, 17 …… L subtraction output 18 …… H judgment Output, 19 ...... L judgment output 20 ...... Zero phase current output 25 …… Series register circuit 31 …… Delay circuit, 32 …… Addition (subtraction) circuit 34 …… Output terminal 35 …… First zero phase current 36 …… Second zero-phase current 37 …… Third zero-phase current

Claims (1)

[Claims] 1. A first zero-phase current detected by a current transformer provided in an AC circuit and a second zero-phase current obtained by passing the first zero-phase current through a delay element are delayed. In a zero-phase current detection method of a method of obtaining a third zero-phase current by removing a residual current by inputting it to a subtraction circuit provided after the element, the delay element is configured by a serial register including N constituent elements. Then, an arithmetic means for obtaining an average value f from a part of the already arithmetically processed data stored in each element of the serial register and the latest data A, and a predetermined average of the serial register with the obtained average value f. A replacement means for rewriting the elements, a means for comparing the latest input data A with the data output F (N) which has been processed before N cycles and which has been fetched from the serial register, and a means for obtaining when the latest data A is input. The calculated result Wherein said average value f N period previous data output F (N)
And a means for comparing with each other, and it is determined that the zero-phase current is generated when these comparing means are satisfied at the same time.