JPH084049B2 - Control circuit - Google Patents

Description

The present invention relates to a circuit for controlling a power element for driving a load by a pulse train having a duty ratio or a duty ratio and frequency proportional to a physical quantity such as traveling speed. In the above, the present invention relates to a control circuit used for detecting a load abnormality and safely protecting a power element.

[Background technology]

The present inventors have been examining the control circuit shown in FIG. In the figure, a circuit CC is a pulse train generating circuit for generating a predetermined control pulse train A, and when the input D of the gate G3 is at L level, the control pulse train A is applied to the power transistor T3 through the gate G3 and the inverter gate G4. . The power transistor T3 receives the control pulse train A and flows an average current corresponding to the control pulse train A. As a result, an average current according to the duty of the control pulse train A flows through the solenoid L1 of the linear actuator LA, and the position of the plunger P biased by the spring S is controlled according to this average current value.

The circuit FD is, for example, an abnormality detection circuit that monitors the control pulse train A and the signal applied to the solenoid L1 at the terminal. When both signals have a predetermined phase relationship during normal operation, this circuit FD
The transistor T4 is turned on by the output of, the terminal is grounded, and the capacitor C1 is short-circuited. At this time,
Since the output of the comparator COM2 becomes H level, the gate
The input C of G2 is at H level, and the output of the gate G2 is at L level. Therefore, when the control circuit is in the normal state, the circuit CC
The position of the plunger P is controlled by the control pulse train A.

By the way, in such a control circuit, when an "abnormal state" occurs in which the terminal is short-circuited to the ground, the phase relationship between the control pulse train A and the solenoid L1 application signal of the terminal changes. In this case, the circuit FD turns off the transistor T4 according to this phase change. Then, the capacitor C1 is charged through the charging resistor R8, so that the voltage at the terminal rises.

This terminal voltage is input to the inverting input terminal of the comparator COM1, and the non-inverting input terminal of the comparator COM1 is divided by the voltage dividing resistors R2, R3, and R4 into the threshold voltage (V _H ) Is typing.

Now, when the voltage of the terminal rises and exceeds the threshold voltage V _H , the output of the comparator COM1 changes from H level to L level. When this signal is inverted by the gate G1 and becomes H level, the transistors T1 and T2 are turned on. Then, the voltage input to the non-inverting input terminal of the comparator COM1 switches from the threshold voltage V _H to the threshold voltage (V _L (<V _H )) divided by the voltage dividing resistors R2 and R3, and ,
Capacitor C1 via discharge resistor R1 and transistor T1
Is discharged and the voltage at the terminal drops. Then, since the voltage of the terminal becomes lower than the threshold voltage V _L this time, the output of the comparator COM1 changes from L level to H level, and the transistors T1 and T2 are turned off. As a result, the capacitor C1 is again connected via the charging resistor R8.
Will be charged and the terminal voltage will rise.

By repeating the above operation, oscillation of about 2H ₂ is started as shown in FIG. 2 (1).

Here, when the capacitor C1 starts charging and the terminal voltage exceeds the threshold voltage V _T (<V _L ) of the comparator COM2 divided by the resistors R5 and R6, the input C of the gate G2 changes from H level. It becomes L level. At this time, for the following reasons
The same level as the output level of the comparator COM1 is output to the output of the gate G2.

That is, when the output of the comparator COM1 is at the H level, this signal is inverted by the gate G1.
The input B of the gate G2 becomes the L level, but since both inputs of the gate G2 become the L level, the output of the gate G2 becomes the H level. That is, when the output level of the comparator COM2 is L level, the output level of the comparator COM1 is the output level of the gate G2. Conversely, when the output of the comparator COM1 is L level, this signal is
Since it is inverted at, the input B of the gate G2 becomes H level, and the output of the gate G2 becomes L level. Also in this case, similarly, the output level of the comparator COM1 is the output level of the gate G2.

Next, in the control circuit having such a circuit configuration, the operation after the terminal starts to oscillate in an abnormal state where the terminal is short-circuited to the ground will be examined with reference to FIG.

First, when the transistor T4 is turned off by the output of the circuit FD, the capacitor C1 begins to be charged through the charging resistor 8 and the terminal voltage rises to the threshold voltage V _T during the time t ₁ (Fig. 2). (1)). This time t ₁ is set as a mask time for preventing erroneous detection of the circuit FD. When the voltage of the terminal rises, it exceeds the threshold voltage V _T at time t ₁ , so the output of the comparator COM2 becomes L level and the gate
The L level is input to the input C of G2 ((3) in FIG. 2). For this reason, the output level of the gate G2 becomes the same as the output level of the comparator COM1 for the reason described above, so that the output of the gate G2 becomes H level and the H level is input to the input D of the gate G3 (second Figure (4)). Therefore, the output E of the gate G3 (input of the gate G4) is always at the L level (FIG. 2 (5)), and the gate G3 does not pass the A signal (FIG. 2 (7)). The output E of the gate G3 becomes an H level signal inverted by the gate G4.
Is output from the output F of FIG. 2 ((6) in FIG. 2), the transistor T3 is turned off based on this output signal, and the transistor T3 is protected for the time t ₁ + t ₂ + t ₃ .

Next, when the time t ₁ + t ₂ + t ₃ elapses, the terminal voltage exceeds the threshold voltage V _H of the comparator COM1, so the output of the comparator COM1 immediately becomes L level,
The output of the gate G1 is inverted to H level, and the H level is input to the input B of the gate G2. (Fig. 2 (2)).
Following this, since the output of the gate G2 becomes L level and the L level is input to the gate G3 input D (Fig. 2 (4)), the gate G3 and the gate G4 pass the signal of A (Fig. 2). (5) and (6), the transistor T3 is on / off controlled based on the signal of A. At this time, since the circuit of FIG. 4 is in an abnormal state, it is necessary to turn off the transistor T3 to protect it. However, in order to return the circuit to the normal state when the terminal recovers from the ground short circuit, the second circuit is used. there between transistors T3 time t ₄ should be controlled on and off in FIG. (1). If this on / off time t ₄ is too long, a large current will flow through the transistor T 3, causing damage, and if it is too short, it will not return to the normal state. Therefore, the time t ₄ needs to be set to an appropriate time.

Next, as described above, when the voltage of the terminal exceeds the threshold voltage V _H of the comparator COM1 due to the charging of the capacitor C1, the capacitor C1 starts discharging, and the voltage of the terminal starts to drop. Then, when the time t ₁ + t ₂ + t ₃ + t ₄ elapses, the terminal voltage changes to the threshold voltage V _{L of the} comparator COM1.
Lower. Then, since the output of the comparator COM1 becomes H level, the output of the gate G1 is also inverted and becomes L level, and the L level is input to the input B of the gate G2 ((2) in FIG. 2). Following this, the output of the gate G2 becomes H level, the H level is input to the input D of the gate G3 (Fig. 2 (4)), and the gate G3 and the gate G4 block the signal of A (second). Figure (5), (6)), transistor
T3 will turn off again and transistor T3 will be protected.

As described above, the control circuit as shown in FIG. 4 protects it by turning off the transistor T3 when the terminal of the circuit is short-circuited to the ground, and when the short-circuit is restored. In this, the circuit is restored to a normal state.

[Problems to be solved by the invention]

However, in the control circuit as shown in FIG.
The following problems may occur due to variations in the saturation voltage V _CE 2 of the transistor T2 and temperature characteristics, and variations in the ratio of the resistors R2, R3 and the resistors R5, R6.

That is, as shown in FIG. 3 (1), the difference in the difference ΔV between the threshold voltage V _L of the comparator COM1 and the threshold voltage V _T of the comparator COM2 becomes large, and in some cases the relationship between them is reversed (V _L <V _T ). Then, the on / off control time of the transistor T3 in the abnormal state becomes t ₄ + t ₂ (becomes longer than that in FIG. 2 (1)), which causes a problem of the transistor T3 being damaged.

Therefore, if the difference ΔV between the threshold voltages V _L and V _T is widened in order to prevent the threshold voltages V _L and V _T from being reversed, for example, if V _L is increased, the time t ₄ becomes short and it becomes difficult to return to the normal state. . On the contrary, if V _T is lowered, the mask time t ₁ is shortened, and erroneous detection of the circuit FD cannot be prevented.

Therefore, it is difficult to increase the difference ΔV between the two threshold voltages, and the problem cannot be solved yet.

Therefore, the present invention has been made in view of the above problems, and stabilizes the saturation voltage V _CE 2 of the transistor T2 to reduce the variation in the difference ΔV between the threshold voltages V _L and V _T to reduce the variation of the transistor T3. The purpose is to stabilize the on-time when the return to the normal state is detected.

[Means for solving the problem]

In view of the above problems, the present invention will be described with reference to FIG. 1. A charging resistor (R8) and a capacitor (C1) connected in series to the charging resistor (R8) and charged through the charging resistor (R8). , The discharge resistor (R1) branched and connected from the connection point of the capacitor (C1) and the charging resistor (R8), and connected in series with the discharge resistor (R1) and turned on to turn on the capacitor (C1). A first switching element (T1) that discharges electric charge through the discharge resistor (R1), and a first voltage dividing resistor group (R2, R3, R4) that is composed of a plurality of resistors and in which a predetermined voltage dividing voltage is set. And the charging voltage of the capacitor (C1) and the divided voltage of the first voltage dividing resistor group (R2, R3, R4) are input and compared, and when the charging voltage exceeds the divided voltage, the first switching is performed. Element (T
The first comparator (COM1) which outputs a control signal for turning on 1) is connected between the output side of the first comparator (COM1) and the first voltage dividing resistor group. CO
A first transistor (T2) that performs a switching operation in response to the control signal from M1) and that gives a hysteresis by short-circuiting and opening a part of the resistance (R4) of the first voltage dividing resistance group; And a second voltage dividing resistor group (R5, R6) in which a predetermined voltage dividing voltage is set and a second voltage dividing resistor group (R5, R6) connected in series.
The transistor (T5), the charging voltage of the capacitor (C1) and the divided voltage of the second voltage dividing resistor group (R5, R6) are input and compared, and a mask signal corresponding to this comparison result is output. Second comparator (COM2) and pulse train generation circuit (CC) that outputs pulse train (A)
Connected to the output side of the first comparator (COM1), the second comparator (COM2), and the pulse train generation circuit (CC), the control signal from the first comparator (COM1), the second comparator (COM2) ) Mask signal from
And a second switching element (T3) which is on / off controlled according to the pulse train (A) from the pulse train generating circuit (CC), and the second switching element (T3) connected to the second switching element (T3). The grounding state of the actuator (LA) driven based on the ON / OFF operation of T3) and the connection point between the second switching element (T3) and the actuator (LA) is monitored, and a ground signal is detected when grounding is detected. A control circuit comprising an output ground detection circuit (FD) for outputting an oscillation signal by repeatedly charging and discharging the capacitor (C1) when a ground signal is output from the ground detection circuit (FD). A first constant current source (IS1) connected to the base circuit of the first transistor (T2) in order to make the load current of the first transistor (T2) constant, and a load of the second transistor (T5) A second constant current source (IS2) connected to the base circuit of this second transistor (T5) in order to make the flow equal and constant to that of said first transistor (T2), and said second component The resistance value of the piezoresistive group (R5, R6) and the first transistor (T) of the first voltage dividing resistance group (R2, R3, R4)
It is characterized in that the resistance values of the resistors (R2, R3) excluding the resistor (R4) short-circuited in 2) are made equal.

[Effects of the Invention]

As described above, according to the present invention, in order to determine the operation levels of the first comparator for oscillation control and the second comparator for oscillation mask, the first and second transistors are provided in the first and second voltage dividing resistor groups. And a first constant current source for equalizing the load currents to the bases of the first and second transistors, and a resistance value of the second voltage dividing resistor group and a first voltage dividing resistor. Since the resistance value of the portion excluding the resistance of the portion shorted by the first transistor in the resistance group is made equal, the setting of both operation levels is reliable, and both operation levels do not reverse each other. A reliable control output can be taken out.

As a result, the saturation voltage V _CE 2 of the first transistor (transistor T2) is stabilized and the threshold voltages V _L and V _T
The difference in the difference ΔV of Δ becomes smaller. Therefore, there is an excellent effect that it is possible to stabilize the on-time when the second switching element (transistor T3) is detected to return to the normal state.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an electrical connection diagram showing an embodiment of the present invention,
A particularly different configuration from FIG. 4 is that, according to FIG. 1, a second transistor T5 is newly connected between the resistor 6 and ground, and the sum of resistance values R2 + R3 and R5 + R6 are made equal,
And a constant current source IS for the base of the second transistor T5
1, IS2 is provided for the base of the second transistor T5. The former configuration has a collector load current IC2 of the first transistor T2 and a collector load current I2 of the second transistor T5.
This is done to make C5 equal, and the latter configuration is made to make the base current IB2 of the first transistor T2 and the base current IB5 of the second transistor T5 equal. The buffer gates G5 and G6 are provided to prevent interference with the base current of the first transistor T2.

In addition, in the other configurations in this embodiment, the same configurations as those in FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted.

In this embodiment, since the control circuit as described above is configured, the saturation voltage of the second transistor T5 is
V _CE 5 becomes equal to the saturation voltage V _CE 2 of the first transistor T2. As a result, the first comparator
The operation levels of COM1 and the second comparator COM2 are always configured to have a desired relationship.

Therefore, the problem described in FIG. 3, that is,
The relationship between the threshold voltage V _L of the first comparator COM1 and the threshold voltage V _T of the second comparator COM2 reverses (V _L <V _T ) and the on / off control time of the transistor T3 in the abnormal state is t ₄
The predetermined discharge time t ₄ can be appropriately obtained without causing the problem of becoming longer as + t ₂ .

As a result, when the circuit FD detects an abnormality,
Control pulse train A is a transistor only within a fixed time
Solenoid L1 or transistor because it is applied to T3
Damage to T3 is prevented.

Further, as described above, it is the variation in the ratio of the resistors R2 and R3 and the ratio of the resistors R5 and R6 that contributes to the occurrence of the above problem, and the saturation voltage V of the first transistor T2.
The variations and temperature characteristics of _CE 2 were the major contributors to the latter, so if the latter measures are taken, a considerable effect can be expected.

In the above embodiment, in order to equalize the collector load current IC2 of the first transistor T2 and the collector load current IC5 of the second transistor T5, the sum of resistance values R2 + R3 and R5 + R6.
However, instead of this configuration, circuit elements other than the resistor R7, the resistor R8, the capacitor C1, the transistor T3, and the solenoid L1 may be integrated in the same IC. This makes it possible to make the variations in the ratio between the resistors R2 and R3 and the ratio between the resistors R5 and R6 approximately the same.

When this circuit is applied to a vehicle speed sensitive control device for power steering for automobiles, the circuit generates a pulse train having a duty ratio or duty ratio and frequency proportional to the traveling speed, and the linear actuator LA responds to the current value according to the current value. The steering assist mechanism is configured to adjust the assisting force.

[Brief description of drawings]

FIG. 1 is an electrical connection diagram showing an embodiment of the present invention, FIGS. 2 and 3 are time charts showing an operation example, and FIG. 4 is an electrical connection diagram showing a circuit configuration before the invention of the present invention. . C1 ... Capacitor, R1 ... Discharge resistance, R2, R3, R4 ... First
Voltage dividing resistance, R5, R6 …… Second voltage dividing resistance, R8 …… Charging resistance, T
1 ... Transistor forming control switch element, T2 ... 1st transistor, T5 ... 2nd transistor, COM1 ... 1st comparator, COM2 ... 2nd comparator, IS1, IS2
...... Constant current source.

Claims (1)

[Claims] 1. A charging resistor (R8), a capacitor (C1) serially connected to the charging resistor (R8) and charged through the charging resistor (R8), and a connection between the capacitor (C1) and the charging resistor (R8). A discharge resistor (R1) branched from a point and a discharge resistor (R1) connected in series and turned on to discharge the electric charge of the capacitor (C1) through the discharge resistor (R1). 1st which consists of switching element (T1) and multiple resistors
The voltage dividing resistor group (R2, R3, R4), the charging voltage of the capacitor (C1) and the voltage dividing voltage of the first voltage dividing resistor group (R2, R3, R4) are input and compared, and the charging voltage is compared. Is above the divided voltage, the first switching element (T1)
Is connected between the output side of the first comparator (COM1) and the first voltage dividing resistor group, which outputs a control signal for turning on the first comparator (COM1).
A first transistor (T2) which performs a switching operation in response to the control signal from 1) and which gives a hysteresis by short-circuiting and opening a part of the resistor (R4) of the first voltage dividing resistor group; And a predetermined divided voltage is set.
Voltage dividing resistor group (R5, R6), second transistor (T5) connected in series with the second voltage dividing resistor group (R5, R6), charging voltage of the capacitor (C1) and the second voltage dividing The divided voltage of the resistor group (R5, R6) is input and compared, and the second comparator (COM2) that outputs the mask signal corresponding to this comparison result and the pulse train generation circuit (CC) that outputs the pulse train (A) ), A control signal from the first comparator (COM1), which is connected to the output side of the first comparator (COM1), the second comparator (COM2), and the pulse train generation circuit (CC),
A second switching element (T) which is on / off controlled according to a mask signal from the second comparator (COM2) and a pulse train (A) from the pulse train generation circuit (CC).
3) is connected to this second switching element (T3)
When the grounding state of the actuator (LA) driven based on the on / off operation of the switching element (T3) and the connection point between the second switching element (T3) and the actuator (LA) is monitored and grounding is detected, A control circuit that includes a ground detection circuit (FD) that outputs a ground signal. When the ground detection circuit (FD) outputs a ground signal, the capacitor (C1) is repeatedly charged and discharged to perform an oscillation operation. A first constant current source (IS1) connected to the base circuit of the first transistor (T2) in order to make the load current of the first transistor (T2) constant, and the second transistor (T5) A second constant current source (IS2) connected to the base circuit of this second transistor (T5) in order to make the load current of said) equal and constant to that of said first transistor (T2), First The resistance value of the voltage dividing resistor group (R5, R6) and the first transistor (T2) of the first voltage dividing resistor group (R2, R3, R4)
Resistance of the part (R4) excluding the resistance (R4) short-circuited by
The control circuit is characterized by making the resistance values of (2, R3) equal.