JP2709497B2 - Semiconductor element connection structure - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a connection structure of a semiconductor device.

(Prior Art) FIG. 3 shows a schematic structure of a conventional flip chip connection of a semiconductor element. 1 is a semiconductor element, 2 is a wiring board, 3 is a solder bump, 4 is an electrode provided on each of the semiconductor element 1 and the wiring board 2, and AA 'indicates the center of the semiconductor element.

In flip-chip connection, electrical connection between the semiconductor element 1 and the electrode 4 of the wiring board 2 can be performed by batch connection in which the solder bumps 3 are heated and melted, so that workability is superior to that of the wire bonding method. Also, wire bonding method and
Unlike the TAB (Tape Automated Bonding) method, the arrangement of the electrodes is not limited to the periphery of the semiconductor element, so that the number of connection terminals can be greatly increased.

However, in this connection structure, as shown in FIG. 4, when a temperature change occurs, a dimensional deviation B occurs due to a difference in the coefficient of thermal expansion between the semiconductor element 1 and the wiring board 2, and a shear distortion occurs in the solder bump 3. Connection reliability decreases.

Since the shear strain increases as the center distance between the solder bump 3 and the semiconductor element 1 increases, the allowable area of the shear strain of the solder bump 3 limits the area in which the solder bump 3 can be arranged, thus increasing the number of terminals and increasing the size. It is difficult to apply the area to the semiconductor element.

As a means for reducing the shear strain of the solder bumps, a method using a wiring board material having a thermal expansion coefficient close to that of the semiconductor element can be considered, but there is a disadvantage that the wiring board material is limited.

On the other hand, there has been proposed a method (Japanese Patent Laid-Open No. 62-293730) in which a multistage bump is formed by stacking solder bumps supported by a polyimide film to reduce shear distortion.

However, since the solder bumps are stacked, there are disadvantages in that the number of necessary members increases and the cost increases due to an increase in the number of connection steps.

FIG. 5 shows a semiconductor element connection structure in which metal bumps are brought into contact with each other by pressure to obtain electrical connection. In FIG.
Metal bumps 13 are formed on the respective electrodes 4 of the semiconductor element 1 and the wiring board 2. Pressure is applied to the metal bumps 13 due to the contraction force of the resin 5 at the time of curing, and the metal bumps 13 are pressed.
13 are mechanically connected to each other to obtain an electrical connection.

However, in this connection structure, there are portions where the height of the metal bumps 13 varies and electrical connection cannot be obtained.
In addition, since the coefficient of thermal expansion of the resin 5 is larger than that of the metal bump 13, the pressure is weakened when a temperature change occurs,
However, there has been a problem that the connection reliability is poor because the contact of the wire becomes unstable.

(Problems to be Solved by the Invention) In the present invention, the above-described large shear strain generated between the semiconductor element and the wiring board, variation in bump height, and pressure fluctuation due to the difference in thermal expansion coefficient between the resin and the resin are considered. It is intended to provide an inexpensive semiconductor element connection structure having high electrical connection reliability and capable of fine connection.

(Means for Solving the Problems) The present invention relates to a semiconductor element connection structure in which a superelastic material is interposed to obtain an electric connection by pressurization, wherein a contact surface is provided with irregularities. This is an element connection structure.

In the present invention, in order to solve the above-mentioned problem, an electric connection is formed by interposing a superelastic material between a semiconductor element and a wiring board or the like, and the superelastic material having a bump structure is spring or hardened. Pressure is applied with a resin or the like having a large shrinkage rate at the time, and shrinkage deformation is performed within an elastic range to absorb variations in bump height.

Furthermore, etching, honing,
By forming irregularities by chemical or mechanical processing such as embossing, or by press-fitting hard metal particles, the frictional force between the contact surfaces is increased to prevent slip on the contact surfaces, so that semiconductor elements and substrates etc. The shear strain caused by the difference in thermal expansion coefficient is absorbed as deformation within the elastic range of the superelastic material, and a stable electric connection is obtained.

Irregularities may be formed on the superelastic material side to be interposed, or irregularities may be formed on an electrode provided on a substrate or the like. In short, it is necessary to increase the frictional force of the contact surface as described above. What is necessary is just to produce an effect.

It is desirable that the hard metal fine particles have good conductivity and are harder than an electrode such as a superelastic material or a substrate.

As a superelastic material, a metal having an elastic deformation of 0.5% or more, for example, Cu-Zn-Sn, Au-Cu-Zn, Ag-Cd, Au-Cd, Fe-
It is desirable to use Pt, Fe-Pd, or the like.

(Examples) Next, the present invention will be described based on examples.

Embodiment 1 FIGS. 1 (a) and 1 (b) show a cross-sectional structure of a connecting portion of the present invention, and a super-elastic material (Cu-34.7) having a bump structure formed by plating an electrode 4 of a semiconductor element 1 is shown. wt% Zn
-3.0 wt% Sn) 6 with concave portions 7 formed by selective etching with an iron chloride solution. After the alignment with the electrode 4 of the wiring board 2 is performed, a pressure is applied by using a resin 5 having a large shrinkage rate during curing to obtain an electrical connection. At this time, the superelastic material 6 has an elastic strain of 2%, is compressed and deformed within the elastic range by the pressing force, absorbs the variation in height of the superelastic material 6, and is elastic against thermal strain. Follow the deformation within the range. Further, the wiring board 2 made of the superelastic material 6
Since the concave portion 7 is formed by etching in a portion in contact with the electrode 4, the frictional force in this portion increases, and as shown in FIG. 1 (b), shearing occurs due to a difference in thermal expansion coefficient between the semiconductor element 1 and the wiring board 2. Even if distortion occurs, there is no slip on this surface. That is, the connection portions are integrated only by applying pressure. Therefore, the shear strain can be absorbed by the deformation within the elastic range of the superelastic material 6, and a stable electric connection was obtained.

Embodiment 2 FIGS. 2 (a) to 2 (c) show a cross-sectional structure of a connecting portion according to a second embodiment of the present invention, and FIG. This shows a state in which hard metal (tungsten) fine particles 9 are pressed into the tip of the formed superelastic material (Cu-34.7 wt% Zn-3.0 wt% Sn) 8 having a bump structure. Next, as shown in FIG. 2 (b), the electrode was aligned with the electrode 4 of the wiring board 2, and a resin 5 having a large shrinkage rate during curing was used to apply a pressing force to obtain an electrical connection. At this time, the superelastic material 8 has an elastic strain of 2%, is compressed and deformed within the elastic range by the pressing force, absorbs the variation in the height of the superelastic material, and is within the elastic range with respect to the thermal strain. Follow the deformation.
FIG. 2C shows a state in which a shear strain is caused by a difference in thermal expansion coefficient between the semiconductor element 1 and the wiring board 2. Since a portion of the superelastic material 8 that contacts the electrode 4 of the wiring board 2 is press-fitted with the hard metal fine particles 9, a large frictional force is generated at the contact portion by applying pressure, and slip due to shearing force is reduced. It is unlikely to occur, as if the connecting portions are integrated. Therefore, the shear strain could be absorbed by the deformation within the elastic range of the superelastic material 8, and a stable electric connection could be obtained.

(Effect of the Invention) According to the present invention, in connecting a semiconductor element to a substrate or the like,
A stable electrical connection can be obtained at the connection portion that receives the most thermal strain even if it is repeatedly subjected to thermal strain.

[Brief description of the drawings]

1 (a) and 1 (b) and FIGS. 2 (a) to 2 (c) are cross-sectional views of a semiconductor element connection structure showing an embodiment of the present invention. FIG. 3 is an explanatory view showing a conventional flip chip bonding, and FIG.
The figure is an explanatory view showing a state in which the bump has been deformed due to thermal strain,
FIG. 5 is a sectional view of a structure for obtaining an electrical connection by pressing a metal bump. 1 ... semiconductor element, 2 ... wiring board, 3 ... bump material,
4 ... Electrode, 5 ... Resin, 6,8 ... Super elastic material, 7 ...
... recess, 9 ... hard metal fine particles, 13 ... metal bump material.

Continuation of the front page (72) Inventor Yoshio Ozeki 1618 Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside the New Technology Research Laboratories 1 Nippon Steel Corporation (72) Inventor Keisuke Watanabe 1-7-12 Toranomon, Minato-ku, Tokyo Offshore Inside Electric Industry Co., Ltd. (72) Takashi Kanamori 1-7-12 Toranomon, Minato-ku, Tokyo Oki Inside Electric Industry Co., Ltd. (72) Inventor Yasuo Iguchi 1-7-12 Toranomon, Minato-ku, Tokyo Oki (56) References JP-A-57-28337 (JP, A) JP-A-2-137240 (JP, A) JP-A-2-206124 (JP, A) JP-A-2-206125 (JP, A) JP-A-2-206139 (JP, A) JP-A-1-145826 (JP, A) JP-A-2-178940 (JP, A)

Claims (3)

(57) [Claims] 1. A semiconductor element connection structure for obtaining electrical connection by pressurization with a superelastic material interposed therebetween, wherein the contact surface has irregularities formed thereon. 2. The semiconductor element connection structure according to claim 1, wherein the contact surface has irregularities formed by chemical or mechanical processing. 3. The semiconductor element connection structure according to claim 1, wherein irregularities are formed on the contact surface by press-fitting hard metal fine particles.