JP3362689B2 - Method for manufacturing polycrystalline semiconductor and method for manufacturing liquid crystal display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a polycrystalline semiconductor and a method for manufacturing a liquid crystal display device connected with thin film transistors.

[0002]

2. Description of the Related Art P has been used as a passivation film for switching elements (TFTs) conventionally used in liquid crystal display devices.
SG (phospho-silicate glass) or plasma nitride film (P-SiN film) is used.

In particular, when a P-SiN film is used as a passivation film, its mechanical strength is high, so that the switching element can be protected from scratches and moisture can be prevented from entering the switching element. Further, since the hydrogen-rich H _2, hydrogen H ₂ is supplied to the channel region of the switching element has the advantage that leads to improved properties.

Next, P-Si is used as a passivation film.
A conventional method for manufacturing a liquid crystal display device using an N film will be described with reference to FIGS.
It will be described with reference to FIG.

First, as shown in FIG. 17A, a switching element Q of a gate cell aligned type TFT is formed at a required position on an insulating substrate 41 made of glass or the like. Here, 42 is an active layer, 43 is a gate insulating film, and 44 is a gate electrode selection line. After that, an interlayer insulating film (for example, PSG) 45 is formed on the entire surface including the switching element Q.

Next, as shown in FIG. 17B, windows 46s and 46d are formed in the interlayer insulating film 45 at positions corresponding to the source region 42s and the drain region 42d of the active layer 42.

Next, as shown in FIG.
After forming the layer, patterning is performed to form the signal line 47. The signal line 47 is electrically connected to the drain region 42d through the window 46d.

Next, as shown in FIG. 18D, after forming an interlayer insulating film (for example, PSG) 48 for buffer on the entire surface, a plasma nitride film (P-SiN film) for passivation is formed on the upper surface of the interlayer insulating film 48. ) 49 is formed.

Next, as shown in FIG. 18E, a window 50 is formed at a location corresponding to the source region 42s, the window 50 penetrating the P-SiN film 49 and the interlayer insulating films 48 and 45, respectively.
The transparent conductive film 51 is formed on the entire surface. Then, the transparent conductive film 51 is patterned to form a transparent electrode 52. At this time, the transparent electrode 52 is in the form of being separated for each picture element by patterning.

Next, as shown in FIG. 18F, when the substrate 53 and the substrate 41 are opposed to each other on the other insulating substrate 53, wiring portions (selection lines 44, signal lines 47, etc.) are present. The light shielding layer 54 is formed in a portion corresponding to the portion) and the switching element Q. After that, the counter electrode 55 is formed on the entire surface including the light shielding layer 54. In addition, the transparent electrode 52 of the substrate 41 and the counter electrode 55 on the substrate 53 are subjected to molecular orientation treatment.

Next, as shown in FIG. 19G, the substrate 41 and the substrate 53 are sealed with the transparent electrode 52 and the counter electrode 55 facing each other and sealed by a spacer (not shown). After injecting the liquid crystal layer 56 into it, the injection port is sealed to obtain a liquid crystal display device B according to the conventional example.

[0012]

In the liquid crystal display device B according to the above conventional example, the active layer 4 of the switching element Q is used.
2 is composed of a polycrystalline silicon thin film.

As a method of forming this active layer 42, CVD is used.
Although there is a (chemical vapor deposition) method, this method has a disadvantage that the grain size is not uniform and the surface is uneven.

As a method of forming the active layer 42,
There is a method of forming an amorphous silicon thin film and heat-treating it. Usually, the amorphous silicon thin film is heat-treated once (for example, at 600 ° C. for 30 hours) to grow grains in the amorphous silicon thin film to form the polycrystalline silicon thin film 42.

However, in this case, as shown in FIG.
The generation of nuclei is time-dependent, and initially only a few nuclei are generated, but it increases rapidly with time. For this reason, the grain growth of the nucleus that occurs first grows larger than that after that by the time difference,
As shown by the curve I in FIG. 6, there is a large variation in the size of grains in the polycrystalline silicon thin film.

This thin film is used as the active layer 4 of the switching element Q.
If it is used as 2, a channel is formed by one grain, or a channel is formed by several grains, resulting in variations in characteristics.

The present invention has been made in view of the above points, and an object thereof is to prevent a variation in grain size and to significantly reduce the heat treatment time. An object of the present invention is to provide a method for manufacturing a semiconductor, and further to provide a method for manufacturing a liquid crystal display device capable of realizing high quality of the liquid crystal display device.

[0018]

The present invention is a method for manufacturing a polycrystalline semiconductor 2, which comprises the steps of forming a semiconductor on a substrate 1 and converting ion species consisting of the main component of the semiconductor into a semiconductor by ion implantation. Introducing to form an amorphous semiconductor and heat treating the amorphous semiconductor
And a second heat treatment step of heat-treating the amorphous semiconductor at a temperature lower than that of the first heat treatment step and for a longer time than that of the first heat treatment step.

Further, according to the present invention, in the method for producing a polycrystalline semiconductor, the polycrystalline semiconductor 2 is silicon.

The present invention is a method for manufacturing a liquid crystal display device A to which a thin film transistor Q is connected, the thin film transistor Q having a step of forming a semiconductor on a substrate 1,
Forming an amorphous semiconductor is introduced into the semiconductor and ionic species comprising a semiconductor of the main component by ion implantation, a first heat treatment step of heat-treating an amorphous semiconductor, an amorphous semiconductor first It is a method of manufacturing a liquid crystal display device, which is formed by a second heat treatment step in which the temperature is lower than that in the heat treatment step and the heat treatment is performed for a longer time than the first heat treatment step.

Further, according to the present invention, in the above method for manufacturing a liquid crystal display device, the amorphous semiconductor is silicon.

According to the above-described method for producing a polycrystalline semiconductor of the present invention, the amorphous semiconductor is subjected to the first heat treatment step and the second heat treatment step which is lower in temperature and longer in time than the first heat treatment step. By performing the heat treatment step, a seed crystal (micrograin) for growing a polycrystalline semiconductor is generated in the first heat treatment step, and the temperature of the second heat treatment step is low, so that the seed crystal generation rate is decreased. Thus, the seed crystal can be gradually grown in the solid phase over the first heat treatment step. Thereby, a polycrystalline semiconductor having a uniform grain size can be obtained.

According to the above-described method of manufacturing a liquid crystal display device of the present invention, by using the polycrystalline semiconductor manufactured as described above for the thin film transistor Q of the liquid crystal display device A, the polycrystalline semiconductor 2 constituting the thin film transistor Q is formed. Since the grain size is uniform and the variation in the number of grains forming the channel can be reduced, the variation in the characteristics of the thin film transistor Q can be reduced.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. 1 to 4 are process diagrams showing a method for manufacturing a liquid crystal display device in the active matrix driving method according to the present embodiment. Hereinafter, the steps will be described in order.

First, as shown in FIG. 1A, a switching element Q of a gate cell aligned type TFT is formed at a required position on a transparent insulating substrate 1 made of glass or the like. In the figure, 2 is an active layer made of a polycrystalline silicon thin film, 3
Is a gate insulating film made of SiO ₂ or the like, and 4 is a gate electrode selection line made of a polycrystalline silicon layer doped with N-type impurities. After that, an interlayer insulating film (for example, PSG) 5 is formed on the entire surface including the switching element Q.

In the present embodiment, in order to solve the above-mentioned problem of variation in characteristics of switching elements due to non-uniformity of grains in the active layer, first, amorphous silicon having a film thickness of about 800 Å on the substrate 1 is formed. A thin film (after forming a polycrystal silicon thin film, it is made amorphous by implanting Si ions) is subjected to a heat treatment (for example, 700 ° C. for 5 to 10 minutes) at a density of 10 ⁸ pieces / cm ³ · sec or more. After generating nuclei (nucleus for growing polycrystalline silicon, so-called seed crystal, micrograin), heat treatment (for example, at a temperature corresponding to the rate at which nuclei are generated at a density of 10 ⁶ / cm ³ · sec or less (for example, At 600 ° C. for 5 to 10 hours, solid phase growth is performed to form a polycrystalline silicon thin film 2 having a uniform grain size.

That is, in the present embodiment, the heat treatment is performed in two steps as described above, the nuclei are uniformly generated in the first heat treatment at a relatively high temperature, and the grains are gradually grown in the next low temperature heat treatment. As shown by the curve II in FIG. 6, grains having a medium size are uniformly present over the entire thin film 2.

Therefore, in the present embodiment, the characteristics of the switching element Q do not vary. Also,
As can be seen from the heat treatment time, it was normally 30 hours, but in the present embodiment, it can be completed in about 10 hours at the longest.

The thickness of the amorphous silicon thin film is 800Å
If it is thicker than the above, the generation rate of nuclei becomes high, so that the time of the first heat treatment can be shortened. Also, laser annealing may be used in this heat treatment. In this case, the heat treatment time can be further shortened.

As the final grain size,
It is possible to make the length smaller than the channel length, for example 5 μm or less.

After the second heat treatment, in order to reduce the trap density at the grain boundaries, a laser (for example, excimer laser) that allows a short wavelength is irradiated with energy that does not melt the polycrystalline silicon thin film 2. You may do it. In this case, it is performed at a temperature of 1000 ° C. or higher and a melting point of silicon or lower. In this laser annealing, the trap density at the grain boundary is simply reduced and the grain size is not changed and is maintained as it is.

Next, as shown in FIG. 1B, the interlayer insulating film 5 is formed.
Source region 2s and drain region 2 of the active layer 2 in
The windows 6s and 6d are formed at locations corresponding to d.

Next, as shown in FIG. 1C, after depositing an Al layer on the entire surface, patterning is performed to form the signal line 7. This signal line 7 is connected to the drain region 2d through the window 6d.
Electrically connected to.

Next, as shown in FIG. 2D, an interlayer insulating film (for example, PSG) 8 for buffer is formed on the entire surface by, eg, CVD method, and then a plasma nitride film (for passivation) (on the interlayer insulating film 8). P-SiN film) 9 is, for example, CV
It is formed by the D method or the like.

Next, as shown in FIG. 2E, a photoresist 10 is usually formed on a portion where a transparent electrode 12 to be formed later is to be separated, and then, as shown in FIG. 2F, the photoresist 10 is used as a mask. The P-SiN film 9 and the interlayer insulating film 8 are removed by etching. That is, after the P-SiN film 9 is removed by plasma etching (CF ₄ gas), the interlayer insulating film 8 is removed by wet etching with diluted hydrofluoric acid. At this time, the P-SiN film 9 is not removed by etching with dilute hydrofluoric acid, and the interlayer insulating film 8 is removed by isotropic etching peculiar to wet etching, so that the side edges of the remaining P-SiN film 9 are removed. Portion of the interlayer insulating film 8 existing under the
The side end portion 9a of the SiN film 9 has a so-called overhang shape.

Next, as shown in FIG. 3G, a transparent conductive film (ITO film is used in this embodiment) 11 is formed on the entire surface by sputter deposition. At this time, the transparent conductive film 11 is electrically connected to the source region 2s through the window 6s. Further, since the transparent conductive film 11 is cut at the overhang portion 9a of the P-SiN film 9, the transparent conductive film 11 is separated into each pixel at the same time as the vapor deposition, and the portion of the film 11 connected to the source region 2s is separated. It becomes the transparent electrode 12. The substrate temperature at this time is set to be equal to or lower than the transition temperature of the transparent conductive film 11. The transition temperature of the transparent conductive film (ITO film) 11 is 190 ° C. to 20 ° C.
Since the temperature is 0 ° C., the substrate temperature is set to 19 in the present embodiment.
The transparent conductive film 11 is deposited by setting the temperature to 0 ° C. or lower (annealing process).

Next, as shown in FIG. 3H, the transparent conductive film 1
1 is patterned to achieve complete separation for each picture element. That is, a portion of the transparent conductive film 11 formed on the signal line 7 is removed by wet etching using a hydrochloric acid solution or the like. At this time, as described above, the substrate temperature is set to be equal to or lower than the transition temperature of the transparent conductive film 11 so that the transparent conductive film 11 is deposited.
As can be seen from the X-ray diffraction intensity characteristic of FIG. 7A, since there is no peak indicating crystallinity, the film 11 itself is amorphous, and the etching characteristic in this state is as shown in Table 1 below. In addition, the etching rate is high (25% HCl aqueous solution is used as an etching solution). Therefore, the patterning process for the transparent conductive film 11 can be easily performed.

[0038]

[Table 1]

However, the light transmittance of the transparent conductive film 11 is shown in FIG.
As can be seen from the curves I and II of the spectral transmission characteristics of the above, the sheet resistance deteriorates as compared with those annealed above the transition temperature (curves III and IV), and the sheet resistance also deteriorates as can be seen from the sheet resistance characteristics of FIG. (Higher).

Therefore, in the present embodiment, after the patterning process of the transparent conductive film 11, the transparent conductive film 11 is annealed until its transition temperature or higher (that is, 200 ° C. or higher). By this annealing treatment, the light transmittance of the transparent conductive film 11 is improved to the levels shown by the curves III and IV in FIG. 8, the sheet resistance is also lowered as shown in FIG. 9, and the film quality is improved. As can be seen from the X-ray diffraction intensity characteristic of FIG. 7B, this is due to the peak P ₁ , which indicates crystallization of the transparent conductive film 11,
P ₂ and P ₃ are present, and the transparent conductive film 1 is set by setting the substrate temperature above the transition temperature (here, 200 ° C.) from the beginning.
This is because the crystallized state is the same as the characteristic (see FIG. 7C) when 1 is vapor-deposited.

However, when the transparent conductive film 11 is formed with the substrate temperature higher than the transition temperature from the beginning, the film quality is certainly improved, but the patterning characteristics thereafter are deteriorated. The annealing temperature after patterning is 200 ° C.
The temperature is preferably ~ 450 ° C. This is above 450 ℃,
This is because the switching element Q may be affected.

Next, as shown in FIG. 3I, a light-shielding layer 14 is formed at a required position on the other insulating substrate 13.
When the substrate 13 and the substrate 1 are opposed to each other, the light shielding layer 14 is formed at a position corresponding to a wiring portion (a portion such as the selection line 4 and the signal line 7) and a portion of the switching element Q ( See FIG. 4J). After that, the counter electrode 15 is formed on the entire surface including the light shielding layer 14. The molecular alignment treatment is performed on the transparent electrode 12 on the substrate 1 and the counter electrode 15 on the substrate 13.

Next, as shown in FIG. 4J, the substrate 1 and the substrate 1
Liquid crystal display device A according to the present embodiment in which the transparent electrode 12 and the counter electrode 15 are opposed to each other, and the liquid crystal layer 16 is sealed between the substrate 1 and the substrate 13 via a spacer (not shown).
To get

As described above, according to the present embodiment, in forming the transparent conductive film 11, first, the substrate temperature is set to be equal to or lower than the transition temperature of the transparent conductive film 11 which becomes the transparent electrode 12 later. Is deposited, the patterning characteristics are improved, the subsequent patterning process is facilitated, and the number of steps can be reduced.

Further, since the transparent conductive film 11 is subjected to a heat treatment after the patterning process on the transparent conductive film 11 so as to have a transition temperature or higher, the transparent conductive film 11, that is,
The light transmittance of the transparent electrode 12 is improved, the sheet resistance thereof is also favorably reduced, the film quality is improved, and the quality of the liquid crystal display device A can be improved.

Incidentally, in the present embodiment, in a normal case, that is, as shown in FIG. 18E, P-SiN is formed on the source region 42s.
It can also be applied in the process of patterning the transparent conductive film 51 after forming the window 50 penetrating the film 49 and the interlayer insulating films 48 and 45.

In the formation of the switching element Q, particularly the active layer 2 thereof, the amorphous silicon thin film is heat-treated in two steps, that is, the first heat treatment is performed at a relatively high temperature and the second heat treatment is performed at a lower temperature. As a result, the polycrystalline silicon thin film 2 has a substantially uniform grain size, which can prevent characteristic variations due to grain size variations and can significantly reduce the heat treatment time.

Further, the P-SiN film 9 for passivation and the interlayer insulating film 8 for buffer are removed by etching while leaving the wiring portion, so that the side end portion 9a of the P-SiN film 9 is made into an overhang shape, and Since the transparent conductive film 11 is formed on the upper surface and separated by the overhang portion 9a, the P-SiN film 9 can be left on the wiring, especially on the switching element Q, and P
The hydrogen H ₂ in the —SiN film 9 can be supplied to the switching element Q. Therefore, the switching characteristics of the switching element Q can be improved, and the liquid crystal display device A
The quality of can be improved.

Further, in this embodiment, the source region 2s
Since the interlayer insulating layer 8 and the P-SiN film 9 are removed from the region where the transparent electrode 12 is formed to the region where the transparent electrode 12 is formed, the step coverage on the source region 2s is reduced and the step coverage is improved.
Therefore, when the transparent conductive film 11 is formed, the source region 2
The disconnection does not occur on s, and the liquid crystal display device A can be highly reliable.

In addition, the remaining P-SiN in FIG.
Since the side end portion of the film 9 has an overhang shape, the transparent conductive film 11 can be separated for each picture element at the same time when the transparent conductive film 11 is vapor-deposited.

In the above embodiment, a large number of picture elements are arranged in a matrix and each picture element is controlled by a signal from the outside,
That is, the liquid crystal is turned on / off by the transparent electrode 12 formed separately for each picture element and the counter electrode 15 formed so as to face the transparent electrode 12 to display an image.

By the way, the transparent electrode 12 is, as described above,
It is divided for each picture element, and there is always a portion without the transparent electrode 12. Since light is always transmitted through this portion, the contrast is lowered.

Therefore, in the above-described embodiment, the transparent electrode 1
The light shielding layer 14 is formed on the inner surface of the substrate 13 corresponding to the portion where there is no 2 (see FIG. 4J). In particular, since the above-described embodiment is the active matrix driving method, the switching element Q is formed for each picture element. Therefore, the light shielding layer 14 is formed also in the portion corresponding to the switching element Q.

However, since the light shielding layer 14 does not transmit light, the amount of light reaching the transparent electrode 12 side is reduced. In particular, the ratio of the area of the part without the light shielding layer 14 (aperture ratio) is only around 50%, and thus the light utilization rate is deteriorated.

Therefore, as another embodiment of the present invention,
The light utilization rate is improved by the means described below. That is,
As shown in FIG. 10, after a transparent material (for example, photoresist) 21 is formed on the substrate 13 on the light incident side, a groove 22 is formed at a required portion of the transparent material 21. This groove 22
It is composed of two opposed tapered portions (including curved surfaces) 22a, and is continuously formed at a location corresponding to the light shielding layer 14 formed on the inner surface of the substrate 13. By providing the groove 22, the light incident on the portion of the substrate 13 corresponding to the light shielding layer 14 is refracted by the taper portion 22 a of the groove 22 and is incident on the transparent electrode 12 side. Therefore, the groove 22 functions as a so-called lens for refracting light,
Since all the light incident on the substrate 13 is supplied to the transparent electrode 12 side, the light utilization rate is improved.

Specifically, for example, as shown in FIG.
The width d = 10 on the inner surface of the glass substrate 13 having the thickness T = 1.1 mm.
If the light-shielding layer 14 of μm is formed, its substrate 1
A transparent material 21 having a thickness of t = 1 to 5 μm is formed on the upper surface of 3, and a groove 22 is formed at a position of the transparent material 21 just corresponding to the light shielding layer 14. Considering the case where perfect parallel light enters from above the substrate 13, the groove 22
The angle θ at which the light is refracted by the tapered portion 22a of is 0.2
6 ° is sufficient, and it can be considered that the light scattering caused by providing the groove 22 is negligible.

Therefore, by providing the groove 22 as described above, the loss of the amount of light reaching the transparent electrode 12 side can be reduced, and the aperture ratio can be apparently improved.
In addition, in the liquid crystal display device A according to the present embodiment, the surface on which the groove 22 is formed is always directed toward the light source side, so that blurring of the image does not occur at all. Also, high resolution can be achieved.

Next, a method of forming the groove 22 will be described with reference to FIGS. First, the first method is to form a photoresist 21A that transmits visible light on the substrate 13 as shown in FIG. 12A, and then, as shown in FIG. 12B, correspond to a portion where a light shielding layer will be formed later. Patterning removal (exposure, development) is performed on the location using a photomask or the like. At this time, patterning is performed so that the distance m between the opening-side end portions 21Aa is smaller than the width of the light shielding layer 14 to be formed later (shown by the chain double-dashed line).

Then, as shown in FIG. 12C, 150 ° C.
Heat treatment at ~ 200 ° C. At this time, the opening-side end portion 21Aa of the resist 21A becomes substantially tapered or curved as shown in the drawing due to deformation due to heat melting, and the groove 22 is formed. In the case where the distance between the tapered portion 22a has become widely, as shown in FIG. 13, further SiO ₂ film 23 C
If formed by the VD method or the sputtering method, the distance between the tapered portions 24a of the groove 24 formed on the SiO ₂ film 23 can be narrowed.

Next, the second method of forming the groove 22 is as follows.
As shown in FIG. 14A, after the negative resist 21B is formed on the upper surface of the substrate 13 having the light shielding layer 14 formed on the inner surface in advance, light is emitted from the inner surface side of the substrate 13 (the surface on which the light shielding layer 14 is formed). The negative resist 21B is exposed to light to be exposed. At this time, weak light is also applied to the portion corresponding to the light shielding layer 14 due to the light diffraction phenomenon, and as a result, as shown in FIG.
As shown in B, the portion of the resist 21B corresponding to the light shielding layer 14 is developed into a concave shape having a taper or a curved surface to form a groove 22. In this case, since the diffraction effect of light is used, the groove 22 having a very narrow width can be obtained.

In the above two forming methods, if the resist 21A or 21B and the substrate 13 are sputter-etched at the same etching rate, that is, the resist 2 is formed.
By etching back until 1A or 21B disappears, the upper surface of the substrate 13 follows the shape of the resist 21A or 21B, so that the groove 22 can be formed in the substrate 13 itself.

As the resist 21A or 21B,
For example, a transparent deep UV resist that transmits a visible light region is preferable.

Further, in the first method of FIG. 12, a low melting point softening material is used instead of the resist 21A, the low melting point softening material is patterned by a photoresist method, and then the photoresist on the low melting point softening material is used. May be peeled off and the low melting point softening material may be further softened to form the groove 22.

In the above embodiment, the groove 2 is formed on the substrate 13.
2 is formed to improve the light utilization rate, but as still another embodiment, as shown in FIG. 15, projections 31 having tapered portions 31a on both sides are provided on the substrate 13. Good.

In this case, the light 11 incident on the tapered portion 31al on the left side in the drawing is refracted in the right direction and is incident on the transparent electrode 12r side on the right side across the light shielding layer 14,
On the contrary, the light l2 incident on the taper portion 31ar on the right side
Is incident on the transparent electrode 12l on the left side,
Similar to the example of the groove 22 shown by, the light utilization rate is improved.

As a method of forming the protrusion 31, first, as shown in FIG. 16A, the etching rate of the substrate 13 is different from that of the substrate 13, for example, the P-SiN film 3 is formed.
2 is formed, and then the light shielding layer 14 of the P-SiN film 32 is formed.
A photoresist 33 is formed at a position corresponding to (not shown in FIG. 16). After that, plasma etching is performed on the P-SiN film 32 using the photoresist 33 as a mask. At this time, since the P-SiN film 32 has a higher etching rate than the substrate 13, the P-SiN film 32 is etched earlier, and when the etching of the substrate 13 is started, the etching also progresses to the portion below the photoresist 33, and finally the etching is performed. As shown in FIG. 16B, protrusions 31 having both surfaces tapered are formed on the substrate 13. The size of the protrusion 31 is very small, for example, the height h is about 0.3 μm and the lateral width D is about 10 μm.

Then, as shown in FIG.
1 and a light reflection layer 34 having an apex angle ψ with a slightly acute angle and having an approximately isosceles triangular cross-section, are provided on the light shielding layer 14 together with the light shielding layer 14.
It can be reflected to the second side, and the light utilization rate can be further improved.

In each of the above-mentioned embodiments, the ITO film is used as the transparent electrode film 11, but it is also possible to use SnO ₂ film (nesa film) or ZnO film.

The method for producing a polycrystalline semiconductor and the method for producing a liquid crystal display device according to the present invention are not limited to the above-described embodiments, and various other configurations can be adopted without departing from the scope of the present invention. .

[0070]

According to the method for producing a polycrystalline semiconductor according to the present invention described above, it is possible to produce a polycrystalline semiconductor in which the grain sizes are substantially equalized. Further, the heat treatment time can be shortened significantly.

According to the above-described method of manufacturing a liquid crystal display device of the present invention, the thin film transistor is formed of a polycrystalline semiconductor having a substantially uniform grain size, thereby preventing variations in transistor characteristics and improving the liquid crystal display device performance. Quality can be realized.

[Brief description of drawings]

1A to 1C are process diagrams showing a method for manufacturing a liquid crystal display device according to an embodiment of the present invention.

2A to 2F are process diagrams showing a method for manufacturing a liquid crystal display device according to an embodiment of the present invention.

3A to 3I are process diagrams showing a method for manufacturing a liquid crystal display device according to an embodiment of the present invention.

FIG. 4J is a process drawing showing the manufacturing method of the liquid crystal display device according to the embodiment of the present invention.

FIG. 5 is a characteristic diagram showing an annealing time dependency of a grain generation rate.

FIG. 6 is a characteristic diagram showing the number of grains per unit area for each size.

FIG. 7 is a characteristic diagram showing a crystalline state of a transparent conductive film by X-ray diffraction. A This is the case where the transparent conductive film is vapor-deposited with the substrate temperature set to the transition temperature or lower. B This is the case when annealing is performed at a transition temperature or higher after vapor deposition. This is the case where the transparent conductive film is vapor-deposited with the C substrate temperature set to the transition temperature or higher.

FIG. 8 is a characteristic diagram showing spectral transmission characteristics of a transparent conductive film.

FIG. 9 is a characteristic diagram showing the annealing temperature dependence of sheet resistance.

FIG. 10 is a configuration diagram showing an embodiment in which the utilization factor of light is improved.

11 is an enlarged view showing a main part of FIG.

FIG. 12 is a process drawing showing a first method of forming a groove.

FIG. 13 is a configuration diagram showing a method for reducing the distance between the tapered portions.

FIG. 14 is a process drawing showing a second method of forming a groove.

FIG. 15 is a configuration diagram showing a case where the light utilization rate is improved.

FIG. 16 is a process drawing showing the method of forming protrusions.

17A to 17C are process diagrams showing conventional examples A to C.

FIG. 18 is a process diagram showing a conventional example of D to F.

FIG. 19 is a process chart showing a G conventional example.

[Explanation of symbols]

1, 13 insulating substrate, 2 active layer, 2s source region, 2d drain region, 3 gate insulating film, 4 gate electrode, 5, 8 interlayer insulating film, 7 signal line, 9 PS
iN film, 11 transparent conductive film, 12 transparent electrode, 14 light shielding layer, 15 counter electrode, 16 liquid crystal layer, 21 transparent material, 22 groove, 31 protrusion, A liquid crystal display device, Q switching element

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akashi Kawamura 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Within Sony Corporation (56) References JP-A-63-21818 (JP, A) (58) ) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/20

Claims (4)

(57) [Claims] 1. A method for manufacturing a polycrystalline semiconductor, comprising the steps of forming a semiconductor on a substrate, and introducing an ion species consisting of the main component of the semiconductor into the semiconductor by ion implantation to form an amorphous semiconductor. A step of forming, a first heat treatment step of heat- treating the amorphous semiconductor, and a step of heat-treating the amorphous semiconductor at a temperature lower than that of the first heat treatment step and for a longer time than the first heat treatment step. 2. A method for manufacturing a polycrystalline semiconductor, comprising the step 2 of heat treatment. 2. The method for producing a polycrystalline semiconductor according to claim 1, wherein the polycrystalline semiconductor is silicon. 3. A method of manufacturing a liquid crystal display device, comprising a thin film transistor connected to the thin film transistor, wherein the thin film transistor comprises a step of forming a semiconductor on a substrate, and an ion species consisting of a main component of the semiconductor is ion-implanted. forming an amorphous semiconductor is introduced into the semiconductor, the first heat treatment step of heat-treating the amorphous semiconductor, the amorphous semiconductor at a temperature lower than the first heat treatment step, and the first And a second heat treatment step in which heat treatment is performed for a longer time than the first heat treatment step. 4. The method of manufacturing a liquid crystal display device according to claim 3, wherein the amorphous semiconductor is silicon.