JP4998638B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine that pays out a prize ball when a game ball wins a prize opening provided in a game area, and in particular, a game ball again within a predetermined period in which measurement is started from the time of winning a prize opening. When a player wins a game, and when a game ball does not win within a predetermined period, the player may obtain a new judgment element for selecting a gaming machine to play. The present invention relates to pachinko and other gaming machines that can raise a sense of expectation for winning a prize and raise interest.

Conventionally, in a spinning machine such as a slot machine, the player can know the current game situation, or the player can select a game machine as a piece of information for paying out game media per number of games. Various gaming machines have been proposed that are provided with notification means for notifying the player of the number of times a certain winning symbol has been arranged.
For example, Japanese Patent Application Laid-Open No. 2003-265698 discloses a switching control device that switches a gaming state between a first gaming state and a second gaming state, and when a specific internal state is determined in the second gaming state, the internal state is determined. And when the specific internal state is determined in the first gaming state, the internal state notification device that does not notify the internal state, and the specific state in the first gaming state when the gaming state is the first gaming state A first probability notification device for notifying the winning probability that the internal state is determined and winning, and when the gaming state is the second gaming state, the specific internal state in the second gaming state is determined and the winning is achieved By providing the second probability notification device for notifying the winning probability, it becomes possible for the player to know the winning probability during the game, and to grasp the game progress ("luck" and "skill"), etc. Games that can There has been described.

JP 2003-265698 A (pages 8 to 10, FIGS. 13 to 14)

  It is an object of the present invention to provide a gaming machine that allows a player to easily check the degree of expectation for winning a jackpot and to increase the expectation for winning the jackpot.

  In order to achieve the above object, a gaming machine according to claim 1 is provided with a start opening provided in a game area, a start opening detecting means for detecting a winning of a game ball in the start opening, and a plurality of start holes provided in the game area. A special symbol display device for displaying a fluctuating symbol, a display control means for controlling the special symbol display device, a control means for controlling the operating state of the gaming machine, and a plurality of variably displayed on the display screen of the special symbol display device An expectation degree notifying means for notifying in advance a plurality of stages of the expected degree of definite stop in a predetermined manner for notifying the winning of the jackpot symbol, and the control means has won the game ball at the start opening In this case, the jackpot random number acquisition means for acquiring the jackpot random number value updated within a predetermined range, and the jackpot random number value acquired by the jackpot random number acquisition means are stored in the jackpot determination table. The jackpot determination means for determining whether or not the jackpot value is determined, and the variation information for determining the notification time for notifying the player of the determination result of the jackpot determination means, a plurality of preset variation information The winning information is selected from among the changing information selecting means, the changing winning prize notifying means for notifying the winning when the start opening is won during the fluctuation of the changing symbol, and the jackpot determining means. If it is determined that, the jackpot game control means for controlling the variable winning device that opens and closes the big winning opening to a jackpot gaming state that is more advantageous to the player than the normal gaming state, and is displayed on the special symbol display device Production information for selecting production information indicating the display pattern of the fluctuation symbol from a plurality of pieces of production information set in advance based on the fluctuation information selected by the fluctuation information selection means. Selection means; addition value storage means for storing a plurality of types of addition values corresponding to each of the plurality of pieces of effect information; and upper limit value storage means for storing a plurality of types of upper limit values corresponding to each of the plurality of pieces of effect information. When the production information is selected by the production information selection means, the addition value corresponding to the selected production information is cumulatively counted to obtain a first cumulative count value, and the variable winning notification means When the winning notification is made by the above, the accumulated information is selected by the accumulated count means for adding the predetermined added value to the first accumulated count value to obtain the second accumulated count value, and the effect information selecting means. In this case, the upper limit value corresponding to the selected effect information is acquired and stored as the current upper limit value, and the first or second cumulative count obtained by the cumulative count means. A cumulative upper limit determining means for determining whether or not a current value exceeds a current upper limit value stored in the current upper limit value storing means, and when the cumulative upper limit determining means determines that the current upper limit value is exceeded. Is a count value correction means for obtaining a corrected cumulative count value by subtracting a count value exceeding the current upper limit value from the first or second cumulative count value of the cumulative count means; and the count value is corrected by the count value correction means. If not, the first or second cumulative count value of the cumulative count means is controlled to be notified to the player via the expectation degree notification means corresponding to each stage of the expectation degree notification means. When the count value is corrected by the count value correcting means, the corrected cumulative count value is associated with each stage of the expectation degree notifying means via the expectation degree notifying means. Expectation degree notification control means for controlling so as to notify the player, and the display control means includes effect display pattern storage means for storing effect display patterns corresponding to each of the plurality of effect information, When the production information is selected by the production information selection unit, the production display pattern selection unit for selecting the production display pattern corresponding to the production information, and the production display pattern selected by the production display pattern selection unit. And a stop display control means for starting the change of the plurality of change symbols in the special symbol display device and sequentially stopping and displaying the change symbols based on the effect display pattern.

  Further, the gaming machine according to claim 2 is the gaming machine according to claim 1, wherein the control means is configured to provide the first cumulative count value, the second cumulative count value, or the corrected cumulative count via the expectation degree notifying means. When the value is notified to the player, a new cumulative count value is notified to the player via the expectation notification control means within a predetermined period measured by the measuring means and the measurement means that starts time measurement. If not, a predetermined subtraction value is subtracted from the reported cumulative count value, and the cumulative count value after the subtraction is associated with each stage of the expectation level notification unit via the expected level notification unit. And a second expectation degree notification control unit configured to notify the player and control to start time measurement by the measurement unit.

  In the gaming machine according to the first aspect, the control means selects, from among a plurality of preset fluctuation information, the fluctuation information for determining the notification time for notifying the player of the determination result of the jackpot determination means. In addition, if the control means wins the start opening during the variation of the variation symbol, the control means performs a winning notification for notifying the winning.

In addition, the control means, from among a plurality of effect information that is set in advance based on the variation information selected by the variation information selection means, the effect information indicating the display pattern of the variation symbol displayed on the special symbol display device select. In addition, when the production information is selected by the production information selection unit, the control unit cumulatively counts the added value corresponding to the selected production information to obtain the first cumulative count value, and also presents the variable winning notification When the winning notification is made by the means, the predetermined cumulative value is added to the first cumulative count value to obtain the second cumulative count value. Further, when the production information is selected by the production information selection unit, the control unit acquires an upper limit value corresponding to the selected production information and stores it as the current upper limit value. Further, the control means determines whether or not the first or second cumulative count value obtained by the cumulative count means exceeds the current upper limit value stored in the current upper limit value storage means. The control means subtracts a count value exceeding the current upper limit value from the first or second cumulative count value of the cumulative count means when the cumulative upper limit determination means determines that the current upper limit value is exceeded. To obtain a corrected cumulative count value. In addition, when the count value is not corrected by the count value correcting unit, the control unit associates the first or second cumulative count value of the cumulative count unit with each stage of the expectation level reporting unit and notifies the expected level notification. If the count value is corrected by the count value correcting means, the corrected cumulative count value is associated with each stage of the expectation degree notifying means, and the expectation degree notifying means is controlled. To inform the player via
Furthermore, the display control means selects an effect display pattern corresponding to the effect information selected by the effect information selection means, and variably displays a plurality of variable symbols on the special symbol display device based on the effect display pattern, Sequentially fluctuating symbols are stopped and displayed.

As a result, when the production information is selected and the variation of the variation symbol is started, the corrected cumulative count value corresponds to each stage representing the degree of expectation of the jackpot acquisition of the expectation notification means, and the expectation notification is made. Since the player is informed through the means, the player can be surely driven and controlled so that the player can easily confirm the expected degree of jackpot acquisition for each variation of the variation symbol through the expectation degree informing means. In addition, since a plurality of types of added values are provided corresponding to each of the plurality of pieces of presentation information, it is possible to easily set an expectation for winning the jackpot of the presentation display pattern corresponding to each piece of presentation information. Display control can be surely performed so that the person can easily confirm the expected degree of winning the jackpot.
Further, when the winning notification is made by the changing winning notification means, the predetermined added value is added to the accumulated count value, so that the expectation for the jackpot acquisition that is notified by the expectation notification means even during the fluctuation of the changing symbol The level of the degree can be increased, and the player's expectation for winning the jackpot can be further increased.
Further, when the production information is selected by the production information selection means, the upper limit value corresponding to the selected production information is acquired and stored as the current upper limit value, while the current storage value and the cumulative count means The first cumulative count value (the second cumulative count value when the second cumulative count value is obtained) is compared, and when the count value exceeds the currently stored value, the cumulative count value of the cumulative count means In order to obtain the corrected cumulative count value by subtracting the count value exceeding the current upper limit value from the above, the expected degree of winning the big hit is notified to the player via the expected degree notification means based on the corrected cumulative count value. For this reason, it is possible to notify the player of an accurate expectation level for the jackpot acquisition corresponding to the effect display variably displayed on the special symbol display device.

  Further, in the gaming machine according to claim 2, when a new cumulative count value is not notified to the player within a predetermined period after the cumulative count value is notified to the player via the expectation notification means. The predetermined subtraction value is subtracted from the reported cumulative count value, and the cumulative count value after the subtraction is notified to the player via the expectation degree notification means corresponding to each stage of the expectation degree notification means. When the player stops the game, it can be controlled to surely stop the notification of the expectation level for the jackpot acquisition by the expectation level notification means.

1 is a front view showing an entire pachinko machine according to Embodiment 1. FIG. It is the front view which showed the game area | region of the game board of the pachinko machine based on Example 1. FIG. It is the rear view which showed the whole pachinko machine concerning Example 1. It is the front view which showed the winning rate display part which concerns on Example 1. FIG. It is a block diagram which shows the structure of the control system which concerns on the drive control of the pachinko machine based on Example 1. FIG. It is a block diagram which shows the structure of RAM of the main control board of the pachinko machine based on Example 1. FIG. It is a block diagram which shows the structure of ROM of the display control board of the pachinko machine concerning Example 1. FIG. It is a block diagram which shows the structure of RAM of the display control board of the pachinko machine based on Example 1. FIG. It is a figure which shows an example of the fluctuation pattern table memorize | stored in the fluctuation pattern table storage area of ROM of the display control board of the pachinko machine concerning Example 1. FIG. In the pachinko machine concerning Example 1, it is a figure showing how to hold data of five storage areas, how to turn on / off four hold lamps, and the relationship between five storage areas and a first hold LED. . In the pachinko machine which concerns on Example 1, it is the figure which showed how to hold | maintain the data of five memory areas, how to turn on / off the hold lamp, and the relationship between the five memory areas and the first hold LED. It is a flowchart figure about the "start winning process" which the main control board control CPU of the pachinko machine concerning Example 1 performs. It is a flowchart figure about the "result alerting | reporting process" which the main control board control CPU of the pachinko machine based on Example 1 performs. 7 is a sub-flowchart showing a sub-process of “probability change acquisition process” executed by the main control board control CPU of the pachinko machine according to the first embodiment. 7 is a flowchart of “big hit game processing” executed by the main control board control CPU of the pachinko machine according to Embodiment 1; It is a flowchart of display control processing, such as reach lose, which CPU of the display control board of the pachinko machine concerning Example 1 performs. It is a flowchart of the winning rate display process which CPU of the display control board of the pachinko machine concerning Example 1 performs. It is the front view which showed the lighting aspect of the winning rate display part which concerns on Example 1. FIG. It is the front view which showed the lighting aspect of the winning rate display part which concerns on Example 1. FIG. It is the front view which showed the lighting aspect of the winning rate display part which concerns on Example 1. FIG. It is a flowchart of the winning rate display process which CPU of the display control board of the pachinko machine concerning Example 2 performs. It is a flowchart of the winning rate display process which CPU of the display control board of the pachinko machine concerning Example 3 performs. It is a flowchart of the winning rate display process which CPU of the display control board of the pachinko machine concerning Example 4 performs. It is a front view which shows the game board of the pachinko machine which concerns on Example 5. FIG. It is a front view which shows the principal part of the special symbol display apparatus of the pachinko machine concerning Example 5. It is a block diagram which shows the structure of the control system which concerns on the drive control of the pachinko machine based on Example 5. FIG. It is a block diagram which shows the structure of RAM of the main control board of the pachinko machine concerning Example 5. It is a block diagram which shows the structure of ROM of the main control board of the pachinko machine concerning Example 5. It is a block diagram which shows the structure of RAM of the sub integrated control board of the pachinko machine based on Example 5. FIG. It is a block diagram which shows the structure of ROM of the sub integrated control board of the pachinko machine based on Example 5. FIG. It is a block diagram which shows the structure of ROM of the effect display board | substrate of the pachinko machine which concerns on Example 5. FIG. It is a figure which shows an example of the variation pattern determination table stored in the variation pattern determination table storage area of ROM of the main control board of the pachinko machine concerning Example 5. It is a figure which shows an example of the production pattern selection table stored in the production pattern selection table storage area of ROM of the sub integrated control board of the pachinko machine concerning Example 5. It is a figure which shows an example of the production | presentation display pattern table stored in the production | presentation display pattern table storage area of ROM of the production | presentation display board | substrate of the pachinko machine which concerns on Example 5. FIG. It is a main flowchart which shows the interruption control process which CPU of the main control board of the pachinko machine concerning Example 5 performs. FIG. 10 is a sub-flowchart showing a sub-process of “start opening prize process” executed by a CPU of a main control board of a pachinko machine according to Embodiment 5. FIG. FIG. 10 is a sub-flowchart showing a sub-process of “big hit determination process” executed by a CPU of a main control board of a pachinko machine according to Embodiment 5. FIG. 10 is a sub-flowchart showing a sub-process of “variation pattern selection process” executed by the CPU of the main control board of the pachinko machine according to the fifth embodiment. It is a sub-flowchart which shows the sub process of the "hold LED display process" which CPU of the main control board of the pachinko machine concerning Example 5 performs. 14 is a sub-flowchart showing a sub-process of “command transmission process” executed by the CPU of the main control board of the pachinko machine according to Embodiment 5. 10 is a sub-flowchart illustrating a sub-process of “determined signal transmission process” executed by a CPU of a main control board of a pachinko machine according to Embodiment 5. It is a sub-flowchart which shows the sub process of the "big hit game process" which CPU of the main control board of the pachinko machine concerning Example 5 performs. It is a flowchart which shows the control processing performed when CPU of the sub integrated control board of the pachinko machine concerning Example 5 receives each command as instruction information from CPU of the main control board. FIG. 10 is a sub-flowchart showing a sub-process of “effect instruction processing” executed by the CPU of the sub-integrated control board of the pachinko machine according to Embodiment 5. FIG. 14 is a sub-flowchart showing a sub-process of “Expectation LED display process 1” executed by the CPU of the sub-integrated control board of the pachinko machine according to the fifth embodiment. It is a subflowchart which shows the subprocess of the "expected degree LED display process 2" which CPU of the subintegrated control board of the pachinko machine concerning Example 5 performs. It is a flowchart which shows the control processing performed when CPU of the production display board of the pachinko machine which concerns on Example 5 receives display instruction information from CPU of a sub integrated control board.

  Embodiments 1 to 4 in which a gaming machine according to the present invention is embodied in a pachinko machine will be described in detail below with reference to the drawings.

  First, a schematic configuration of the pachinko machine according to the first embodiment will be described with reference to FIGS. FIG. 1 is a front view showing the entire pachinko machine according to the first embodiment. FIG. 2 is a front view showing the game board of the pachinko machine according to the first embodiment. FIG. 3 is a rear view showing the pachinko machine according to the first embodiment.

  As shown in FIGS. 1 to 3, the pachinko machine 1 according to the first embodiment is a so-called first type pachinko machine that pays out a predetermined amount of pachinko balls as a prize ball, and is generally called a CR machine (card reading machine). The card type ball lending machine and the pachinko machine 1 are configured as a pair, but the card type ball lending machine is not shown in FIGS. 1 and 3. The pachinko machine 1 has a synthetic resin inner frame 3 attached to a wooden outer frame 2 so as to be openable and closable with respect to the outer frame 2 via an upper hinge 4 and a lower hinge 5 constituting a hinge for attaching a front frame. It has been. A front cover member 6 made of synthetic resin is attached to the front side of the upper half of the middle frame 3 so that it can be opened and closed by being pivotally supported at the upper and lower sides of the left end edge. Further, a substantially circular window portion 7 is opened at a substantially central portion of the front cover member 6, and the game board 8 is passed through two glasses attached to a glass holding frame formed on the outer peripheral edge portion of the window portion 7. The upper game area 9 can be seen. In addition, a full-color light emitting diode is incorporated in the upper edge of the window 7 of the front cover member 6 and an error display illumination lamp 10A for displaying an error during the game is attached. Further, on the left and right outer sides of the error display illumination lamp 10A, each illumination lamp 10B for notifying the occurrence of “winning” or the like or performing a light effect during the game is attached. Further, the front surface portion of the front cover member 6 is covered with an opaque synthetic resin front member 6A, and is not shown between the electric lamps 10A and 10B and the upper peripheral edge of the window portion 7. Full color diodes are built in the left and right direction, and light effects are performed during the game.

  Further, a key insertion part 11 for operating a locking device (not shown) for locking the middle frame 3 and the front cover member 6 is provided at the right center part of the front cover member 6. In order to open the front cover member 6, if a predetermined key is inserted into the key insertion portion 11 and rotated in a predetermined direction, the lock state of the locking device is released and only the front cover member 6 is opened.

  Further, below the front cover member 6, an upper plate 12 that receives a prize ball to be paid out via a prize ball payout device is provided on a synthetic resin plate 14 with a built-in speaker 13. The synthetic resin plate 14 is pivotally supported at the upper and lower ends of the left edge, and is attached so that it can be opened by lowering a lever (not shown) provided inside after opening the front cover member 6. . Further, operation buttons 15 and 16 and a card balance display device 17 of a card type ball lending machine are provided on the central front surface portion of the upper plate 12. A lower plate 18 is disposed under the upper plate 12. Further, the pachinko ball of the upper plate 12 is sent to the launching device 20 connected to the operation handle 19 via a ball feeding mechanism (not shown) communicating with the upper plate 12.

Next, in FIG. 2, the configuration of the game area 9 on the game board 8 in the pachinko machine 1 will be described. The game area 9 is configured by arranging each structure such as a prize opening on a game board 8 made of a plate material having a predetermined thickness, and an annular rail 22 is erected so as to surround it. This rail 22 constitutes an overlapping guide path 23 that guides the launched pachinko ball into the game area 9, and restricts the progress of the pachinko ball driven along the rail 22 on the right shoulder. Step portion 24.

  An opening is established in the approximate center of the game area 9, and a special symbol display device 25 is disposed on the front side of the opening. The special symbol display device 25 includes a decorative member 26 attached from the front side of the game board 8, a liquid crystal display 27 attached from the back side of the game board 8, and the like. The liquid crystal display 27 is a liquid crystal panel that displays three variable symbols on the left, middle, and right, and a normal symbol display unit 28 that displays a normal symbol divided into left and right is formed in the lower left corner. Has been. An upper decorative member 26 </ b> A in which a frog character is formed on the front surface is attached to the front surface of the frame body member 26 </ b> B constituting the decorative member 26. A guide member 29 is attached to the inner bottom surface of the frame body member 26B.

  Further, a winning rate display unit 53 is provided on the left side of the special symbol display device 25. The winning rate display unit 53 can change the lighting region in five stages by the built-in winning rate LED 54. Here, the winning rate display section 53 changes the lighting area according to the frequency at which the pachinko ball wins the start opening 39, and notifies the player. The details of the winning rate display section 53 will be described later.

  On the other hand, gates 30 and 31 are arranged on the left and right of the special symbol display device 25. Further, ordinary windmills 32 and 33 are provided between the gates 30 and 31 and the special symbol display device 25, and windmills in which the electric lamps 35A and 36A are built in both shoulder sides of the special symbol display device 25 are provided. 35 and 36 are provided. In addition, shoulder electric decoration members 37 and 38 in which electric lamps 37A and 38A are incorporated are arranged outside the gates 30 and 31, respectively.

  Also, immediately below the special symbol display device 25, a start opening 39 is provided as a start winning opening with a snake character drawn on the front. The starting port 39 is provided with a starting port switch 39B (see FIG. 5) for detecting the winning of the pachinko ball, and the special symbol displayed on the liquid crystal display 27 is changed by detecting the winning of the pachinko ball. . If the special symbol is changed and the start opening 39 is won, up to four winnings are stored in a first holding counter (described later) of a RAM provided on a main control board 69 (see FIG. 5) described later. And is put on hold as a fixed number of changes. Two first hold LEDs 40 for displaying the count value stored in the first hold counter are arranged on each of the left and right sides of the liquid crystal display 27.

  Each of the gates 30 and 31 is provided with a gate switch (not shown) for detecting the passage of the pachinko sphere, and the normal symbol of the normal symbol display unit 28 is changed by detecting the passage of the pachinko sphere. Then, when a pachinko ball enters the gate 30 or the gate 31 and the normal symbol of the normal symbol display unit 28 fluctuates and stops in a predetermined display mode (for example, “33”, “77” are aligned) In such a case, the tulip-type accessory 39A provided at the upper part of the starting port 39 is opened for a predetermined time (about 1 second in the first embodiment), and the probability that a pachinko ball wins the starting port 39 increases.

  Further, when the pachinko ball passes through the gates 30 and 31 while the normal symbol is changing, the second holding counter (described later) of the RAM provided on the main control board 69 (see FIG. 5) up to four passes. ) And is held as a fixed number of changes. And four 2nd hold | maintenance LED43 which displays the count value memorize | stored in this 2nd hold | maintenance counter is arrange | positioned in the left-right horizontal direction at the upper end edge part of 26 A of upper decoration members.

  A special winning device 47 is provided below the starting port 39. The special winning device 47 is formed with a large winning port 46 whose front surface is covered with an open / close door 45 having a wide lateral opening. In addition, on each of the left and right sides of the large winning opening 46, winning openings 48 and 49 that open upward are formed so as to protrude to the front side. In addition, under the winning openings 48 and 49, electric lamps 48A and 49A are incorporated.

  In addition, above the both sides of the special prize winning device 47, lower prize winning openings 50 and 51 in which electric lamps 50A and 51A are incorporated are arranged and communicated with a prize ball bowl (not shown) on the back of the game board 8, A lower prize opening switch (not shown) for detecting a prize at the lower prize winning openings 50 and 51 is provided. In addition, an out port 52 is opened along the rail 22 immediately below the special winning device 47. Furthermore, in such a game area 9 surrounded by the rails 22, a plurality of nails are driven together with the above-described components to constitute a complicated flow path of the pachinko ball.

Next, the configuration of the back side of the pachinko machine 1 will be described based on FIG.
As shown in FIG. 3, a metal mechanism board 55 such as an iron plate is attached to a substantially central portion of the middle frame 3 so that the game board 8 is detachable. A mechanism set board 56 made of synthetic resin is attached to the back side of the mechanism board 55 with a hinge so as to be freely opened and closed.
In addition, a prize ball tank 57 that opens upward is fixed to the mechanism set board 56 at the upper rear portion of the back side of the pachinko machine 1. The prize ball tank 57 has a communication hole 58 formed in an inclined bottom surface, and a tank rail that forms a passage through which the pachinko balls are aligned and flowed out in a line below the communication hole 58 to send the pachinko balls to the prize ball case 59. 60 is attached.

In addition, in the prize ball guiding portion 61 that guides the pachinko balls to the prize ball case 59, a row of prize ball passages for sending the pachinko balls on the downstream side of the tank rail 60 is formed.
The prize ball case 59 is provided with a ball detection switch for confirming a pachinko ball passing through the prize ball passage in the prize ball guide 61 and a payout solenoid for adjusting the payout of the pachinko ball. The prize ball tank 57, the tank rail 60, the prize ball guide section 61, the prize ball case 59, and the like constitute a prize ball and rental payout system.
A discharge portion is formed on the downstream side of the prize ball case 59. A prize ball discharge passage 62 for discharging a prize ball and a lower tray discharge path 63 having a lower tray overflow switch (not shown) are provided below the lower end portion. Is formed. A lower tray box 64 that receives prize balls overflowing from the upper plate 12 and guides them to the lower plate 18 through the lower plate discharge path 63 is attached to the back side of the middle frame 3.

  A synthetic resin center cover 65 that covers a liquid crystal display (LCD) or the like is attached to the lower side of the tank rail 60. The center cover 65 has a display control board 66 for driving and controlling the LCD, a sound control board 67 for driving and controlling the speaker 13 and a lamp control board 68 for driving and controlling the electric lamp 10B and the like. Is attached. In addition, a board case 70 in which a main control board 69 for controlling the gaming operation of the pachinko machine 1 is built is provided below the center cover 65. A power supply box 71 is disposed on the lower right side of the substrate case 70.

Next, the winning rate display unit 53 provided in the special symbol display device 25 will be described with reference to FIG. FIG. 4 is a front view showing the winning rate display section 53 according to the first embodiment.
As shown in FIG. 4, it has an inverted triangular shape that is curved at a certain rate and becomes narrower as it goes downward. Furthermore, the winning rate display portion 53 is divided into five parts, and the first winning rate display area 53A, the second winning rate display area 53B, the third winning rate display area 53C, and the fourth winning rate are arranged in order from the bottom. A display area 53D and a fifth winning percentage display area 53E are provided.

Further, a winning rate LED 54 is built in the winning rate display section 53. The winning rate LED 54 can select any display area (up to five places) from the winning rate display areas 53A to 53E and light it.

The winning rate display unit 53 configured as described above starts measurement of a predetermined time (5 seconds in the first embodiment) by the lighting timer 73 (see FIG. 5) when the pachinko ball wins the start opening 39. When the pachinko ball wins the start opening 39 again within the predetermined time, the display area to be lit is increased by one.
When the pachinko ball wins the start opening 39, the extinction timer 74 (see FIG. 5) starts measuring a predetermined time (10 seconds in the first embodiment), and the pachinko ball wins the start opening 39 again within the predetermined time. If not, reduce the display area to light up by one.

still. When increasing the display area to be lit, the winning rate display unit 53 is in order from the bottom (first winning rate display region 53A, second winning rate display region 53B, third winning rate display region 53C, fourth winning rate display region 53D). And in the order of the fifth winning percentage display area 53E).
In addition, the winning rate display unit 53 is arranged in order from the top (the fifth winning rate display region 53E, the fourth winning rate display region 53D, the third winning rate display region 53C, and the second winning rate display) when reducing the lighting display area. The light is turned off in the order of the area 53B and the first winning percentage display area 53A).

  From the above, it is possible to visually notify the player of the winning rate at the start port 39 with respect to the number of pachinko balls launched by the launching device 20 for the game area 9. The player can make a standard for selecting a pachinko machine to play by confirming to which winning rate display area (53A to 53E) the winning rate display portion 53 is lit.

  Next, the configuration of the control system related to the drive control of the pachinko machine 1 configured as described above will be described with reference to FIGS. FIG. 5 is a block diagram illustrating a configuration of a control system related to drive control of the pachinko machine 1 according to the first embodiment. FIG. 6 is a block diagram illustrating the configuration of the RAM of the main control board 69 of the pachinko machine 1 according to the first embodiment. FIG. 7 is a block diagram illustrating the configuration of the ROM of the display control board 66 of the pachinko machine 1 according to the first embodiment.

  As shown in FIG. 5, the control system related to the drive control of the pachinko machine 1 includes a main control board 69, a sound control board 67, a lamp control board 68, a display control board 66, and the like.

The main control board 69 includes a CPU 461, a ROM 462, a RAM 463, an input / output circuit (I / O) 464, and the like. The CPU 461, the ROM 462, the RAM 463, and the input / output circuit (I / O) 464 are mutually connected by a bus line. It is connected to the. A clock circuit 460 is connected to the CPU 461 and a predetermined clock signal is input. The input / output circuit 464 is connected to a start port switch 39B, lower winning port switches (not shown), winning port switches, large winning port count switches, V switches, and the like.
As will be described later, when a pachinko ball wins the start opening 39, the pachinko ball passed by the start opening switch 39B is detected, and the input / output circuit 464 receives a detection signal from the start opening switch 39B. On the other hand, the CPU 461 that monitors the input / output circuit 464 determines that the pachinko ball has won the start opening 39.

Further, as shown in FIG. 6, the RAM 463 of the main control board 69 has a numerical value obtained by repeatedly adding 1 from 0 to 359 based on the clock signal input from the clock circuit 460 (the maximum value 359 is followed by the minimum value). A big hit counter 463A is provided for storing (return to 0). The count value of the jackpot counter 463A is read at the timing when the switch signal is output from the start port switch 39B, and it is determined whether or not the jackpot is based on the read count value. Here, for example, in normal times, the count value “7” corresponds to the jackpot, and in the so-called probability variation mode (when probability variation is acquired), the count value “1, 3, 5, 7” corresponds to the jackpot. The other count values are off.
Therefore, in the case of the normal gaming state, a jackpot is generated with a probability of 1/360, and in the case of a gaming state with a probability variation, a jackpot is generated with a probability of 4/360.

  In addition, a normal symbol counter 463B is provided in which a numerical value obtained by repeatedly adding one by one from 0 to 9 (returning to the minimum value 0 next to the maximum value 9) based on the clock signal input from the clock circuit 460 is provided. Yes. The count value of the normal symbol counter 463B is read at the timing when the switch signal is input from each gate switch, and it is determined whether or not it is a hit based on the read count value. Here, for example, the case where the count value is an even number corresponds to a win, and the case where the count value is an odd number corresponds to a loss.

  Here, the normal symbol counter 463B stores a numerical value stored when a signal from a gate switch for detecting the passage of the pachinko ball is inputted when the pachinko ball passes through the gates 30 and 31 (see FIG. 2). Is stored in the parameter storage area 463K as the “normal symbol count value” at that time.

  In addition, a first holding counter 463C is provided that counts up to a maximum of four winning prizes won in the start port 39 while the changing symbols of the special symbol display device 25 are changing. In addition, a second holding counter 463D is provided that counts up to four passes through the gate 30 or the gate 31 while the normal symbol of the normal symbol display unit 28 is changing.

  Further, the RAM 463 has a reach counter 463E in which a numerical value obtained by repeatedly adding one by one from 0 to 142 based on the clock signal output from the clock circuit 460 (returns to the minimum value 0 next to the maximum value 199) is stored. Is provided. The reach value of the reach counter 463E is read at the timing when the switch signal is input from the start port switch because the reach state does not occur unless the pachinko ball wins the start port 39, and based on the read count value. It is determined whether or not reach is reached. Here, for example, this corresponds to the case of reach loss where the count value “0 to 27” is released after reaching, and the case where the count value “28 to 199” is immediately released without reaching reach.

The RAM 463 stores a jackpot symbol selection counter in which a numerical value obtained by repeatedly adding one by one from 0 to 8 based on the clock signal output from the clock circuit 460 (returns to the minimum value 0 after the maximum value 8) is stored. 463F is provided. The count value of the jackpot symbol selection counter 463F is read at the timing when the switch signal is output from the start port switch, and the jackpot symbol displayed on the special symbol display device 25 is selected based on the read count value. Here, for example, in the normal gaming state, the count value “0” is the jackpot symbol “111”, the count value “1” is the jackpot symbol “222”, the count value “2” is the jackpot symbol “333”, and the count value “3” is a jackpot symbol “444”, a count value “4” is a jackpot symbol “555”, a count value “5” is a jackpot symbol “666”, a count value “6” is a jackpot symbol “777”, and a count value “7” "Corresponds to the jackpot symbol" 888 ", and the count value" 8 "corresponds to the jackpot symbol" 999 ". Further, when the gaming state with the probability variation is acquired, the jackpot symbol “333” corresponds when the count value is odd, and the jackpot symbol “777” corresponds when the count value is even.
As is known, each jackpot symbol is a symbol that is stopped and displayed after a series of symbol variations based on various display effects at the time of jackpot.

The RAM 463 stores a normal symbol selection counter in which a numerical value obtained by repeatedly adding 1 from 0 to 3 based on the clock signal output from the clock circuit 460 (returns to the minimum value 0 after the maximum value 3) is stored. 463G is provided. Here, for example, the count value “0” is the normal symbol “11”, the count value “1” is the normal symbol “17”, the count value “2” is the normal symbol “71”, and the count value “3” is the normal symbol “17”. 77 ". Each ordinary symbol is a symbol that is stopped and displayed after a series of symbol fluctuations, as is well known.

  Here, the normal symbol selection counter 463G is stored when a signal from a gate switch for detecting the passage of the pachinko ball is inputted when the pachinko ball passes through the gates 30 and 31 (see FIG. 2). The numerical value is stored in the parameter storage area 463K described later as the “normal symbol selection count value” at that time.

  The RAM 463 stores a variation pattern selection counter that stores a numerical value obtained by repeatedly adding one by one from 0 to 9 based on the clock signal output from the clock circuit 460 (the maximum value 9 then returns to the minimum value 0). 463H is provided. As is well known, each variation display pattern is a pattern for displaying a series of symbol variations based on various display effects. In the first embodiment, the display effect time is “10 seconds” as a reach losing display pattern. , “20 seconds” and “30 seconds” are set. Also, two types of jackpot display patterns of “22 seconds” and “32 seconds” are set.

In addition, the RAM 463 stores a numerical value obtained by repeatedly adding 1 from 0 to 200 based on the clock signal output from the clock circuit 460 (the maximum value 200 then returns to the minimum value 0). 463I is provided.
In addition, the RAM 463 stores a numerical value obtained by repeatedly adding 1 from 0 to 143 based on the clock signal output from the clock circuit 460 (the maximum value 143 then returns to the minimum value 0). 463J is provided.
The count values of the counters 463A, 463B, 463C, 463D, 463E, 463F, 463G, 463H, 463I, and 463J are initialized to “0” at the time of activation. Further, the first hold counter 463C is decremented by 1 every time the change symbol starts to change. Further, the second hold counter 463D is decremented by 1 every time the normal symbol starts to change.

  Furthermore, each count value of the jackpot counter 463A and the reach counter 463E when winning the starting port 39, the count value of the normal symbol counter 463B when the pachinko ball passes through each gate 30, 31, each counter 463F, A parameter storage area 463K in which count values such as 463G, 463H, 463I, and 463J are stored is provided. Here, in the parameter storage area 463K, the count values corresponding to the maximum four winning numbers counted by the first holding counter 453C and the second holding counter 463D (big hit counter 463A, normal symbol counter 463B, Reach counter 463E etc.) is stored.

  As shown in FIG. 5, the sound control board 67 includes a CPU 641, a ROM 642 that stores a drive control program for the speaker 13, a RAM 643 that stores various control signals from the main control board 69, and a main control board 69. An input / output circuit (I / O) 644 and the like for receiving various control signals sent from is provided. The CPU 641, ROM 642, RAM 643, and input / output circuit (I / O) 644 are connected to each other by a bus line. A clock circuit 640 is connected to the CPU 641 and a predetermined clock signal is input. The input / output circuit (I / O) 644 is connected to the input / output circuit (I / O) 464 of the main control board 69. The input / output circuit (I / O) 644 is connected to a speaker 13 and the like. Then, the CPU 641 performs drive control of the speaker 13 based on various control signals input from the main control board 69.

Further, the lamp control board 68 includes a CPU 651, a ROM 652 for storing drive control programs such as the electric lamps 10A, 10B, 35A, 36A, 37A, 38A, 48A, 49A, 50A, 51A, and the like, and a main control board 69. RAM 653 for storing various control signals and an input / output circuit (I / O) 654 for receiving various control signals sent from the main control board 69.
Etc. are arranged. The CPU 651, ROM 652, RAM 653, and input / output circuit (I / O) 654 are connected to each other by a bus line. A clock circuit 650 is connected to the CPU 651 and a predetermined clock signal is input. Further, an input / output circuit (I / O) 464 of the main control board 69 is connected to the input / output circuit (I / O) 654. The input / output circuit (I / O) 654 is connected to each of the illumination lamps 10A, 10B, 35A, 36A, 37A, 38A, 48A, 49A, 50A, 51A and the like. The CPU 651 performs drive control of each of the illumination lamps 10A, 10B, 35A, 36A, 37A, 38A, 48A, 49A, 50A, 51A, etc. based on various control signals input from the main control board 69.

The display control board 66 is sent from the CPU 661, the ROM 662 for storing display control programs and required display data, the RAM 663 for storing display commands, display information, input / output signals, winning rate stages, and the like, and the main control board 69. An input / output circuit (I / O) 664 that receives various control signals and a display display sent from the CPU 661, and a VDP (Video Display Processor) that processes and displays an image on a liquid crystal display (LCD) 27 ) 665 and the like are provided. The CPU 661, ROM 662, RAM 663, input / output circuit (I / O) 664, and VDP (Video
Display Processor) 665 are connected to each other by a bus line. A clock circuit 660 is connected to the CPU 661 and a predetermined clock signal is input. Then, the CPU 661 performs a predetermined effect display on the liquid crystal display 27 based on various control signals such as display pattern information input from the main control board 69.

The input / output circuit (I / O) 664 is connected to a lighting timer 73 and a light-off timer 74 that measure a predetermined time and a winning rate LED 54 that lights the winning rate display unit 53. ing. The display control CPU 661 starts time measurement by the turn-on timer 73 and the turn-off timer 74 when a signal indicating that the pachinko ball has won the start opening 39 is received from the main control board 69 as will be described later.
If the pachinko ball wins the start opening 39 within 5 seconds after the measurement is started by the lighting timer 73, the value of the winning rate stage stored in the RAM 663 is incremented by "+1". On the other hand, if the pachinko ball has not won the start opening 39 within 10 seconds after being measured by the turn-off timer 74, the value of the winning rate stage stored in the RAM 663 is set to "-1."
Here, the winning rate stage represents the winning rate to the winning port of the pachinko machine by six stages from “0” to “5”. At the stage “0”, the display control CPU 661 displays the winning ratio. The LED 54 is controlled to turn off all the winning rate display areas 53A to 53E of the winning rate display section 53. Further, in the stage “1”, the first winning rate display area 53A is turned on. In stage “2”, the first winning rate display area 53A and the second winning rate display area 53B are turned on. Further, in the stage “3”, the first win rate display area 53A to the third win rate display area 53C are turned on. Further, in stage “4”, the first winning rate display area 53A to the fourth winning rate display area 53D are turned on. Further, in the stage “5”, the first winning rate display area 53A to the fifth winning rate display area 53E are turned on.

  As shown in FIG. 7, the ROM 662 is provided with a variation pattern table storage area 662A for storing a variation pattern table 80 (see FIG. 9) used when selecting each variation display table, as will be described later. It has been.

  Further, as shown in FIG. 8, the RAM 663 is provided with a winning rate stage storage area 663A in which the winning rate step value (any one of “0” to “5”) is stored.

Then, the CPU 461 of the main control board 69 sends various control signals to the input / output circuit 464 based on input signals input via the input / output circuit 464 in accordance with parameters and control programs stored in the ROM 462 in advance. To the sound control board 67, the lamp control board 68, the display control board 66, and the like.

Next, the variation pattern table stored in the variation pattern table storage area 662A of the ROM 662 of the display control board 66 will be described with reference to FIG. FIG. 9 is a diagram illustrating an example of the variation pattern table stored in the variation pattern table storage area 662A of the ROM 662 of the display control board 66 of the pachinko machine 1 according to the first embodiment.
As shown in FIG. 9, a variation pattern table 80 used when determining a variation display table (not shown) includes a “variation pattern” indicating a variation pattern of a variation symbol instructed from the CPU 461 of the main control board 69, and this variation pattern table. It consists of a “variation display table” corresponding to the “variation pattern”.
In the “variation pattern” of the variation pattern table 80, eight types of variation patterns “pattern 1” to “pattern 8” are registered in advance.
The “variation display table” of the variation pattern table 80 corresponds to “complete loss table” corresponding to “pattern 1”, “reach A loss table” corresponding to “pattern 2”, and “pattern 3”. “Reach B Loss Table”, “Pattern 4” corresponding to “Reach C Loss Table”, “Pattern 5” corresponding to “Reach A Probability Per Change Table”, “Pattern 6” corresponding to “Reach "Reach B normal per table" corresponding to "B probability variation per table" and "Pattern 7", and "Reach B normal per table" corresponding to "Pattern 8" are registered in advance.
In the “complete lose table” (not shown), the display effect time is set to three types of display effect times of “10 seconds”, “20 seconds”, and “30 seconds” as a variation pattern of complete loss. ing. In addition, in the “reach A lose table” (not shown), a display pattern having a display effect time of “20 seconds” is set as a display pattern for reach lose as a variation pattern. In addition, in the “reach B loss table” (not shown), a display pattern having a display effect time of “30 seconds” is set as a display pattern of reach loss as a variation pattern. In addition, in the “reach C lose table” (not shown), a display pattern having a display effect time of “10 seconds” is set as a reach loss display pattern as a variation pattern. Further, in the “reach A probability variation hit table” and “reach A normal hit table” (not shown), a variation effect pattern having a display effect time of “22 seconds” is set as a jackpot display pattern. Further, in the “reach B probability variation table” and “reach B normal variation table” (not shown), a variation effect pattern having a display effect time of “32 seconds” is set as a jackpot display pattern.

  In addition, as described above, the movement of the symbols displayed on the liquid crystal display 27 of the symbol display device 25 is started when a pachinko ball is won at the start port 39 as a trigger. When the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and when a pachinko ball wins at the starting port 39, the count value of the big hit counter 463A etc. acquired at the time of winning is stored and held. In addition, immediately after the changing symbol is stopped, or when the changing symbol is stopped in a predetermined combination (hit symbol), immediately after the “hit game state” is finished, the memory / holding is performed. Based on the count value of the big hit counter 463A and the like, the operation of changing / stopping the symbols displayed on the liquid crystal display 27 of the symbol display device 25 is started. Here, it is possible to hold up to four sets of count values to be stored and held.

  This point will be described in detail. In the pachinko machine 1 according to the first embodiment, as shown in FIG. 10 (a), the count value of the big hit counter 463A or the like acquired immediately after the pachinko ball wins the start opening 39 is obtained. In addition, five storage areas E0, E1, E2, E3, and E4 that can be stored / suspended up to five sets are secured in the parameter storage area 463K. Of these, four storage areas E1, E2, E3, and E4 are: As described above, the four first hold LEDs 40 corresponding to each are provided in the symbol display device 25 (see FIG. 2). Then, when the pachinko ball wins at the start port 39, as shown in FIG. 10B, the count value D0 acquired at the time of winning is stored in the storage area E0 and the count value D0 stored in the storage area E0. Based on the above, the operation of changing / stopping the symbols displayed on the liquid crystal display 27 of the symbol display device 25 is started.

  Thereafter, when the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and when a pachinko ball wins a prize at the starting port 39, as shown in FIG. While storing / holding the value D1 in the storage area E1, one first hold LED 40 corresponding to the storage area E1 is turned on. In FIG. 10, the black color of the first hold LED 40 indicates lighting, and the white color indicates non-lighting. After that, when the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and a pachinko ball wins at the start port 39, as shown in FIG. The stored count value D2 is stored and held in the storage area E2, and one first hold LED 40 corresponding to the storage area E2 is turned on.

  After that, when the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and a pachinko ball wins at the start port 39, as shown in FIG. The counted value D3 is stored / held in the storage area E3, and one first hold LED 40 corresponding to the storage area E3 is turned on. After that, when the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and a pachinko ball wins at the start port 39, as shown in FIG. The stored count value D4 is stored / held in the storage area E4, and one first hold LED 40 corresponding to the storage area E4 is turned on.

  After that, even if the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is fluctuating, and even if a pachinko ball wins at the starting port 39, the five storage areas E0, E1, E2, E3, Since the count values D0, D1, D2, D3, D4 are stored in each of E4 and there is no area for storing / holding the count value to be acquired at the time of winning, it is possible to acquire the count value at the time of winning Not performed.

  On the other hand, as shown in FIG. 10F, in the state where the count values D0, D1, D2, D3, D4 are stored in the five storage areas E0, E1, E2, E3, E4, respectively, the storage area E0. When the operation of changing / stopping the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is completed based on the count value D0 stored in the storage area, as shown in FIG. E0 is emptied, the count value D1 stored in the storage area E1 is overwritten in the storage area E0, the count value D2 stored in the storage area E2 is overwritten in the storage area E1, and stored in the storage area E3 The count value D3 is overwritten in the storage area E2, the count value D4 stored in the storage area E4 is overwritten in the storage area E3, the storage area E4 is emptied, and one first hold LED corresponding to the storage area E4 0 to turn off the. In FIG. 11, the black color of the first hold LED 40 indicates lighting and the white color indicates extinguishing. As a result, as shown in FIG. 11B, based on the count value D1 stored in the storage area E0, the operation of changing / stopping the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is performed. Be started. At this time, since the storage area E4 is empty, if a pachinko ball wins at the start port 39, it is possible to store / hold the count value acquired at the time of winning in the storage area E4.

Further, as shown in FIG. 11B, the count values D1, D2, D3, D4 are stored in the storage area E0 in the state where the count values D1, D2, D3, D4 are stored in the four storage areas E0, E1, E2, E3, respectively. When the operation of changing / stopping the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is completed based on the count value D1, the storage area E0 is emptied and 1 stored in the storage area E1. The set count value D2 is overwritten in the storage area E0, the set count value D3 stored in the storage area E2 is overwritten in the storage area E1, and the count value D4 stored in the storage area E3 is overwritten in the storage area E2. Then, the storage area E3 is emptied, and one first hold LED 40 corresponding to the storage area E3 is turned off. As a result, as shown in (c) of FIG. 11, based on the count value D <b> 2 stored in the storage area E <b> 0, the symbol change / stop operation displayed on the liquid crystal display 27 of the symbol display device 25 is performed. Be started. At this time, since the storage areas E3 and E4 are empty, if a pachinko ball wins at the start port 39, the count value acquired at the time of winning can be stored and held in the storage area E3. If a pachinko ball wins in the mouth 39, the count value acquired at the time of winning can be stored and held in the storage area E4.

  Further, as shown in FIG. 11C, in the state where the count values D2, D3, D4 are stored in the three storage areas E0, E1, E2, respectively, the count value D2 stored in the storage area E0 is set. Based on this, when the operation of changing / stopping the symbols displayed on the liquid crystal display 27 of the symbol display device 25 is completed, the storage area E0 is emptied and the count value D3 stored in the storage area E1 is stored. The area E0 is overwritten, the count value D4 stored in the storage area E2 is overwritten in the storage area E1, the storage area E2 is emptied, and one holding lamp 71 corresponding to the storage area E2 is turned off. As a result, as shown in FIG. 11D, based on the count value D3 stored in the storage area E0, the operation of changing / stopping the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is performed. Be started. At this time, since the storage areas E2, E3, E4 are empty, if a pachinko ball wins at the start port 39, it is possible to store / hold the count value acquired at the time of winning in the storage area E2, If the pachinko ball wins at the start opening 39, it is possible to store / hold the count value acquired at the time of winning in the storage area E3. Furthermore, if the pachinko ball wins at the start opening 39, It is also possible to store / hold the acquired count value in the storage area E4.

  Further, as shown in FIG. 11 (d), in the state where the count values D3 and D4 are stored in the two storage areas E0 and E1, respectively, the design is based on the count value D3 stored in the storage area E0. When the operation of changing or stopping the symbol displayed on the liquid crystal display 27 of the display device 25 is completed, the storage area E0 is emptied and the count value D4 stored in the storage area E1 is overwritten on the storage area E0. Then, the storage area E1 is emptied, and one first hold LED 40 corresponding to the storage area E1 is turned off. As a result, as shown in FIG. 11E, based on the count value D4 stored in the storage area E0, the operation of changing / stopping the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is performed. Be started. At this time, since the storage areas E1, E2, E3, and E4 are empty, if a pachinko ball wins at the start port 39, it is possible to store / hold the count value acquired at the time of winning in the storage area E1. Furthermore, if a pachinko ball wins at the start opening 39, it is possible to store / hold the count value acquired at the time of winning in the storage area E2, and if the pachinko ball wins at the start opening 39, The count value acquired at the time of winning can be stored / suspended in the storage area E3, and if the pachinko ball wins at the start port 39, the count value acquired at the time of winning is stored / held in the storage area E4. It is also possible.

  Of course, in the case shown in FIG. 11, when the operation of changing / stopping the symbols displayed on the liquid crystal display 27 of the symbol display device 25 is finished, the symbol display device 25 is stopped in the case of stopping with a combination of jackpot symbols. The change / stop operation of the symbol displayed on the liquid crystal display 27 is not when the change / stop operation of the symbol displayed on the liquid crystal display 27 of the symbol display device 25 is completed, but for the predetermined combination. Immediately after the “big hit gaming state” is completed, the game is started based on the count values D1, D2, D3, D4 and the like newly stored in the storage area E0.

Next, a control process of the pachinko machine 1 according to the first embodiment configured as described above will be described with reference to FIGS.
First, interrupt control processing executed by the CPU 461 of the main control board 69 according to the first embodiment will be described with reference to FIGS. 12 to 15 are flowcharts of interrupt control processing executed by the CPU 461 of the main control board 69.
Here, in the pachinko machine 1 according to the first embodiment, the main flowchart with sub-processes of the flowcharts shown in FIGS. Is stored in the ROM 462 (see FIG. 35). The CPU 461 of the main control board 69 is configured to execute a main flowchart having sub-processes such as the flowcharts shown in FIGS. 12 to 15 at regular time intervals (for example, every 4 msec) after the power is turned on. .
An interrupt control process executed by the CPU 461 according to a main flowchart stored in the ROM 462 of the main control board 69 will be described.
First, the CPU 461 of the main control board 69 executes a sub-process (see FIG. 12) of a start opening winning process described later. The CPU 461 executes the sub process of the result notification process (see FIGS. 13 and 14), and then executes the sub process of the jackpot game process (see FIG. 15). Execute the sub-process of the winning ball payout process for paying the player the winning ball for each winning ball to the lower winning holes 50 and 51, the start opening 39 and the big winning opening 46, and finish the process. To do.

  Next, the start winning process of the interruption program executed by the main control CPU 461 according to the first embodiment will be described based on the flowchart of FIG. Each program shown in the flowchart of FIG. 12 is stored in a ROM 462 and a RAM 463 provided in the main control board 69 and is executed by the main control CPU 461.

  As shown in FIG. 12, first, in step (hereinafter referred to as “S”) 1, it is determined whether or not a pachinko ball has won a winning opening 39. This determination is made based on whether or not the start port switch provided at the start port 39 has detected a pachinko ball. Here, when it is determined that no pachinko ball has been won at the start port 39 (S1: NO), the start winning process is terminated, while when it is determined that a pachinko ball has been won at the start port 39 (S1: If yes, go to S2.

In S2, it is determined whether or not the upper limit of storage, that is, whether or not the storage area E4 (see FIGS. 10 and 11) is empty. If it is determined that the storage area E4 is not empty (S2: YES), the start winning process is terminated.
If it is determined that the storage area E4 (see FIGS. 10 and 11) is empty (S2: NO), the process proceeds to S3. In S3, the count value of each counter such as the current big hit counter 463A is acquired, and as shown in any one of (a) to (f) of FIG. 10, five storage areas E0, E1, E2 , E3, and E4, the count value is stored, and the process proceeds to S4.
Note that when the count values are stored in the storage areas E0, E1, E2, E3, E4 in S3, they are preferentially stored in the order of E0 → E1 → E2 → E3 → E4. In other words, if it is not stored in any of the storage areas E0 to E4, the count value is stored in E0. Further, when not stored in the storage areas E1 to E4, the count value is stored in E1. Further, when not stored in the storage areas E2 to E4, the count value is stored in E2. In addition, when it is not stored in the storage area of E3 and E4, the count value is stored in E3.

  Specifically, in the “count value acquisition process”, the main control CPU 461 uses the numerical value stored in the big hit counter 463A when the pachinko ball detection signal is input from the start port switch 39B as the “big hit count value” at that time. Is substituted into the algebra V and stored in the storage areas E0, E1, E2, E3, E4 of the parameter storage area 463K.

  At the same time, the main control CPU 461 substitutes the numerical value stored in the reach counter 463E when the winning signal is input from the start port switch into the algebra M as the “reach count value” at that time, and stores it in the parameter storage area. Store in the 463K storage areas E0, E1, E2, E3, E4.

  At the same time, the main control CPU 461 substitutes the numerical value stored in the jackpot symbol selection counter 463F when the winning signal is input from the start port switch into the algebra Y as the “hit symbol selection count value” at that time. And stored in the storage areas E0, E1, E2, E3, E4 of the parameter storage area 463K.

  At the same time, the main control CPU 461 substitutes the numerical value stored in the variation pattern selection counter 463H when the winning signal is input from the start port switch into the algebra H as the “variation pattern selection count value” at that time. And stored in the storage areas E0, E1, E2, E3, E4 of the parameter storage area 463K.

  At the same time, the main control CPU 461 assigns the numerical value stored in the lost symbol selection counter 463I when the winning signal is input from the start port switch to the algebra I as the “lost symbol selection count value” at that time. And stored in the storage areas E0, E1, E2, E3, E4 of the parameter storage area 463K.

At the same time, the main control CPU 461 substitutes the numerical value stored in the reach symbol selection counter 463J when the winning signal is input from the start port switch into the algebra F as the “reach symbol selection count value” at that time. And stored in the storage areas E0, E1, E2, E3, E4 of the parameter storage area 463K.
Regardless of the player's gain such as lose symbol selection count value, reach symbol selection count value, etc., the timing of obtaining the counter value of the counter used for selection of effects etc. is input from the start switch as a winning signal. It is not limited to the time.

  In S4, it is determined whether or not there is storage, that is, whether or not the count value is stored in the storage area E0 (see FIGS. 10 and 11). Here, as shown in FIG. 10A, when it is determined that one set of count values is not stored in the storage area E0 (S4: NO), the start winning process is terminated. On the other hand, as shown in FIGS. 10B to 10E, when it is determined that the count value is stored in the storage area E0 (S4: YES), the process proceeds to S5.

  In S5, as shown in (c) to (f) of FIG. 10, when the count value is stored in the storage area E1, one first hold LED 40 corresponding to the storage area E1 is turned on, or When the count value is stored in the storage area E2, one first hold LED 40 corresponding to the storage area E2 is turned on, and when the count value is stored in the storage area E3, one count corresponding to the storage area E3 is stored. When the count value is stored in the storage area E4 after the first hold LED 40 is turned on, the process ends after turning on the first hold LED 40 corresponding to the storage area E4.

Next, an interrupt program result notification process executed by the main control CPU 461 according to the first embodiment will be described with reference to the flowchart of FIG.
As shown in FIG. 13, the main control CPU 561 first determines whether or not the three symbols displayed on the liquid crystal display 27 of the symbol display device 25 are changing in S6. Here, when it is determined that the three symbols displayed on the liquid crystal display 27 of the symbol display device 25 are changing (S6: YES), the main control CPU 461 sets the display control PU 661 in S7. The fluctuation display processing time of the outputted fluctuation pattern is read from the ROM 462 and waits until a predetermined time elapses (S7: NO). For example, when the symbol variation pattern is “pattern 2”, the process waits for 20 seconds. When the variation pattern is “pattern 3”, the process waits for 30 seconds. When the variation pattern is “pattern 4”, the process waits for 10 seconds. When the variation pattern is “pattern 5” or “pattern 7”, the process waits for 22 seconds. When the variation pattern is “pattern 6” or “pattern 8”, the process waits for 32 seconds. Further, when the variation pattern is “pattern 1”, each processing time stored in advance in the ROM 462 corresponding to the lost symbol is awaited.

  When the processing time of the symbol variation display process has elapsed (S7: YES), in S8, the main control CPU 461 causes the display control CPU 661 to stop variation, that is, to confirm and stop. The determined stop signal to be commanded is output to the display control CPU 661. Further, in S8, the memory for the five storage areas E0, E1, E2, E3, and E4 provided in the parameter storage area 463K is rewritten. For example, at this time, as shown in FIG. 10 (f), when the count value is stored in each of the five storage areas E0, E1, E2, E3, E4, (a) in FIG. After that, as shown in FIG. 11 (b), the memory is rewritten for the five storage areas E0, E1, E2, E3, and E4. At this time, as shown in FIG. 11B, when a set of counter values is stored in each of the four storage areas E0, E1, E2, and E3, the storage area E0 is emptied. Then, as shown in (c) of FIG. 11, the rewriting of the storage for the five storage areas E0, E1, E2, E3, and E4 is performed.

  At this time, as shown in FIG. 11C, when the count value is stored in each of the three storage areas E0, E1, and E2, the storage area E0 is emptied, and then FIG. As shown in (d) of FIG. 5, rewriting of storage is performed for the five storage areas E0, E1, E2, E3, and E4. At this time, as shown in FIG. 11D, when the count value is stored in each of the two storage areas E0 and E1, the storage area E0 is emptied, As shown in e), the rewriting of the memory for the five storage areas E0, E1, E2, E3, E4 is performed. At this time, if the count value is stored in one storage area E0 as shown in FIG. 11E, the storage area E0 is emptied and then shown in FIG. As described above, the rewrite of the memory for the five storage areas E0, E1, E2, E3, and E4 is performed.

  In S6, when it is determined that the three symbols displayed on the liquid crystal display 27 of the symbol display device 25 are not changing (S6: NO), the process proceeds to S9, that is, whether or not there is a memory. Then, it is determined whether or not the count value is stored in the storage area E0 (see FIGS. 10 and 11). Here, as shown to (a) of FIG. 10, when it is judged that the count value is not memorize | stored in the storage area E0 (S9: NO), a result alerting | reporting process is complete | finished. If it is determined that one set of count values is stored in the storage area E0 (S9: YES), the process proceeds to S10.

  In S10, the stored count value of each counter is read from the storage area E0 provided in the parameter storage area 463K. Then, based on the read count value, the following determination process such as jackpot is performed.

In S <b> 11, the main control CPU 461 executes a determination process for determining whether or not the “time reduction / probability change mode” is set.
In the processing for determining whether or not the mode is the “time reduction / probability change mode”, first, the main control CPU 461 performs the time reduction / probability change algebra L (described later when the power is turned on) stored in the five storage areas of the parameter storage area 463K. Read “0” into the probability variable algebra L). When the time / accuracy variable algebra L is “0”, it is determined that the mode is not “time / accuracy variation mode”, and the “normal jackpot value” stored in the ROM 462 in advance (in the first embodiment, “ 7 ”), and this“ normal jackpot value ”is stored in the parameter storage area 463K as“ hit value ”. Further, when the time / accuracy variable algebra L read from the parameter storage area 463K is “1”, it is determined that the mode is “time / accuracy variation mode”, and the “probability large hit value” stored in the ROM 462 in advance (implementation) In the case of Example 1, “1”, “3”, “5”, and “7” are read out), and this “probable variation jackpot value” is stored as “big jackpot value” in the parameter storage area 463K.

Next, in S <b> 12, the CPU 461 executes a determination process for determining whether or not it is a “big hit”.
In the determination process of whether or not this is a “big hit”, first, the algebra V as the “big hit count value” is read from the parameter storage area 463K. Then, it is determined whether or not the algebra V matches the “big value” stored in the parameter storage area 463K. If they match, the jackpot algebra R (“0” is substituted for the jackpot algebra R when the power is turned on) is stored in the parameter storage area 463K by substituting “1”. Then, “0” is substituted into the jackpot algebra R and stored in the parameter storage area 463K.
Therefore, in the case of a normal gaming state that is not in the “time reduction / probability change mode”, the occurrence probability of “big hit” is 1/360. Further, in the case of the gaming state of “time reduction / probability change mode”, the occurrence probability of “big hit” is 4/360.
In the case of a normal gaming state that is not in the “time reduction / probability change mode”, the change time of the fluctuation symbol is about 10 to 30 seconds, but in the case of the game state in the “time reduction / probability change mode”, it changes. The change time of the symbol is about 5 to 7 seconds, and it stops earlier than the normal gaming state.

Then, the jackpot algebra R is read again from the parameter storage area 463K, and it is determined whether the jackpot algebra R is “0” or “1”. That is, it is determined whether or not “big hit” has occurred.
When the jackpot algebra R is “1”, it is determined that a “jackpot” has occurred (S12: YES), and in S13, the main control CPU 461 performs a sub-process (see FIG. 14).

Next, in S <b> 14, the main control CPU 461 executes a determination process for determining whether or not the time-saving / probability changing mode is set. That is, a short-time / probable variable algebra L, which will be described later, stored in the storage area of the parameter storage area 463K is read, and it is determined whether this short-time / probable variable algebra L is “0” or “1”.
If the time / probability variable algebra L is “1”, it is determined that the time / probability mode is “time / probability variation mode” (S14: YES). In S15, the main control CPU 461 selects the probability variation large winning symbol. Execute. In the selection of the probabilistic jackpot symbol, the algebra Y as the jackpot symbol selection count value is read from the parameter storage area 463K, and when the algebra Y is an even number, the jackpot symbol “777” is designated as the jackpot symbol instructed to the display control board 66. When the symbol is stored in the parameter storage area 463K, on the other hand, when the algebra Y is an odd number, the jackpot symbol of “333” is stored in the parameter storage area 463K as the jackpot symbol instructed to the CPU 661 of the display control board 66.
In S16, the main control CPU 461 selects a variation pattern instructed to the display control CPU 661. That is, the algebra H as the variation pattern selection count value is read from the parameter storage area 463K, and when the algebra H is an even number, “pattern 5” is stored in the parameter storage area 463K as the variation pattern instructed to the display control CPU 661. On the other hand, when the algebra H is an odd number, “pattern 6” is stored in the parameter storage area 463K as a variation pattern instructed to the CPU 661 of the display control board 66.

In S14, when the time-short / probable variation algebra L read from the storage area of the parameter storage area 463K is “0”, it is determined that the time-short / probable variation mode is not in effect (S14: NO). A process of selecting a symbol is executed. In the selection of the normal jackpot symbol, the algebra Y as the jackpot symbol selection count value is read from the storage area of the parameter storage area 463K, and the jackpot symbol corresponding to the algebra Y is selected. For example, when the algebra Y is “0”, it is “111”, when it is “1”, “222”, when it is “2”, “444”, when it is “3”, “444”, “ 4 ”is“ 555 ”,“ 5 ”is“ 666 ”,“ 6 ”is“ 666 ”,“ 7 ”is“ 888 ”, and“ 8 ”. Each symbol of “999” is selected and stored in the parameter storage area 463K as a jackpot symbol to be instructed to the display control CPU 661.
In S18, the main control CPU 461 selects a variation pattern instructed to the display control CPU 661. That is, the algebra H as the variation pattern selection count value is read from the parameter storage area 463K, and when this algebra H is an even number, the “pattern 7” as the variation pattern instructed to the CPU 661 of the display control board 66 is stored in the parameter storage area 463K. On the other hand, if the algebra H is an odd number, “pattern 8” is stored in the parameter storage area 463K as a variation pattern instructed to the display control CPU 661.

On the other hand, when the read jackpot algebra R is “0” in S12, it is determined as a loss (S12: NO), and in S19, the main control CPU 461 displays the variation symbol at this time as a variation symbol. Reach state in which two of the three symbols are aligned (for example, “5, -5”, “7,-, 7”, etc., where “-” means that the symbol is rotating) It is determined whether or not to display a loss after displaying.
In this determination, the reach count value stored in the parameter storage area 463K is read, and any of the reach occurrence numerical values stored in advance in the RAM 463 (in the case of the first embodiment, “0” to “27”). If they match, it is determined to display a loss after the reach state (S19: YES). In S20, a lose reach symbol is selected. The selection of the lose reach symbol is performed by reading the algebra F as the reach symbol selection count value from the parameter storage area 463K, reading the reach lose symbol corresponding to the algebra F from the RAM 463, and storing the parameter as a reach lose symbol for instructing the display control CPU 661. Store in area 463K.
Subsequently, in S21, the main control CPU 461 selects a variation pattern instructed to the display control CPU 661. That is, the algebra H as the variation pattern selection count value is read from the parameter storage area 463K, and when the algebra H is “0 to 2”, “pattern 2” is used as the variation pattern instructed to the display control CPU 661. Store in 463K. When the algebra H is “3 to 6”, “pattern 3” is stored in the parameter storage area 463K as a variation pattern instructed to the display control CPU 661. Further, when the algebra H is “7 to 9”, “pattern 4” is stored in the parameter storage area 463K as a variation pattern instructed to the display control CPU 661.

  On the other hand, in S19, the reach count value stored in the parameter storage area 463K is read, and the reach occurrence numerical value stored in advance in the RAM 463 (in the first embodiment, “0” to “27”). If it is determined that they do not match (S19: NO), in S22, the lost symbol selection count value I is read from the parameter storage area 463K, and the symbol data of the lost symbol corresponding to the algebra I is read from the RAM 463. It is stored in the parameter storage area 463K as symbol data to be instructed to the display control CPU 661. Further, the main control CPU 461 stores “pattern 1” in the parameter storage area 463K as a variation pattern instructed to the display control CPU 661.

Next, in S23, the main control CPU 461 again reads the symbol data and variation pattern instructed to the display control CPU 661 from the parameter storage area 463K, and instructs the display control CPU 661.
Subsequently, in S24, the main control CPU 461 starts counting the variation display processing time of the variation pattern output to the display control PU 661, and ends the processing.

  Next, the sub-process (S13) of the “probability change acquisition process” will be described with reference to FIG. FIG. 14 is a flowchart of a probability variation acquisition process executed by the main control CPU of the pachinko machine according to the first embodiment. 14 are stored in the ROM 462 and the RAM 463 provided in the main control board 69 and executed by the main control CPU 461.

  As shown in FIG. 14, first, in S26, the main control CPU 461 executes processing for determining whether or not the current gaming state is the normal gaming state. That is, the time-short / probable variable algebra L is read from the storage area E0 of the parameter storage area 463K, and a process of determining whether the time-short / probable variable algebra L is “0” or “1” is executed.

  The main control CPU 461 determines that the current gaming state is not the “normal gaming state” if the time-short / probable variation algebra L read from the storage area E0 of the parameter storage area 463K in S21 is “1” ( (S26: NO), in S27, "0" is substituted into the short-time / probable variable algebra L, and it is stored again in the parameter storage area 463K, and the sub-process is terminated.

On the other hand, when the time-short / probable variation algebra L read from the parameter storage area 463K in S26 is “0”, the main control CPU 461 determines that the current gaming state is the “normal gaming state” (S26: YES). ) In S28, a determination process for determining whether or not the “short time / probability change mode” has been acquired is executed.
In the process of determining whether or not the “short time / probability change mode” has been acquired, first, the main control CPU 461 reads the algebra Y as the “big hit symbol selection count value” from the storage area of the parameter storage area 463K. Next, the main control CPU 461 determines whether or not the read algebra Y matches any of the numerical data “1”, “3”, “5”, and “7”.
When the read algebra Y matches any of the numerical data “1”, “3”, “5”, and “7”, the main control CPU 461 acquires the “short-time / probability change mode”. If the algebra Y does not match any of the numerical data “1”, “3”, “5”, and “7”, it is determined that the “time reduction / probability variation mode” has not been acquired. Therefore, in this case, the probability that the “short time / probability mode” can be acquired is 4/9.
As a result, when the jackpot symbol that is finally stopped and displayed by the variable display is “222”, “444”, “666”, “888”, “999”, the “short-time / accurate change mode” does not occur. . On the other hand, in the case of the “normal game state”, when the jackpot symbol that is finally stopped and displayed by the variable display is “111”, “333”, “555”, “777”, the “time reduction / probability change mode” Will occur.

If the “short-time / probability change mode” is not acquired in S28 (S28: NO), “0” is substituted for the short-time / probability variable algebra L read from the parameter storage area 27L in S27, and the parameter is again set. The data is stored in the storage area 27L, and the sub-process is terminated.
On the other hand, when the “short-time / accuracy change mode” is acquired in S28 (S28: YES), the main control CPU 461 performs “setting of the short-time / accuracy change mode” in S29. That is, “1” is substituted into the time-short / probable variable algebra L read from the parameter storage area 463K, and is stored again in the parameter storage area 463K. Then, the sub-process is terminated, and the process returns to the “start opening prize process”.

Next, the jackpot game process executed by the main control CPU 461 according to the first embodiment will be described with reference to FIG. FIG. 15 is a flowchart of the jackpot game process executed by the main control CPU of the pachinko machine according to the first embodiment. Each program shown in the flowchart in FIG. 15 is stored in a ROM 462 or a RAM 463 provided in the main control board 69 and is executed by the main control CPU 461.
As shown in FIG. 15, first, in S <b> 31, the main control CPU 461 executes a determination process for determining whether or not “big hit” has occurred. This determination process reads the jackpot algebra R from the parameter storage area 463K, and determines whether the jackpot algebra R is “0” or “1”. That is, it is determined whether or not “big hit” has occurred. If the jackpot algebra R is “0”, it is determined that no “jackpot” has occurred (S31: NO), and the jackpot game process is terminated.

  On the other hand, if the jackpot algebra R read from the parameter storage area 463K is “1”, it is determined that a jackpot has occurred (S31: YES), and the main control CPU 461 closes the winning prize port 46 in S32. The opening / closing door 45 is opened.

Subsequently, in S33, whether or not 10 winning balls have been won in the grand prize opening 46, that is, whether or not the number of prizes detected by a large winning hole count switch (not shown) has reached ten. Determine.
If the number of winning balls that have won in the big winning opening 46 has not reached ten (S33: NO), in S34, after the big winning opening 46 is opened, a predetermined time (in the case of the first embodiment, about It is 25 seconds.) It is determined whether or not it has elapsed. And when predetermined time has not passed since the special winning opening 46 was opened (S34: NO), the process after S33 is performed again.

  On the other hand, when the number of winning balls that have won the big winning opening 46 has reached 10 (S33: YES), or when a predetermined time has passed since the opening of the big winning opening 46 (S34: YES), in S35, The main control CPU 461 closes the open / close door 45 and closes the special winning opening 46.

Subsequently, in S36, the main control CPU 461 determines whether or not a prize has been won in the V zone provided in the big prize opening 46 during the opening of the big prize opening 46, that is, a V (not shown) during the opening of the big prize opening 46. A determination process for determining whether or not a winning ball detection signal is input from the switch is executed.
If a winning detection signal is input from the V switch while the special winning opening 46 is opened (S36: YES), the number of times the main control CPU 461 has continuously opened the special winning opening 46 in S37. Is executed to determine whether or not has reached a predetermined maximum number of continuations (in the first embodiment, it is “16 times”). If the number of times that the special winning opening 46 is opened does not reach the predetermined maximum number of continuous times (S37: NO), the special winning opening 46 is closed for a predetermined time (in the first embodiment, about 2 seconds). After the elapse of time, the processes after S32 are executed again.

  In addition, when the winning detection signal is not input from the V switch while the special winning opening 46 is opened (S36: NO), or when the number of times that the special winning opening 46 is opened reaches a predetermined maximum number of times. (S37: YES), the big hit game process is terminated.

  Next, a symbol variation control process for displaying “hit symbol” and the like executed by the display control CPU 661 of the display control board 66 configured as described above will be described with reference to FIG. FIG. 16 is a flowchart of the symbol variation control process executed by the display control CPU of the pachinko machine according to the first embodiment. Here, the interrupt control process of FIG. 16 operates every certain time (for example, every 4 msec) after the power is turned on. Each program shown in the flowchart of FIG. 16 is stored in a ROM 662 or a RAM 663 included in the display control board 66 and executed by the display control CPU 661.

As shown in FIG. 16, first, in S <b> 41, the display control CPU 661 executes a determination process for determining whether or not a symbol variation start command is input from the main control CPU 461.
When the symbol variation start command is not input from the main control CPU 461 (S41: NO), the display control CPU 661 ends the process.

On the other hand, when the symbol variation start command is input from the main control CPU 461 (S41: YES), the display control CPU 661 stores the symbol variation start command signal in the RAM 663 in S42.
In S43, the CPU 661 for display control reads the instructed “variation pattern” from the RAM 663, and the “variation pattern” corresponding to the “variation pattern” is stored in the variation pattern table storage area 662A of the ROM 662. Read “variable display table”.
For example, when the “variation pattern” is “pattern 1”, the complete loss table is read. If the “variation pattern” is “pattern 2”, the reach A loss table is read. If the “variation pattern” is “pattern 3”, the reach B loss table is read. If the “variation pattern” is “pattern 4”, the reach C loss table is read. When the “variation pattern” is “pattern 5”, the reach A probability variation hit table is read. If the “variation pattern” is “pattern 6”, the reach B probability variation table is read. When the “variation pattern” is “pattern 7”, the reach per normal A table is read. When the “variation pattern” is “pattern 8”, the reach B normal hit table is read.

Subsequently, in S44, the display control CPU 661 starts variable display of three columns of variable symbols based on each data read from the variable display table.

Thereafter, in S45, the three rows of changing symbols are temporarily stopped (the three rows of changing symbols are swung up and down). In S46, the CPU 661 waits for an input of a fixed stop signal (S46: NO).
As a result, when a fixed stop signal is input (S46: YES), the variable symbol is fixedly stopped and displayed in S47, and the symbol variation control process is terminated.

  Next, a winning rate display control process for displaying the winning rate to the starting port 39 executed by the display control CPU 661 of the display control board 66 will be described with reference to FIG. FIG. 17 is a flowchart of a winning rate display control process executed by the display control CPU of the pachinko machine according to the first embodiment. Here, the interrupt control process of FIG. 17 operates at regular intervals (for example, every 4 msec) after the power is turned on. Each program shown in the flowchart in FIG. 17 is stored in a ROM 662 or a RAM 663 provided in the display control board 66 and executed by the display control CPU 661.

As shown in FIG. 17, first, in S51, the display control CPU 661 determines whether or not a start port winning instruction transmitted when winning from the main control CPU 461 to the start port 39 is input. Execute.
The display control CPU 661 ends the process when the start opening prize command is not input from the main control CPU 461 (S51: NO).

  On the other hand, when the start port winning command is input from the main control CPU 461 (S51: YES), the display control CPU 661 receives the winning rate step stored in the winning rate step storage area 663A of the RAM 663 in S52. Is updated from the initial value “0” to “1”, and the winning rate LED 54 is lit only in the first winning rate display area 53A as shown in FIG.

In S53, the lighting timer 73 and the extinguishing timer 74 are set to initial values “0 seconds”, and measurement is started.
Subsequently, in S54, the display control CPU 661 determines whether or not a start opening prize command transmitted when winning the start opening 39 from the main control CPU 461 is input.

  Then, when the start opening winning command is input from the main control CPU 461 (S54: YES), the display control CPU 661 further reads the current value of the lighting timer 73 in S55, and the value is “5 seconds. Is determined.

  As a result, when the current value of the lighting timer 73 is within “5 seconds” (S55: YES), it is subsequently determined whether or not the winning rate LED 54 is lit up to the upper limit of 5 levels. (S56). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the value of the winning rate step stored in the winning rate step storage area 663A of the RAM 663 is “5”, the upper limit is five steps (the first winning rate display area 53A to the fifth winning rate display area). 53E is turned on (see FIG. 19).

When the winning rate LED 54 is not lit up to the upper limit of 5 levels (S56: NO), that is, the winning rate level values stored in the winning rate level storage area 663A of the RAM 663 are “0” to “4”. In some cases, the value of the winning rate stage stored in the RAM 663 is incremented by “+1”, and the winning rate LED increases the display areas 53A to 53E that are turned on by one (S57). still. When increasing the display area to be lit, the winning rate display unit 53 is in order from the bottom (first winning rate display region 53A, second winning rate display region 53B, third winning rate display region 53C, fourth winning rate display region 53D). , In the order of the fifth winning percentage display area 53E) (see arrow 87 in FIG. 20).
After that, in S58, the lighting timer 73 and the extinguishing timer 74 are set to the initial value “0 second”, the measurement is started from “0 second”, and the process ends.

  On the other hand, when the winning rate LED 54 is lit up to the upper limit of 5 levels (S56: YES), since the lighting area cannot be increased any more, the lighting timer 73 and the extinguishing timer 74 are initially set in S58 in that state. The value is set to “0 second”, the measurement is restarted from “0 second”, and the process is terminated.

  If the value of the lighting timer 73 read when the start opening winning command is input from the main control CPU 461 is higher than “5 seconds” (S55: NO), the lighting timer 73 in that state in that state is S59. And the extinguishing timer 74 are set to the initial value “0 second”, the measurement is started again from “0 second”, and the process is terminated.

  On the other hand, when the start opening winning command is not input from the main control CPU 461 (S54: NO), subsequently, the number of winnings counted in the first holding counter 463C in S60 is the upper limit “4”. It is determined whether or not. As described above, when the pachinko ball wins the start opening 39 while the special symbol is changing, the first holding counter of the RAM 463 provided on the main control board 69 (see FIG. 5) to be described later up to 4 is provided. It is stored in 463C and held as the number of change confirmations. In addition, two first hold LEDs 40 for displaying the count value stored in the first hold counter 463C are arranged on each of the left and right sides of the liquid crystal display 27 (see FIG. 2).

  When the hold number is “4” which is the upper limit (S60: YES), the extinguishing timer 74 is set to the initial value “0 sec” and the extinguishing timer 74 is measured again from “0 sec”. Start (S61). On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

  If the number of holdings is not the upper limit of “4” (S60: NO), that is, if the count value stored in the first holding counter 463C is “0” to “3”, continue. The display control CPU reads the value of the extinguishing timer 74, and determines whether or not the read value of the extinguishing timer 74 is "10 seconds" or less (S62).

As a result, if the current value of the turn-off timer 74 is higher than “10 seconds” (S62: NO), is the winning rate LED 54 subsequently turned on in at least one winning rate display area 53A to 53E? It is determined whether or not (S63). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the winning rate step value stored in the winning rate step storage area 663A of the RAM 663 is “0”, all winning rate display areas (first winning rate display area 53A to fifth winning rate display) are displayed. The region 53E) is turned off.
In addition, when the current value of the turn-off timer 74 is “10 seconds” or less (S62: YES), the processing ends.

When the winning rate LED 54 is lit in at least one winning rate display area (S63: YES), that is, the winning rate step values stored in the winning rate step storage area 663A of the RAM 663 are “1” to “5”. In the case of "", the value of the winning rate step stored in the RAM 663 is set to "-1", and the winning rate LED decreases the display areas 53A to 53E that are turned on by one (S64). In order to reduce the display area to be lit, the winning rate display unit 53 is arranged in order from the top (the fifth winning rate display region 53E, the fourth winning rate display region 53D, the third winning rate display region 53C, and the second winning rate display). The light is turned off in the order of the area 53B and the first winning percentage display area 53A (see arrow 88 in FIG. 20).
Thereafter, in S65, the extinction timer 74 is set to the initial value “0 second”, and the measurement is started again from “0 second”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

  On the other hand, when the winning rate LED 54 is not lit (S63: NO), the lit area cannot be reduced any further, and in this state, the lighting timer 73 is set to the initial value “0 second” in S65. At the same time, the measurement starts again from “0 seconds”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

As described above, in the pachinko machine 1 according to the first embodiment, when a pachinko ball wins the start port 39, the pachinko ball won by the start port switch 39B is detected, and the main control CPU 461 serves as a display control CPU. A start opening prize command is transmitted to the terminal (S1). On the other hand, the display control CPU 661 determines whether or not a start opening prize command is input (S51), sets the lighting timer 73 and the extinguishing timer 74 to the initial value “0 second”, and starts measurement. (S53). If the value of the lighting timer 73 is within “5 seconds” and the pachinko ball wins the starting port 39 again (S55: YES), the winning rate stage value stored in the RAM 663 is incremented by “+1”. At the same time, the winning rate LED 54 increases the display areas 53A to 53E to be turned on by one (S57). On the other hand, if the pachinko ball does not win again at the start port 39 even after the value of the turn-off timer 74 has elapsed “10 seconds” or longer (S62: NO), the value of the winning rate step stored in the RAM 663 is stored. "-1" and the winning rate LED 54 reduces the lighting display areas 53A to 53E by one (S64), so that the rate at which the pachinko ball wins the start opening 39 in the pachinko machine 1 can be visually displayed. It is possible for the player to be one of the determination factors when selecting a gaming machine to play, and to increase the expectation of winning a prize at the winning opening, thereby raising the interest of the player.
Further, when the number of winnings counted in the first hold counter 463C is “4” which is the upper limit (S60: YES), the measurement of the extinction timer 74 is restarted from the initial value (S61). Even if the start opening 39 is not won before the value of the timer 74 exceeds “10 seconds”, the display area of the winning rate LED 54 does not decrease. Therefore, even if the player temporarily stops to launch the pachinko ball into the game area 9 when the number of the starting openings is maximized, the lighting of the display areas 53A to 53E may be reduced. Absent. Accordingly, it is possible to display an accurate winning rate.

  Next, a pachinko machine according to a second embodiment will be described with reference to FIG. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 20 denote the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .

The schematic configuration of the pachinko machine according to the second embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.
Here, in the pachinko machine according to the second embodiment, in the winning rate display control process for displaying the winning rate to the starting port 39 executed by the display control CPU 661 of the display control board 66, the number of reserved starting ports is maximized. And the processing of the turn-off timer 74 when the number of reserved starting ports is no longer the maximum is different from the pachinko machine 1 according to the first embodiment.

  A winning rate display control process for displaying the winning rate to the start port 39 executed by the display control CPU 661 of the display control board 66 according to the second embodiment will be described with reference to FIG. FIG. 21 is a flowchart of the winning rate display control process executed by the display control CPU of the pachinko machine according to the first embodiment. Here, the interrupt control process of FIG. 21 operates at regular intervals (for example, every 4 msec) after the power is turned on. 21 are stored in the ROM 662 and the RAM 663 provided in the display control board 66 and executed by the display control CPU 661.

As shown in FIG. 21, first, in S71, the display control CPU 661 determines whether or not a start port winning instruction transmitted when winning from the main control CPU 461 to the start port 39 is input. Execute.
The display control CPU 661 ends the process when the start opening prize command is not input from the main control CPU 461 (S71: NO).

  On the other hand, when the start opening winning command is input from the main control CPU 461 (S71: YES), the display control CPU 661 receives the winning rate step stored in the winning rate step storage area 663A of the RAM 663 in S72. Is updated from the initial value “0” to “1”, and the winning rate LED 54 is lit only in the first winning rate display area 53A as shown in FIG.

In S73, the lighting timer 73 and the extinguishing timer 74 are set to initial values “0 seconds”, and measurement is started.
Subsequently, in S74, the display control CPU 661 determines whether or not a start opening prize command transmitted when winning the start opening 39 from the main control CPU 461 is input.

  When the start opening winning command is input from the main control CPU 461 (S74: YES), the display control CPU 661 further reads the current value of the lighting timer 73 in S75, and the value is “5 seconds. Is determined.

  As a result, when the current value of the lighting timer 73 is within “5 seconds” (S75: YES), it is subsequently determined whether or not the winning rate LED 54 is lit up to the upper limit of five levels. (S76). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the value of the winning rate step stored in the winning rate step storage area 663A of the RAM 663 is “5”, the upper limit is five steps (the first winning rate display area 53A to the fifth winning rate display area). 53E is turned on (see FIG. 19).

When the winning rate LED 54 is not lit up to the upper limit of 5 levels (S76: NO), that is, the winning rate level values stored in the winning rate level storage area 663A of the RAM 663 are “0” to “4”. In some cases, the winning rate stage value stored in the RAM 663 is incremented by “+1”, and the winning rate LED increases the display areas 53A to 53E that are lit up by one (S77). still. When increasing the display area to be lit, the winning rate display unit 53 is in order from the bottom (first winning rate display region 53A, second winning rate display region 53B, third winning rate display region 53C, fourth winning rate display region 53D). , In the order of the fifth winning percentage display area 53E) (see arrow 87 in FIG. 20).
Thereafter, in S78, the lighting timer 73 and the extinguishing timer 74 are set to the initial value “0 second”, the measurement is started again from “0 second”, and the processing is ended.

On the other hand, when the winning rate LED 54 is lit up to the upper limit of 5 levels (S76: YES), since the lighting area cannot be increased any more, in that state, the lighting timer 73 and the extinguishing timer 74 are initially set in S78. The value is set to “0 second”, the measurement is restarted from “0 second”, and the process is terminated.

  Further, when the value of the lighting timer 73 read when the start opening winning command is input from the main control CPU 461 is higher than “5 seconds” (S75: NO), the lighting timer 73 is in that state in S79. And the extinguishing timer 74 are set to the initial value “0 second”, the measurement is started again from “0 second”, and the process is terminated.

  On the other hand, when the start opening winning command is not input from the main control CPU 461 (S74: NO), subsequently, in S80, the number of winnings counted in the first holding counter 463C is “4” as the upper limit. It is determined whether or not. As described above, when the pachinko ball wins the start opening 39 while the special symbol is changing, the first holding counter of the RAM 463 provided on the main control board 69 (see FIG. 5) to be described later up to 4 is provided. It is stored in 463C and held as the number of change confirmations. In addition, two first hold LEDs 40 for displaying the count value stored in the first hold counter 463C are arranged on each of the left and right sides of the liquid crystal display 27 (see FIG. 2).

  When the number of hold is “4” which is the upper limit (S80: YES), the measurement of the extinguishing timer 74 is temporarily interrupted (S81). Then, the process ends.

  Further, when the number of holding is not “4” which is the upper limit (S80: NO), that is, when the count value stored in the first holding counter 463C is “0” to “3”, the above S81 The display control CPU reads the value of the extinguishing timer 74 and whether the read value of the extinguishing timer 74 is equal to or less than “10 seconds” (S82). It is determined whether or not (S83).

As a result, if the current value of the turn-off timer 74 is higher than “10 seconds” (S83: NO), then whether or not the winning rate LED 54 is lit in at least one winning rate display area 53A to 53E? It is determined whether or not (S84). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the winning rate step value stored in the winning rate step storage area 663A of the RAM 663 is “0”, all winning rate display areas (first winning rate display area 53A to fifth winning rate display) are displayed. The region 53E) is turned off.
Further, when the current value of the extinguishing timer 74 is “10 seconds” or less (S83: YES), the processing ends.

When the winning rate LED 54 is lit in at least one winning rate display area (S84: YES), that is, the winning rate step values stored in the winning rate step storage area 663A of the RAM 663 are “1” to “5”. ”, The winning rate stage value stored in the RAM 663 is set to“ −1 ”, and the winning rate LED reduces the display areas 53A to 53E that are turned on by one (S85). In order to reduce the display area to be lit, the winning rate display unit 53 is arranged in order from the top (the fifth winning rate display region 53E, the fourth winning rate display region 53D, the third winning rate display region 53C, and the second winning rate display). The light is turned off in the order of the area 53B and the first winning percentage display area 53A (see arrow 88 in FIG. 20).
Thereafter, in S86, the extinction timer 74 is set to the initial value “0 second”, and the measurement is started again from “0 second”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

On the other hand, when the winning rate LED 54 is not lit (S84: NO), the lit area cannot be reduced any further, and in this state, the lighting timer 73 is set to the initial value “0 second” in S86. At the same time, the measurement starts again from “0 seconds”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

As described above, in the pachinko machine 1 according to the second embodiment, when the pachinko ball wins the start port 39, the pachinko ball won by the start port switch 39B is detected, and the main control CPU 461 is used as the display control CPU. A start opening prize command is transmitted to the terminal (S1). On the other hand, the display control CPU 661 determines whether or not a start opening prize command is input (S71), sets the lighting timer 73 and the extinguishing timer 74 to the initial value “0 second”, and starts measurement. (S73). If the value of the lighting timer 73 is within “5 seconds” and the pachinko ball wins the start opening 39 again (S75: YES), the winning rate stage value stored in the RAM 663 is incremented by “+1”. At the same time, the winning rate LED 54 increases the display areas 53A to 53E to be turned on by one (S77). On the other hand, if the pachinko ball does not win again at the start port 39 even after the value of the turn-off timer 74 has exceeded “10 seconds” (S83: NO), the value of the winning rate step stored in the RAM 663 "-1" and the winning rate LED 54 reduces the lighting display areas 53A to 53E by one (S85), so that the rate at which the pachinko ball wins the start opening 39 in the pachinko machine 1 can be displayed visually. It is possible for the player to be one of the determination factors when selecting a gaming machine to play, and to increase the expectation of winning a prize at the winning opening, thereby raising the interest of the player.
If the number of winnings counted in the first hold counter 463C is “4” which is the upper limit (S80: YES), the measurement of the extinction timer 74 is temporarily interrupted (S81), and the number of winnings is determined. Since the measurement of the extinguishing timer 74 is not resumed until the upper limit is not reached (S80: NO) (S82), even if the start port 39 is not won before the value of the extinguishing timer 74 exceeds “10 seconds”, The display area of the winning rate LED 54 does not decrease. Therefore, even if the player temporarily stops to launch the pachinko ball into the game area 9 when the number of the starting openings is maximized, the lighting of the display areas 53A to 53E may be reduced. Absent. Accordingly, it is possible to display an accurate winning rate.

  Next, a pachinko machine according to Embodiment 3 will be described with reference to FIG. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 20 denote the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .

The schematic configuration of the pachinko machine according to the third embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.
Here, in the pachinko machine according to the third embodiment, in the winning rate display control process for displaying the winning rate to the starting port 39 executed by the display control CPU 661 of the display control board 66, the turn-off timer 74 is measured for the lighting timer 73. Is different from the pachinko machine 1 according to the first embodiment in that the measurement is started from the time point when the measurement of the predetermined time (5 seconds in the third embodiment) is completed.

  Hereinafter, a winning rate display control process for displaying the winning rate to the starting port 39 executed by the display control CPU 661 of the display control board 66 according to the third embodiment will be described with reference to FIG. FIG. 22 is a flowchart of the winning rate display control process executed by the display control CPU of the pachinko machine according to the first embodiment. Here, the interrupt control process of FIG. 22 operates at regular intervals (for example, every 4 msec) after the power is turned on. Each program shown in the flowchart in FIG. 22 is stored in a ROM 662 or a RAM 663 provided in the display control board 66 and is executed by the display control CPU 661.

As shown in FIG. 22, first, in S91, the display control CPU 661 determines that the main control C
A determination process is performed to determine whether or not a start opening prize command transmitted when winning from the PU 461 to the start opening 39 is input.
The display control CPU 661 ends the process when the start opening prize command is not input from the main control CPU 461 (S91: NO).

  On the other hand, when the start opening winning command is input from the main control CPU 461 (S91: YES), the display control CPU 661 receives the winning rate step stored in the winning rate step storage area 663A of the RAM 663 in S92. Is updated from the initial value “0” to “1”, and the winning rate LED 54 is lit only in the first winning rate display area 53A as shown in FIG.

In S93, the lighting timer 73 is set to the initial value “0 seconds” and measurement is started.
Subsequently, in S94, the display control CPU 661 determines whether or not a start port winning command transmitted when winning the start port 39 from the main control CPU 461 is input.

  When the start opening winning command is input from the main control CPU 461 (S94: YES), the display control CPU 661 further reads the current value of the lighting timer 73 in S95, and the value is “5 seconds. Is determined.

  As a result, when the current value of the lighting timer 73 is within “5 seconds” (S95: YES), it is subsequently determined whether or not the winning rate LED 54 is lit up to the upper limit of five levels. (S96). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the value of the winning rate step stored in the winning rate step storage area 663A of the RAM 663 is “5”, the upper limit is five steps (the first winning rate display area 53A to the fifth winning rate display area). 53E is turned on (see FIG. 19).

When the winning rate LED 54 is not lit up to the upper limit of 5 steps (S96: NO), that is, the winning rate step values stored in the winning rate step storage area 663A of the RAM 663 are “0” to “4”. In some cases, the value of the winning rate step stored in the RAM 663 is incremented by “+1”, and the winning rate LED increases the display areas 53A to 53E that are turned on by one (S97). When the display area 53 to be lit is increased, the winning percentage display portion 53 is in order from the bottom (first winning percentage display area 53A, second winning percentage display area 53B, third winning percentage display area 53C, fourth winning percentage display). The area 53D and the fifth winning percentage display area 53E are in this order (see arrow 87 in FIG. 20).
Thereafter, in S98, the extinguishing timer 74 is stopped from being measured, and the initial value “0 second” is set (S99). Further, the lighting timer 73 is set to the initial value “0 second”, the measurement is started again from “0 second”, and the process ends (S100).

  On the other hand, when the winning rate LED 54 is lit up to the upper limit of 5 levels (S96: YES), since the lighting area cannot be increased any more, the process proceeds to S98 in that state. Thereafter, the extinguishing timer 74 is stopped from being measured, and an initial value “0 second” is set (S99). In addition, the lighting timer 73 is set to the initial value “0 second”, the measurement is started from “0 second”, and the process ends (S100).

  Further, when the value of the lighting timer 73 read when the start opening prize command is input from the main control CPU 461 is higher than “5 seconds” (S95: NO), the process proceeds to S98 in that state. . Thereafter, the extinguishing timer 74 is stopped from being measured, and an initial value “0 second” is set (S99). In addition, the lighting timer 73 is set to the initial value “0 second”, the measurement is started from “0 second”, and the process ends (S100).

  On the other hand, when the start opening winning command is not input from the main control CPU 461 (S94: NO), subsequently, the number of winnings counted in the first hold counter 463C in S101 is “4” as the upper limit. It is determined whether or not. As described above, when the pachinko ball wins the start opening 39 while the special symbol is changing, the first holding counter of the RAM 463 provided on the main control board 69 (see FIG. 5) to be described later up to 4 is provided. It is stored in 463C and held as the number of change confirmations. In addition, two first hold LEDs 40 for displaying the count value stored in the first hold counter 463C are arranged on each of the left and right sides of the liquid crystal display 27 (see FIG. 2).

  When the hold number is the upper limit “4” (S101: YES), the value of the lighting timer 73 is read, and it is determined whether or not the read value of the lighting timer 73 is “5 seconds” or less. (S102).

When the current value of the lighting timer 73 is higher than “5 seconds” (S102: NO), the extinguishing timer 74 is set to the initial value “0 sec” and the extinguishing timer 74 is measured. It starts again from “0 second” (S103). Thereafter, the process ends.
On the other hand, when the current value of the lighting timer 73 is “5 seconds” or less (S102: YES), the processing ends.

  Further, when the number of holding is not the upper limit “4” (S101: NO), that is, when the count value stored in the first holding counter 463C is “0” to “3”, The display control CPU reads the value of the turn-off timer 74 and determines whether or not the read value of the turn-off timer 74 is “10 seconds” or less (S104).

  As a result, when the current value of the turn-off timer 74 is “10 seconds” or less (S104: YES), the value of the lighting timer 73 is further read, and the read value of the lighting timer 73 is “5 seconds” or less. It is determined whether or not (S105).

When the current value of the lighting timer 73 is higher than “5 seconds” (S105: NO), the extinguishing timer 74 is set to the initial value “0 sec”, and the extinguishing timer 74 is measured. It starts again from “0 second” (S106). Thereafter, the process ends.
On the other hand, when the current value of the lighting timer 73 is equal to or less than “5 seconds” (S105: YES), the processing ends in that state.

  When the current value of the turn-off timer 74 is “10 seconds” or less (S104: NO), it is determined whether or not the winning rate LED 54 is lit in at least one winning rate display area 53A to 53E. (S107). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the winning rate step value stored in the winning rate step storage area 663A of the RAM 663 is “0”, all winning rate display areas (first winning rate display area 53A to fifth winning rate display) are displayed. The region 53E) is turned off.

When the winning rate LED 54 is lit in at least one winning rate display area (S107: YES), that is, the winning rate step values stored in the winning rate step storage area 663A of the RAM 663 are “1” to “5”. In the case of "", the value of the winning rate step stored in the RAM 663 is set to "-1", and the winning rate LED reduces the display areas 53A to 53E that are turned on by one (S108). still. When the display area 53 to be lit is reduced, the winning percentage display portion 53 is in order from the top (the fifth winning percentage display area 53E, the fourth winning percentage display area 53D, the third winning percentage display area 53C, and the second winning percentage display area 53B). , In the order of the first winning percentage display area 53A) (see arrow 88 in FIG. 20).
Thereafter, in S109, the extinguishing timer 74 is set to the initial value “0 second”, and the measurement is started again from “0 second”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

  On the other hand, when the winning rate LED 54 is not lit (S107: NO), since the lighting area cannot be reduced any more, the measurement of the extinction timer 89 is stopped in S110 and the processing is ended.

As described above, in the pachinko machine 1 according to the third embodiment, when a pachinko ball wins the start port 39, the pachinko ball won by the start port switch 39B is detected, and the main control CPU 461 serves as a display control CPU. A start opening prize command is transmitted to the terminal (S1). On the other hand, the display control CPU 661 determines whether or not a start opening prize command is input (S91), sets the lighting timer 73 and the extinguishing timer 74 to the initial value “0 second”, and starts measurement. (S93). When the value of the lighting timer 73 is within “5 seconds” and the pachinko ball wins again at the start port 39 (S95: YES), the value of the winning rate stage stored in the RAM 663 is incremented by “+1”. At the same time, the winning rate LED 54 increases the display areas 53A to 53E that are turned on by one (S97). On the other hand, if the pachinko ball does not win the starting port 39 again even after the value of the turn-off timer 74 has elapsed for “10 seconds” or longer (S104: NO), the value of the winning rate step stored in the RAM 663 is stored. "-1" and the winning rate LED 54 reduces the lighting display areas 53A to 53E by one (S108), so that in the pachinko machine 1, the rate at which the pachinko ball wins the start opening 39 can be visually displayed. It is possible for the player to be one of the determination factors when selecting a gaming machine to play, and to increase the expectation of winning a prize at the winning opening, thereby raising the interest of the player.
Further, when the number of winnings counted in the first hold counter 463C is “4” which is the upper limit (S101: YES) and the value of the lighting timer is “5 seconds” or more (S102: NO). Since the measurement of the turn-off timer 74 is restarted from the initial value (S103), the display area of the winning rate LED 54 is displayed even if the start opening 39 is not won before the value of the turn-off timer 74 exceeds “10 seconds”. It will not decrease. Therefore, even if the player temporarily stops to launch the pachinko ball into the game area 9 when the number of the start ports 39 held is maximized, the lighting of the display areas 53A to 53E may be reduced. There is no. Accordingly, it is possible to display an accurate winning rate.

  Next, a pachinko machine according to Embodiment 4 will be described with reference to FIG. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 20 denote the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .

The schematic configuration of the pachinko machine according to the fourth embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.
Here, in the pachinko machine according to the fourth embodiment, in the winning rate display control process for displaying the winning rate to the start port 39 executed by the display control CPU 661 of the display control board 66, the turn-off timer 74 is measured for the lighting timer 73. Is started when the measurement for a predetermined time (5 seconds in the embodiment 4) is completed, and when the number of reserved openings at the start opening becomes maximum and when the number of reserved openings at the start opening becomes no longer maximum The processing of the timer 74 is different from that of the pachinko machine 1 according to the first embodiment.

  Hereinafter, a winning rate display control process for displaying the winning rate to the starting port 39 executed by the display control CPU 661 of the display control board 66 according to the fourth embodiment will be described with reference to FIG. FIG. 23 is a flowchart of a winning rate display control process executed by the display control CPU of the pachinko machine according to the fourth embodiment. Here, the interrupt control process in FIG. 23 operates at regular intervals (for example, every 4 msec) after the power is turned on. Each program shown in the flowchart in FIG. 23 is stored in a ROM 662 or a RAM 663 provided in the display control board 66 and is executed by the display control CPU 661.

As shown in FIG. 23, first, in S111, the display control CPU 661 determines whether or not a start opening prize command transmitted when winning from the main control CPU 461 to the start opening 39 is inputted. Execute.
The display control CPU 661 ends the process when the start opening prize command is not input from the main control CPU 461 (S111: NO).

  On the other hand, when the start opening winning command is input from the main control CPU 461 (S111: YES), the display control CPU 661 receives the winning rate step stored in the winning rate step storage area 663A of the RAM 663 in S112. Is updated from the initial value “0” to “1”, and the winning rate LED 54 is lit only in the first winning rate display area 53A as shown in FIG.

In step S113, the lighting timer 73 is set to the initial value “0 second” and measurement is started.
Subsequently, in S114, the display control CPU 661 determines whether or not a start port winning command transmitted when winning the start port 39 from the main control CPU 461 is input.

  When the start opening winning command is input from the main control CPU 461 (S114: YES), the display control CPU 661 further reads the current value of the lighting timer 73 in S115, and the value is “5 seconds. Is determined.

  As a result, when the current value of the lighting timer 73 is within “5 seconds” (S115: YES), it is subsequently determined whether or not the winning rate LED 54 is lit up to the upper limit of 5 levels. (S116). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the value of the winning rate step stored in the winning rate step storage area 663A of the RAM 663 is “5”, the upper limit is five steps (the first winning rate display area 53A to the fifth winning rate display area). 53E is turned on (see FIG. 19).

When the winning rate LED 54 is not lit up to the upper limit of 5 levels (S116: NO), that is, the winning rate level values stored in the winning rate level storage area 663A of the RAM 663 are “0” to “4”. In some cases, the winning rate stage value stored in the RAM 663 is incremented by “+1”, and the winning rate LED is increased by one in the display areas 53A to 53E that are lit (S117). When the display area 53 to be lit is increased, the winning percentage display portion 53 is in order from the bottom (first winning percentage display area 53A, second winning percentage display area 53B, third winning percentage display area 53C, fourth winning percentage display). The area 53D and the fifth winning percentage display area 53E are in this order (see arrow 87 in FIG. 20).
Thereafter, in S118, the extinguishing timer 74 is stopped from being measured, and an initial value of “0 seconds” is set (S119). Further, the lighting timer 73 is set to the initial value “0 second”, the measurement is started again from “0 second”, and the process ends (S120).

On the other hand, when the winning rate LED 54 is lit up to the upper limit of 5 levels (S116: YE)
In S), since the lighting area cannot be increased any more, the process proceeds to S118 in that state. Thereafter, the extinguishing timer 74 is stopped from measuring and is set to an initial value of “0 seconds” (S119). In addition, the lighting timer 73 is set to the initial value “0 second”, the measurement is started from “0 second”, and the process ends (S120).

  Further, when the value of the lighting timer 73 read when the start opening winning command is input from the main control CPU 461 is higher than “5 seconds” (S115: NO), the process proceeds to S118 in that state. . Thereafter, the extinguishing timer 74 is stopped from measuring and is set to an initial value of “0 seconds” (S119). In addition, the lighting timer 73 is set to the initial value “0 second”, the measurement is started from “0 second”, and the process ends (S120).

  On the other hand, when the start opening winning command is not input from the main control CPU 461 (S114: NO), subsequently, in S121, the number of winnings counted in the first holding counter 463C is “4” as the upper limit. It is determined whether or not. As described above, when the pachinko ball wins the start opening 39 while the special symbol is changing, the first holding counter of the RAM 463 provided on the main control board 69 (see FIG. 5) to be described later up to 4 is provided. It is stored in 463C and held as the number of change confirmations. In addition, two first hold LEDs 40 for displaying the count value stored in the first hold counter 463C are arranged on each of the left and right sides of the liquid crystal display 27 (see FIG. 2).

  When the number of holding is the upper limit “4” (S121: YES), the value of the lighting timer 73 is read, and it is determined whether or not the read value of the lighting timer 73 is “5 seconds” or less. (S122).

If the current value of the lighting timer 73 is higher than “5 seconds” (S122: NO), the extinguishing timer 74 is set to the initial value “0 sec” and the extinguishing timer 74 is measured. The operation is temporarily interrupted (S123). Thereafter, the process ends.
On the other hand, when the current value of the lighting timer 73 is “5 seconds” or less (S122: YES), the processing ends.

Further, when the number of holding is not the upper limit “4” (S121: NO), that is, when the count value stored in the first holding counter 463C is “0” to “3”, S123 If the measurement of the extinguishment timer 74 is interrupted (S124: YES), the measurement of the interrupted extinction timer 74 is resumed (S125), and the process proceeds to S126.
On the other hand, if the measurement of the turn-off timer 74 is not interrupted, the process proceeds to S126, and the display control CPU reads the value of the turn-off timer 74, and the read value of the turn-off timer 74 is “10 seconds”. It is determined whether or not the following is true (S126).

  As a result, when the current value of the turn-off timer 74 is “10 seconds” or less (S126: YES), the value of the lighting timer 73 is further read, and the read value of the lighting timer 73 is “5 seconds” or less. It is determined whether or not (S127).

When the current value of the lighting timer 73 is higher than “5 seconds” (S127: NO), the extinguishing timer 74 is set to the initial value “0 sec”, and the extinguishing timer 74 is measured. It starts again from “0 second” (S128). Thereafter, the process ends.
On the other hand, when the current value of the lighting timer 73 is “5 seconds” or less (S127: YES), the processing is terminated in that state.

  Further, when the current value of the turn-off timer 74 is “10 seconds” or more (S126: NO), it is determined whether or not the winning rate LED 54 is lit in at least one winning rate display area 53A to 53E. (S129). As described above, the winning rate display section 53 provided with the winning rate LED 54 has the first winning rate display region 53A, the second winning rate display region 53B, the third winning rate display region 53C, the fourth winning rate display region 53D, The fifth winning percentage display area 53E is divided into five areas. When the winning rate step value stored in the winning rate step storage area 663A of the RAM 663 is “0”, all winning rate display areas (first winning rate display area 53A to fifth winning rate display) are displayed. The region 53E) is turned off.

When the winning rate LED 54 is lit in at least one winning rate display area (S129: YES), that is, the winning rate step values stored in the winning rate step storage area 663A of the RAM 663 are “1” to “5”. ”, The winning rate step value stored in the RAM 663 is decreased by“ −1 ”, and the winning rate LED is decremented by one in the display areas 53A to 53E (S130). still. When the display area 53 to be lit is reduced, the winning percentage display portion 53 is in order from the top (the fifth winning percentage display area 53E, the fourth winning percentage display area 53D, the third winning percentage display area 53C, and the second winning percentage display area 53B). , In the order of the first winning percentage display area 53A) (see arrow 88 in FIG. 20).
Thereafter, in S131, the extinguishing timer 74 is set to the initial value “0 second”, and the measurement is started again from “0 second”. On the other hand, the lighting timer 73 continuously measures without returning to the initial value. Then, the process ends.

  On the other hand, when the winning rate LED 54 is not lit (S129: NO), since the lighting area cannot be reduced any more, the measurement of the turn-off timer 89 is stopped in S132 and the processing is ended.

As described above, in the pachinko machine 1 according to the fourth embodiment, when a pachinko ball wins the start port 39, the pachinko ball won by the start port switch 39B is detected, and the main control CPU 461 serves as a display control CPU. A start opening prize command is transmitted to the terminal (S1). On the other hand, the display control CPU 661 determines whether or not a start opening prize command is input (S111), sets the lighting timer 73 and the extinguishing timer 74 to the initial value “0 seconds”, and starts measurement. (S113). When the value of the lighting timer 73 is within “5 seconds” and the pachinko ball wins again at the starting port 39 (S115: YES), the value of the winning rate stage stored in the RAM 663 is incremented by “+1”. At the same time, the winning rate LED 54 increases the display areas 53A to 53E that are turned on by one (S117). On the other hand, if the pachinko ball does not win the start port 39 again even after the value of the turn-off timer 74 has elapsed for “10 seconds” or longer (S126: NO), the value of the winning rate step stored in the RAM 663 is stored. "-1" and the winning rate LED 54 reduces the lighting display areas 53A to 53E by one (S130), so that the rate at which the pachinko ball wins the start opening 39 in the pachinko machine 1 can be displayed visually. It is possible for the player to be one of the determination factors when selecting a gaming machine to play, and to increase the expectation of winning a prize at the winning opening, thereby raising the interest of the player.
Further, when the number of winnings counted in the first hold counter 463C is “4” which is the upper limit (S121: YES) and the value of the lighting timer is “5 seconds” or more (S122: NO). The measurement of the turn-off timer 74 is temporarily interrupted (S123), and the measurement of the turn-off timer 74 is not resumed until the number of winnings does not reach the upper limit (S121: NO) (S125). Even if the start opening 39 is not won before the elapse of "second" or more, the display area of the winning rate LED 54 does not decrease. Therefore, even if the player temporarily stops to launch the pachinko ball into the game area 9 when the number of the starting openings is maximized, the lighting of the display areas 53A to 53E may be reduced. Absent. Accordingly, it is possible to display an accurate winning rate.

Next, a pachinko machine according to Embodiment 5 will be described with reference to FIGS. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment shown in FIGS. 1 to 20 denote the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .
The schematic configuration of the pachinko machine according to the fifth embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment.
However, the configuration and control system of the game area on the game board of the pachinko machine according to the fifth embodiment are different from the configuration and control system of the game area 9 on the game board 8 of the pachinko machine 1 according to the first embodiment. .

Next, a schematic configuration of the game area 102 on the game board 101 of the pachinko machine 100 according to the fifth embodiment will be described with reference to FIGS.
As shown in FIG. 24, in the game area 102, each structure such as a prize opening is arranged on a game board 101 made of a plate material having a predetermined thickness, and an annular rail 103 is erected so as to surround it. Configured. This rail 103 constitutes an overlapping guide path 104 that guides the fired pachinko ball into the game area 102, and the right shoulder is limited to advance the pachinko ball driven along the rail 103. Step part 105.
An opening is formed in the approximate center of the game area 102, and a special symbol display device 108, which will be described later, is disposed on the front side of the opening. The special symbol display device 108 includes a liquid crystal display (LCD) 110 attached to the back surface portion. The liquid crystal display 110 displays three rows of changing symbols that change in the vertical direction on the left, middle, and right, and a normal symbol display unit 120 that displays a normal symbol divided into two on the left and right corners. Is configured. Further, on the upper side of the liquid crystal display 110, a first hold LED 111 to a fourth hold LED 114 for displaying a count value of a first hold counter 293C, which will be described later, are arranged substantially horizontally in the left-right direction (see FIG. 39).

On the other hand, a gate 131 is disposed on the left side of the special symbol display device 108. The gate 131 is provided with a gate switch 131A (see FIG. 26) that detects the passage of the pachinko sphere. Further, normal windmills 132 and 133 are provided outside the left and right lower corners of the special symbol display device 108.
In addition, a start port 135 is disposed immediately below the special symbol display device 108. The starting port 135 is provided with a starting port switch 135A (see FIG. 26) for detecting the winning of the pachinko ball, and the three rows of fluctuation symbols displayed on the liquid crystal display 110 by detecting the winning of the pachinko ball. The fluctuation starts. If the winning symbol is won at the starting port 135 while the changing symbol is changing, the winning symbol is stored in the RAM provided on the main control board 290 (see FIG. 26) up to four as will be described later, and the changing of the changing symbol is confirmed. Held as a count.

  Further, the normal symbol of the normal symbol display unit 120 is changed by detecting the passage of the pachinko ball through the gate 131. Then, when a pachinko ball enters the gate 131 and the normal symbol of the normal symbol display unit 120 changes and then stops in a predetermined display mode (for example, when it is aligned as “11”, “77”, etc.) The tulip-type accessory 135B provided at the upper part of the start opening 135 is opened for a predetermined time (in this embodiment, about 1 second), and the probability that a pachinko ball wins the start opening 135 increases. In addition, when the pachinko ball passes through the gate 131 while the normal symbol is changing, the number of passages is stored in the RAM provided on the main control board 290, as will be described later, and is held as the fixed number of changes of the normal symbol. Is done.

A special winning device 140 is provided below the starting port 135. The special winning device 140 is formed with a large winning port 139 whose front surface is covered with an open / close door 138 having a wide lateral opening.
In addition, on each of the left and right sides of the large winning opening 139, winning openings 142 and 143 that are open upward are disposed and communicated with a not-shown winning ball bowl on the back of the game board 101, and to the winning openings 142 and 143. Each winning opening switch (not shown) for detecting the winnings is provided. In addition, each lighting lamp 144 is incorporated below the winning holes 142 and 143.
Further, an outlet 145 is opened along the rail 103 immediately below the special winning device 140. Further, in such a game area 102 surrounded by the rail 103, a plurality of nails are driven together with the above components to form a complicated flow path of the pachinko ball.

Further, as shown in FIG. 25, the special symbol display device 108 has a liquid crystal display (LCD) 110 attached from the back side to an opening formed in the center. Further, on the front surface of the special symbol display device 108, each of the 30 expected LEDLEDs 1 is directed upward from the center of the lower end of the liquid crystal display 110 along the left and right sides of the liquid crystal display 110. To LL30 and LR1 to LR30 are arranged. Each of the expectations LEDLL1 to LL30, LR1 to LR30 is the number of expectations LEDLL30 above the expectations LEDLL1 and LR1 at the lower end portion, as will be described later, by the number representing the expectation for the jackpot acquisition of the three rows of variation symbols. Are sequentially turned on until LR30.
In addition, at the center of the upper end portion of the liquid crystal display 110, an electric lamp 151 having “big hit” drawn on the front surface portion is arranged. In addition, on the left and right sides of the electric lamp 151, electric lamps 152 depicted as “extreme heat” on the front surface are arranged. Further, on the side of each electric lamp 152, electric lamps 153 having “super” drawn on the front surface portion are arranged.
And each expectation degree LEDLL26-LL30 and LR26-LR30 are arrange | positioned facing each illumination lamp 152 below. Moreover, each expectation degree LEDLL20-LL25 and LR20-LR25 are arrange | positioned facing the front side of each illumination lamp 153. FIG. Moreover, when each expectation degree LEDLL26-LL30 and LR26-LR30 are lighting-driven, it is comprised so that each illumination lamp 152 may be lighted. Moreover, when each expectation degree LEDLL20-LL25 and LR20-LR25 are lighting-driven, it is comprised so that each illumination lamp 153 may be lighted. In addition, when the three rows of fluctuation symbols of the liquid crystal display 110 are confirmed and stopped in a mode in which a jackpot is notified (for example, “111”, “777”, etc.), the illumination lamp 151 is driven to turn on and the game The person is informed that the jackpot has been awarded.

Next, the configuration of a control system related to the drive control of the pachinko machine 100 configured as described above will be described with reference to FIGS.
As shown in FIG. 26, the control system related to the drive control of the pachinko machine 1 includes a main control board 290, a sub-integrated control board 280, an effect display board 260, and the like.
The main control board 290 includes a CPU 291, ROM 292, RAM 293, an input / output circuit (I / O) 294, and the like. Yes. A clock circuit 295 is connected to the CPU 291 and a predetermined clock signal is input. Further, the input / output circuit 294 includes a gate switch 131A, a start opening switch 135A, a large winning opening switch 139A for detecting a winning ball that has won the large winning opening 139, and a V opening provided in the large winning opening 139 (not shown). A V switch 139B for detecting that a winning ball has entered is connected. The input / output circuit 294 is connected to an opening / closing solenoid 138A for opening / closing the opening / closing door 138, a solenoid 135C for opening / closing the tulip-shaped accessory 135B, the first holding LED 111 to the fourth holding LED 114, and the like.

Further, as shown in FIG. 27, the RAM 293 of the main control board 290 has a numerical value obtained by repeatedly adding 1 from 0 to 359 based on the clock signal input from the clock circuit 295 (the minimum value is next to the maximum value 359). A big hit counter 293A for storing “Return to 0” is provided. The count value of the big hit counter 293A is read at the timing when the switch signal is input from the start port switch 135A, and it is determined whether or not the big hit counter is based on the read count value. Here, for example, the count value “7” corresponds to the big hit, and the other count values are lost. Here, for example, in normal times, the count value “7” corresponds to the big hit, and in the case of the so-called probability variation mode (when probability variation is acquired), the count value “1, 3, 5, 7” corresponds to the big hit. The other count values are off. Therefore, in the gaming state in the non-probability change mode, a jackpot occurs with a probability of 1/360, and in the gaming state with a probability change, a jackpot occurs with a probability of 4/360.
When the jackpot is selected by lottery, the special symbols “1”, “2”, “3”, ... any one of "7" and "8" is displayed in a fixed stop together with "111", "222", "333", ..., "777", "888" Thereafter, as will be described later, the grand prize winning opening 139 can be continuously opened a predetermined number of times (for example, 15 times), and the number of winning prizes to the special winning opening 139 within 29.5 seconds or 29.5 seconds each time. The game is released until a total of 10 is reached, and a lot of prize balls are paid out to the player (in other words, a state advantageous to the player), so-called jackpot game can be performed (see FIG. 42).

  Further, the RAM 293 stores a normal symbol counter 293B in which a numerical value obtained by repeatedly adding 1 from 0 to 9 (returning to the minimum value 0 next to the maximum value 9) based on the clock signal input from the clock circuit 295 is stored. Is provided. The count value of the normal symbol counter 293B is read at a timing when a switch signal is input from each gate switch 54A, and it is determined whether or not it is a hit based on the read count value. Here, for example, the case where the count value is an even number corresponds to a win, and the case where the count value is an odd number corresponds to a loss.

  Here, when the pachinko ball passes through the gate 131 (see FIG. 24), the normal symbol counter 293B receives the numerical value stored when the signal from the gate switch 131A that detects the passage of the pachinko ball is input. The “normal symbol count value” at that time is stored in the parameter storage area 293K.

  In addition, a first holding counter 293 </ b> C is provided that counts up to a maximum of four winning prizes in the starting port 135 while the design of the liquid crystal display 110 is changing. Further, a second holding counter 293D is provided that counts up to four passes through the gate 131 while the normal symbol of the normal symbol display unit 120 is changing.

Further, the RAM 293 has a reach counter 293E that stores a numerical value obtained by repeatedly adding one by one from 0 to 142 based on the clock signal output from the clock circuit 295 (the maximum value 142 then returns to the minimum value 0). Is provided. The count value of the reach counter 293E is read at the timing when the switch signal is input from the start port switch 135A, and it is determined whether or not the reach is reached based on the read count value. Here, for example, it corresponds to the case of reach loss where the count value “0 to 27” is lost after reaching, and to the case of complete loss where the count value “28 to 142” immediately becomes lost without reaching reach. Yes.
Reach refers to the change of the left, middle, and right three lines of change, and the change of the left and right columns to the special patterns “1”, “2”, “3”,. A state in which all of the “8” stops at the same time and the fluctuation pattern in the middle row changes (for example, “1 ↓ 1”, “2 ↓ 2”,..., “7 ↓ 7”, etc.) Is the state.) A special symbol that stops in the left column and the right column among the three symbols of the left, middle, and right columns is called a reach symbol. Therefore, the reach loss means that after reaching the reach state, the middle row of the change symbol stops at a special symbol different from the reach symbol. Also, complete loss refers to ending without reaching reach.

  In addition, the RAM 293 stores a numerical value obtained by repeatedly adding one by one from 0 to 7 based on the clock signal output from the clock circuit 295 (the maximum value 7 is then returned to the minimum value 0). A counter 293F is provided. The count value of the jackpot special symbol selection counter 293F is read at the timing when the switch signal is input from the start port switch 135A, and the left, middle, and right three rows of fluctuation symbols fluctuate based on the read count value. After that, the combination pattern of the jackpot symbol that is stopped and displayed is specified. For example, the count value “0” is a jackpot symbol “111”, the count value “1” is a jackpot symbol “222”, the count value “2” is a jackpot symbol “333”, the count value “3” is a jackpot symbol “444”, The count value “4” corresponds to the jackpot symbol “555”, the count value “5” corresponds to the jackpot symbol “666”, the count value “6” corresponds to the jackpot symbol “777”, and the count value “7” corresponds to the jackpot symbol “888”. ing. Each jackpot symbol is a symbol that is stopped and displayed after a series of symbol variations, as is well known.

  The RAM 293 stores a normal symbol selection counter in which a numerical value obtained by repeatedly adding one by one from 0 to 3 based on the clock signal output from the clock circuit 295 (returns to the minimum value 0 next to the maximum value 3) is stored. 293G is provided. Here, for example, the count value “0” is the normal symbol “11”, the count value “1” is the normal symbol “17”, the count value “2” is the normal symbol “71”, and the count value “3” is the normal symbol “17”. 77 ". Each ordinary symbol is a symbol that is stopped and displayed after a series of symbol fluctuations, as is well known.

  Here, the normal symbol selection counter 293G stores a numerical value stored when a signal from the gate switch 131A for detecting the passage of the pachinko sphere is input when the pachinko sphere passes through the gate 131 (see FIG. 24). Is stored in a parameter storage area 293K described later as the “normal symbol selection count value” at that time.

  The RAM 293 stores a numerical value obtained by repeatedly adding one by one from 0 to 99 based on the clock signal output from the clock circuit 295 (the maximum value 99 then returns to the minimum value 0). 293H is provided. The count value of the variation pattern selection counter 293H is read at the timing when the switch signal is input from the start port switch 135A. Note that the count value of the variation pattern selection counter 293H may be configured to be read at the timing when the variation of the variation symbols of the three columns of the liquid crystal display 110 is started. Further, the variation pattern command selected based on the count value of the variation pattern selection counter 293H specifies a variation pattern for displaying a series of symbol variations on the special symbol display device 108 based on various display effects as is well known. In this embodiment, as described later, the display effect time of “5 seconds” (see FIG. 32) is set as the complete loss variation pattern as described later. In addition, two types of reach loss variation patterns of “20 seconds” and “30 seconds” (see FIG. 32) are set. Further, two types of variation patterns of “22 seconds” and “32 seconds” (see FIG. 32) are set in the variation pattern of the big hit (normally big hit and probability variation big hit).

The RAM 293 stores a numerical value obtained by repeatedly adding 1 from 0 to 200 based on the clock signal output from the clock circuit 295 (the maximum value 200 then returns to the minimum value 0). 293I is provided. The count value of the lost symbol selection counter 293I is read at the timing when the switch signal is input from the start port switch 135A.
In addition, the RAM 293 stores a numerical value obtained by repeatedly adding one by one from 0 to 143 based on the clock signal output from the clock circuit 295 (the maximum value 143 then returns to the minimum value 0). 293J is provided. The count value of the reach lose symbol selection counter 293J is read at the timing when the switch signal is input from the start port switch 135A.

Further, the RAM 293 is provided with a parameter storage area 293K in which the count values of the counters 293A to 293J when the switch signal is input from the start port switch 135A are stored.
Note that the count values and parameter storage areas 293K of the counters 293A to 293J are initialized to “0” at the time of activation. The first hold counter 293C is decremented by 1 every time the special symbol starts to change. The second hold counter 293D is decremented by 1 every time the normal symbol starts to change.

  As shown in FIG. 28, the ROM 292 stores a variation pattern determination table 171 (see FIG. 32) described later for determining a variation pattern based on the count value of the variation pattern selection counter 293H. A storage area 292A is provided.

  Also, as shown in FIG. 26, the sub-integrated control board 280 has a CPU 281, a ROM 282 for storing drive control programs such as the speaker 13 and the lighting lamps 144, 152, and 153, and various controls from the main control board 290. A RAM 283 for storing signals, an input / output circuit 284 for receiving various control signals sent from the main control board 290, a drive circuit 161 for driving and controlling the speaker 13, each illumination lamp 144, 152, 153, and each expected degree LEDLL1 A drive circuit 162 and the like for driving and controlling the LL30, LR1 to LR30, and the like are provided. The CPU 281, ROM 282, RAM 283, and input / output circuit 284 are mutually connected by a bus line. A clock circuit 285 is connected to the CPU 281 and a predetermined clock signal is input. The input / output circuit 284 is connected to the input / output circuit 294 of the main control board 290. The input / output circuit 284 is connected to the drive circuits 161 and 162.

  Further, as shown in FIG. 29, the RAM 283 of the sub-integrated control board 280 repeatedly adds one by one from 0 to 13 based on the clock signal input from the clock circuit 285 (the minimum value is next to the maximum value 13). An effect pattern selection counter 283A in which “return to value 0” is stored is provided. The count value of the effect pattern selection counter 283A is read at the timing when the variation pattern command transmitted from the main control board 290 is input (S321 in FIG. 44), and the read count value is stored in the parameter storage area 283B. Remembered.

  As shown in FIG. 30, the ROM 282 of the sub-integrated control board 280 is provided with an effect pattern selection table storage area 282A in which an effect pattern selection table 172 (see FIG. 33) described later is stored. Further, the ROM 282 selects each of the below-described effect pattern commands “effect 0”, “effect 1”,..., “Effect 9” (see FIGS. 33 and 34), and expectation levels LEDLL1 to LL30. A sub control program (see FIG. 43 and the like) to be described later for controlling lighting driving of LR1 to LR30 and the like is stored.

  As shown in FIG. 26, the effect display board 260 includes a CPU 261, a ROM 262 for storing a display control program and required display data, a RAM 263 for storing display commands, display information, input / output signals, and the like, and a sub-integrated control board. An input / output circuit 264 that receives various control signals sent from the H.280, a VDP (Video Display Processor) 265 that receives display information sent from the CPU 261 and processes and displays an image on the liquid crystal display 110. It is arranged. The CPU 261, ROM 262, RAM 263, input / output circuit 264, and VDP 265 are connected to each other by a bus line. A clock circuit 266 is connected to the CPU 261 and a predetermined clock signal is input. Then, the CPU 261 performs a predetermined effect display on the liquid crystal display 110 based on various control signals such as display pattern information input from the sub integrated control board 280.

  Further, as shown in FIG. 31, the ROM 262 is provided with an effect display pattern table storage area 262A in which an effect display pattern table 173 (see FIG. 34) described later is stored. Further, the ROM 262 controls the display of the effect display pattern corresponding to each effect pattern command “effect 0”, “effect 1”,..., “Effect 9” (see FIG. 12) described later. A sub control program (see FIG. 47) to be described later is stored.

Next, the variation pattern determination table 171 stored in the variation pattern determination table storage area 292A of the ROM 292 of the main control board 290 will be described with reference to FIG. FIG. 32 is a diagram illustrating an example of the variation pattern determination table stored in the variation pattern determination table storage area 292A of the ROM 292 of the main control board 290 of the pachinko machine 100 according to the fifth embodiment.
As shown in FIG. 32, the variation pattern determination table 171 according to the fifth embodiment is mainly composed of three pattern groups. , Variation pattern command 12) and big hit variation pattern group (variation pattern command 21, variation pattern command 22). First, “lost” and “hit” (regardless of whether it is a normal big hit or a probable big hit) are determined based on the count value of the big hit counter 293A. Next, in the case of “losing”, one of the variation pattern commands 1, 11, and 12 is determined based on the count value of the variation pattern selection counter 293H. In the case of “big hit”, one of the variation pattern commands 21 and 22 is determined based on the count value of the variation pattern selection counter 293H. The specific control for determining each variation pattern command 1 to 22 will be described later (see FIG. 38).

For example, the complete loss variation pattern command 1 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “0 to 89”.
The reach-losing variation pattern command 11 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “90 to 95”. The reach-losing variation pattern command 12 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “96 to 99”.

  The jackpot variation pattern command 21 is determined when it is determined that the jackpot is based on the count value of the jackpot counter 293A and the count value of the variation pattern selection counter 293H is “0 to 39”. The jackpot variation pattern command 22 is determined when “big hit” is determined from the count value of the jackpot counter 293A and the count value of the variation pattern selection counter 293H is “40 to 99”.

  Next, an example of the effect pattern selection table 172 stored in the effect pattern selection table storage area 282A of the ROM 282 of the sub-integrated control board 280 will be described with reference to FIG. Here, the effect pattern selection table 172 is displayed when the CPU 281 of the sub-integrated control board 280 receives instruction information (specifically, the variation pattern command and the final stop symbol information) from the CPU 291 of the main control board 290. This is a table used when selecting an effect pattern (effect pattern command) as display instruction information to be output (instructed) to the CPU 261 of the substrate 260 or when lighting the expected degrees LEDLL1 to LL30 and LR1 to LR30.

  As shown in FIG. 33, the effect pattern selection table 172 is input from the CPU 291 and the “variation pattern command” representing the variation pattern instruction information input from the CPU 291 of the main control board 290, and finally when the final determination is stopped. A “final stop pattern instruction” representing each of the three rows of symbols displayed on the liquid crystal display 52 and an “effect pattern count” representing the count value of the effect pattern selection counter 283A acquired when a variation pattern command is input from the CPU 291. "Value", "effect pattern command" corresponding to this "effect pattern count value", "lighting addition number" indicating the number of additional lighting of each of the expected degrees LEDLL1 to LL30, LR1 to LR30, and each expected degree LEDLL1 LL30, LR1 to LR30 are composed of “lighting upper limit number” indicating the upper limit number of lighting. It is. The “effect pattern command” is a command for instructing the CPU 261 of the effect display board 260 to effect display the display image data of the effect display pattern corresponding to the effect pattern command on the liquid crystal display 52. is there. The “effect pattern command” is a command for instructing the drive circuit 161 to play game music corresponding to the effect pattern command via the speaker 13. The “effect pattern command” is a command for instructing the drive circuit 162 to light up and drive each of the illumination lamps 144, 152, 153 and the like according to the lighting drive pattern corresponding to the effect display pattern command. is there. Specific control based on each effect pattern command will be described later (see FIG. 47).

  For example, when the “variation pattern command” input from the main control board 290 is “1” and the acquired count value of the effect pattern selection counter 283A is “0 to 13”, the effect pattern command 1A is selected. The effect pattern command 1A is a combination of special symbols (for example, “567”) for notifying the complete loss instructed from the main control board 290 after 10 seconds from the start of variation of the three rows of variation symbols displayed on the liquid crystal display 110. ) Is stopped and displayed on the liquid crystal display 110, and a game pattern corresponding to this is specified and an effect pattern for performing a lighting drive pattern of the electric lamp 6, etc. is specified. Further, “0” is stored in the RAM 283 as “lighting addition number”, and “15” is stored as “lighting upper limit number”.

  When the “variation pattern command” input from the main control board 290 is “11” and the acquired count value of the effect pattern selection counter 283A is “0 to 8”, the effect pattern command 11A is selected. The effect pattern command 11A is the reach effect type “reach A”, and the reach loss instructed from the main control board 290 is notified 20 seconds after the start of the change of the three rows of change symbols displayed on the liquid crystal display 110. This is a command for specifying a combination of special symbols (for example, “767”) on the liquid crystal display 110 and specifying an effect pattern for performing a corresponding game music and lighting driving pattern such as the illumination lamp 144. Further, “+4” as “lighting addition number” and “20” as “lighting upper limit number” are stored in the RAM 283.

  When the “variation pattern command” input from the main control board 290 is “12” and the acquired count value of the effect pattern selection counter 283A is “7 to 10”, the effect pattern command 12B is selected. The effect pattern command 12B has a reach effect type of “reach B” and a special symbol combination (for example, “reach loss” instructed by the main control board 290 30 seconds after the start of change of the three rows of change symbols. 323 ") is stopped and displayed on the liquid crystal display 110, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern such as the electric lamp 144 are specified. Further, “+10” as “lighting addition number” and “25” as “lighting upper limit number” are stored in the RAM 283.

  When the “variation pattern command” input from the main control board 290 is “21” and the acquired count value of the effect pattern selection counter 283A is “0 to 2”, the effect pattern command 21A is selected. The effect pattern command 21A is a reach effect type “reach A”, and a special symbol combination (for example, “ 777 ") is stopped and displayed on the liquid crystal display 110, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern such as the electric lamp 144 are specified. Further, “+15” as “lighting addition number” and “30” as “lighting upper limit number” are stored in the RAM 283.

  When the “variation pattern command” input from the main control board 290 is “22” and the acquired count value of the effect pattern selection counter 283A is “7 to 13”, the effect pattern command 22C is selected. The effect pattern command 22C has a reach effect type of “reach A”, and a special symbol combination (for example, “3”) that notifies the jackpot instructed from the main control board 290 32 seconds after the start of change of the three rows of change symbols. 111 ") is stopped and displayed on the liquid crystal display 110, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern such as the electric lamp 144 are specified. Further, “+30” as “lighting addition number” and “30” as “lighting upper limit number” are stored in the RAM 283.

  Next, the effect display pattern table 173 stored in the effect display pattern table storage area 262A of the ROM 262 of the effect display board 260 will be described with reference to FIG. Here, the effect display pattern table 173 is displayed when the CPU 261 of the effect display board 260 receives an “effect pattern command” (see FIG. 33) as display instruction information from the CPU 281 of the sub-integrated control board 280. It is a table used when selecting each production | presentation display pattern preset corresponding to instruction information. Then, the CPU 261 of the effect display board 260 reads the effect display moving image data corresponding to the selected effect display pattern from the ROM 262 and controls the display on the liquid crystal display 110.

As shown in FIG. 34, the effect display pattern table 76 is preset for “effect pattern commands” representing display instruction information input from the CPU 281 of the sub-integrated control board 280 and for each “effect pattern command”. It consists of “production display patterns”.
The “effect pattern command” in the effect display pattern table 76 includes “1A”, “11A” to “11C”, “12A” to “12C”, “21A” to “21C”, “22A” to “22C”. "Is stored in advance.

In addition, in the “effect display pattern” of the effect display pattern table 76, “completely lost A” representing moving image data of complete loss for about 5 seconds with respect to “1A” of the “effect pattern command” is stored in advance. .
The reach effect type is “reach A” with respect to “11A” of “effect pattern command”, “reach lose 11A” representing the video data of reach loss for about 20 seconds, and “11B” of “effect pattern command”. On the other hand, the type of reach production is “reach A”, and the type of reach production is “reach A” for “reach lose 11B” and “11C” of “production pattern command” representing the video data of reach loss for about 20 seconds. “Leach lose 11C” representing the video data of reach loss for about 20 seconds is stored in advance.

Also, the reach production type is “reach B” for “12A” of “production pattern command”, “reach loss 12A” representing the video data of reach loss for about 30 seconds, and “12B” of “production pattern command”. On the other hand, the type of reach production is “reach B”, and the type of reach production is “reach B” with respect to “reach lose 12B” representing the video data of reach loss for about 30 seconds and “12C” of “production pattern command”. In addition, “Leach Loss 12C” representing the reach loss data of about 30 seconds is stored in advance.
Further, the type of reach effect is “reach A” with respect to “21A” of “effect pattern command”, “21A per reach” representing the big hit video data for about 22 seconds, and “21B” of “effect pattern command”. On the other hand, the type of reach production is “Reach A”, and the type of reach production is “Leach A” for “21C per reach” representing the big hit video data for about 22 seconds and “21C” of “Production pattern command”. ", 21 C per reach" representing the big hit video data for about 22 seconds is stored in advance.

  Furthermore, the type of reach effect is “reach B” for “22A” of “effect pattern command”, “22A per reach” representing the big hit video data for about 32 seconds, and “22B” of “effect pattern command”. On the other hand, the type of reach production is “reach B”, and the type of reach production is “reach B” for “22B per reach” representing the big hit video data for about 32 seconds and “22C” of “production pattern command”. ”,“ 22C per reach ”representing the big hit video data for about 32 seconds is stored in advance.

  Next, control processing of the pachinko machine 100 according to the fifth embodiment configured as described above will be described with reference to FIGS.

  First, interrupt control processing executed by the CPU 291 of the main control board 290 according to the fifth embodiment will be described with reference to FIGS. 35 to 42. 35 to 42 are flowcharts of interrupt control processing executed by the CPU 291 of the main control board 290. Here, the interrupt control process of FIG. 35 operates at regular intervals (for example, every 4 msec) after the power is turned on. 35 to 42 are stored in the ROM 292 and RAM 293 provided in the main control board 290, and are executed by the CPU 291.

  As shown in FIG. 35, first, in step (hereinafter referred to as S) 201, the CPU 291 executes a sub process of the start opening winning process. In S202, the CPU 291 executes a sub-process of the jackpot determination process. Subsequently, in S203, the CPU 291 executes the sub-process of the variation pattern selection process, and then executes the sub-process of the hold LED display process in S204. Then, the CPU 291 executes a sub process of the command transmission process in S205, and further executes a confirmation signal transmission process in S206. Thereafter, in S207, when the CPU 291 determines that the jackpot is won, the winning prize opening 139 continues for a predetermined number of times (for example, 15 times) within 29.5 seconds or 29.5 seconds each time. After executing the sub-process of the jackpot game process for performing control related to the jackpot game (special game state) that is released until the number of winning prizes at the jackpot 139 reaches 10, then in S208 via the prize ball case 59 A sub-process of a prize ball payout process for paying out a prize ball for each prize ball to each prize opening 142, 143, start opening 135, and big prize opening 139 is executed, and the process ends.

Next, the sub-process of the start opening winning process (S201) will be described with reference to FIG.
As shown in FIG. 36, first, in S211, the CPU 291 receives a pachinko ball winning of the start port 135, that is, a pachinko ball detection signal from the start port switch 135A is sent via the input / output circuit (I / O) 294. A determination process for determining whether or not an input has been made is executed.
If the pachinko ball detection signal from the start port switch 135A is not input via the input / output circuit 294 (S211: NO), the CPU 291 ends the sub-process and returns to the main flowchart.

On the other hand, if the pachinko ball detection signal from the start port switch 135A is input via the input / output circuit 294 (S211: YES), the CPU 291 proceeds to the process of S212.
In S212, the CPU 291 reads out the count value of the first hold counter 293C and executes a determination process for determining whether or not “4 or more”. If the count value of the first hold counter 293C is 4 or more (S212: YES), the CPU 291 ends the sub-process and returns to the main flowchart.
On the other hand, if the count value of the first hold counter 293C is less than 4 (S212: NO), in S213, the CPU 291 causes the big hit counter 293A, the first hold counter 293C, the reach counter 293E, the big hit special symbol selection counter 293F, A “count value acquisition process” is executed in which the count values of the variation pattern selection counter 293H, the loss symbol selection counter 293I, the reach loss symbol selection counter 293J, etc. are acquired and stored in the parameter storage area 293K.

  For example, when a pachinko ball detection signal from the start port switch 135A is input via the input / output circuit 294, the CPU 291 reads the count value of the big hit counter 293A and substitutes this count value into the algebra V. Is stored in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the first hold counter 293C, substitutes this count value for the algebra U, and stores it in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the reach counter 293E, assigns this count value to the algebra M, and stores it in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the big hit special symbol selection counter 293F, substitutes this count value for the algebra Y, and stores it in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the variation pattern selection counter 293H, substitutes this count value for the algebra H, and stores it in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the lost symbol selection counter 293I, assigns this count value to the algebra I, and stores it in the parameter storage area 293K. At the same time, the CPU 291 reads the count value of the reach lose symbol selection counter 293J, substitutes this count value for the algebra F, and stores it in the parameter storage area 293K.

In S <b> 214, the CPU 291 stores an “expectation LED display command” to be output to the CPU 281 of the sub integrated control board 280 in the RAM 293.
Subsequently, in S215, the CPU 291 reads the count value of the first hold counter 293C, adds “1”, stores it again in the first hold counter 293, ends the sub-process, and returns to the main flowchart.

Next, the sub-process of the jackpot determination process (S202) will be described with reference to FIG.
As shown in FIG. 37, first, in S221, the CPU 291 executes jackpot value acquisition processing.
In this jackpot value acquisition process, first, the CPU 291 reads a probability variation flag (“0” is assigned to the probability variation flag when the power is turned on) stored in the RAM 293. If the probability variation flag read from the RAM 293 is ON, that is, “1”, it is determined that the probability variation mode is selected, and the “probability large hit value” stored in the ROM 292 in advance (in the case of the fifth embodiment). Are “1”, “3”, “5”, and “7”), and the “probability variation jackpot value” is stored in the parameter storage area 293K as “jackpot value”. On the other hand, when the probability variation flag read from the RAM 293 is OFF, that is, “0”, it is determined that the normal mode is set, and the “normal jackpot value” stored in the ROM 292 in advance (in the case of the fifth embodiment). Is “7”), and this “ordinary jackpot value” is stored in the parameter storage area 293K as a “jackpot value”.

Subsequently, in S222, the CPU 291 executes a determination process for determining whether or not it is a “big hit”.
In the determination process of whether or not this is a “big hit”, first, the algebra V as the “big hit count value” is read from the parameter storage area 293K. Then, it is determined whether or not the algebra V matches any of the “big hit values” stored in the parameter storage area 293K. If they match, the jackpot algebra Q (when the power is turned on, “0” is substituted for the jackpot algebra Q) is stored in the parameter storage area 293K by substituting “1”. Then, “0” is substituted into the jackpot algebra Q and stored in the parameter storage area 293K.
Therefore, in the normal mode gaming state, the lottery probability of “big hit” is 1/360. In the case of the gaming state in the probability variation mode, the lottery probability of “big hit” is 4/360. As a result, in the probability variation mode, the probability of being a “hit” is about four times that in the normal mode gaming state.

Then, the jackpot algebra Q is read again from the parameter storage area 293K, and it is determined whether the jackpot algebra Q is “0” or “1”. That is, it is determined whether or not “big hit” has occurred.
When the jackpot algebra Q is “1”, it is determined that a “jackpot” has occurred (S222: YES), and in S223, the CPU 291 reads the jackpot flag from the RAM 293 and turns on the jackpot flag. That is, “1” is substituted into the jackpot flag and stored in the RAM 293 again. When the pachinko machine 100 is activated or reset, the jackpot flag is set to OFF, that is, “0” is substituted for the jackpot flag and stored in the RAM 293.
In S224, the CPU 291 reads the algebra Y as the jackpot symbol selection count value from the parameter storage area 293K, selects the “jackpot symbol” corresponding to the algebra Y stored in the ROM 292, and finally determines the jackpot notification. After storing in the RAM 293 as the symbol data of the stop symbol, the sub-process is terminated and the process returns to the main flowchart.

On the other hand, when the jackpot algebra Q read again from the parameter storage area 293K in S222 is “0”, it is determined that “losing” has occurred (S222: NO), and in S225, the CPU 291 reads from the RAM 293. The jackpot flag is read and the jackpot flag is turned off, that is, “0” is substituted into the jackpot flag and stored in the RAM 293 again.
Then, in S226, the CPU 291 displays the change state at this time in a reach state in which two of the three symbols of the change symbol are aligned (for example, “5 ↓ 5”, “7 ↓ 7”, etc. It is determined whether or not to display a loss (for example, “545” or “737”) after “↓” means that the symbol is rotating).
This determination is made by reading the algebra H as the count value of the variation pattern selection counter 293H stored in the parameter storage area 293K, and when the count value of the variation pattern selection counter 293H is “90 to 99”, after the reach state It is determined that a loss is displayed (S226: YES), and in S227, the CPU 291 selects a reach loss symbol. The selection of the reach lose symbol is performed by reading the algebra F as the count value of the reach lose symbol selection counter 293J from the parameter storage area 293K, reading the reach lose symbol corresponding to this count value from the ROM 292, and as the symbol data of the final stop symbol of the reach lose notification. After storing in the RAM 293, the sub-process is terminated and the process returns to the main flowchart.

  On the other hand, in S226, the algebra H as the count value of the variation pattern selection counter 293H stored in the parameter storage area 293K is read, and when the count value of the variation pattern selection counter 293H is “0 to 89”, complete loss Is displayed (S226: NO), and in S228, the CPU 291 selects a complete loss symbol. The selection of the complete loss symbol is performed by reading the algebra I as the count value of the loss symbol selection counter 293I from the parameter storage area 293K, reading the complete loss symbol corresponding to the count value from the ROM 292, and displaying the final stop symbol of the complete loss notification. After storing in the RAM 293 as symbol data, the sub-process is terminated and the process returns to the main flowchart.

Next, the sub-process of the variation pattern selection process (S203) will be described with reference to FIG.
As shown in FIG. 38, first, in S231, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. . When the pachinko machine 100 is started up or reset, “0” is assigned to the variation processing flag and stored in the RAM 293.
If the variable processing flag read from the RAM 293 in S231 is ON, that is, “1” (S231: YES), the CPU 291 ends the sub-processing and returns to the main flowchart.

  On the other hand, when the fluctuation processing flag read from the RAM 293 in S231 is OFF, that is, “0” (S231: NO), in S232, the CPU 291 reads the jackpot algebra Q from the parameter storage area 293K, It is determined whether the jackpot algebra Q is “0” or “1”, that is, whether or not “big jackpot” has occurred, and when it is determined that a jackpot has occurred, that is, when the jackpot algebra Q is “1” (S232: YES), the process proceeds to S233.

Subsequently, in S233, the CPU 291 reads the algebra H as the count value of the variation pattern selection counter 293H from the parameter storage area 293K, and the sub integrated control board from the big hit variation pattern group of the variation pattern determination table 171 based on the count value. After selecting a variation pattern command to be output as instruction information to the CPU 281 of 280 and storing it in the RAM 293, the sub-process is terminated and the process returns to the main flowchart.
For example, when the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “0 to 39”, the CPU 291 selects the variation pattern command 21 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293. When the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “40 to 99”, the CPU 291 selects the variation pattern command 22 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.

On the other hand, if the CPU 291 determines in S232 that no jackpot has occurred, that is, if the jackpot algebra Q is “0” (S232: NO), the process proceeds to S234.
In S234, the CPU 291 reads the algebra H as the count value of the variation pattern selection counter 293H from the parameter storage area 293K, and based on this count value, the complete loss variation pattern and the reach loss variation pattern group of the variation pattern determination table 171 The change pattern command to be output as instruction information to the CPU 281 of the sub-integrated control board 280 is selected and stored in the RAM 293, and then the sub-process is terminated and the process returns to the main flowchart.

For example, when the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “0 to 89”, the CPU 291 selects the variation pattern command 1 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.
Further, when the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “90 to 95”, the CPU 291 selects the variation pattern command 11 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.
When the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “96 to 99”, the CPU 291 selects the variation pattern command 12 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.

Next, the sub-process of the hold LED display process (S204) will be described with reference to FIG.
As shown in FIG. 39, first, in S241, the CPU 291 reads the count value of the first hold counter 293C and stores it in the RAM 293.
Subsequently, in S242, the CPU 291 reads the count value of the first hold counter 293C again from the RAM 293, and executes a determination process for determining whether or not the count value is “4”. If the count value of the first hold counter 293C is “4” (S242: YES), in S243, the CPU 291 turns on the first hold LED 111 to the fourth hold LED 114, and then ends the sub-process. To return to the main flowchart.

On the other hand, when the count value of the first hold counter 293C is not “4” (S242: NO), the CPU 291 proceeds to the process of S244.
In S244, the CPU 291 reads the count value of the first hold counter 293C again from the RAM 293, and executes determination processing for determining whether or not the count value is “3”. If the count value of the first hold counter 293C is “3” (S244: YES), in S245, the CPU 291 turns on the first hold LED 111 to the third hold LED 113 and turns off the fourth hold LED 114. After that, the sub-process is terminated and the process returns to the main flowchart.

On the other hand, when the count value of the first hold counter 293C is not “3” (S244: NO), the CPU 291 proceeds to the process of S246.
In S246, the CPU 291 reads the count value of the first hold counter 293C again from the RAM 293, and executes a determination process for determining whether or not the count value is “2”. When the count value of the first hold counter 293C is “2” (S246: YES), in S247, the CPU 291 turns on the first hold LED 111 to the second hold LED 112, and the third hold LED 113 to the second hold LED. After the 4 hold LED 114 is turned off, the sub-process is terminated and the process returns to the main flowchart.

On the other hand, when the count value of the first hold counter 293C is not “2” (S246: NO), the CPU 291 proceeds to the process of S248.
In S248, the CPU 291 reads the count value of the first hold counter 293C again from the RAM 293, and executes a determination process for determining whether or not the count value is “1”. If the count value of the first hold counter 293C is “1” (S248: YES), in S249, the CPU 291 turns on the first hold LED 111 and turns off the second hold LED 112 to the fourth hold LED 114. After that, the sub-process is terminated and the process returns to the main flowchart.
On the other hand, when the count value of the first hold counter 293C read from the RAM 293 is not “1”, that is, “0” (S248: NO), in S250, the CPU 291 sets the first hold LED 111 to the fourth hold LED 114. After the light is turned off, the sub-process is terminated and the process returns to the main flowchart.

Next, the sub-process of the command transmission process (S205) will be described with reference to FIG.
As shown in FIG. 40, first, in S261, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. .
If the variable processing flag read from the RAM 293 in S261 is OFF, that is, “0” (S261: NO), the CPU 291 sends the instruction information from the RAM 293 to the CPU 281 of the sub integrated control board 280 in S262. Are read out, and the symbol data of the final stop symbol is read out, and the symbol data of the final stop symbol is output to the CPU 281 of the sub-integrated control board 280.
In S263, the CPU 291 reads the count value of the first hold counter 293C, subtracts “1” from the count value, and stores it again in the first hold counter 293C.

Subsequently, in S264, the CPU 291 starts measuring the effect display time corresponding to the change pattern command output to the CPU 281, that is, the change times of a plurality of change symbols displayed on the liquid crystal display 110.
In S265, the CPU 291 reads the variation processing flag from the RAM 293, turns on the variation processing flag, that is, substitutes “1” for the variation processing flag and stores it again in the RAM 293. The process ends and the process returns to the main flowchart.
On the other hand, when the variable processing flag read from the RAM 293 in S261 is ON, that is, “1” (S261: YES), the CPU 291 proceeds to the process of S266.
In S266, the CPU 291 reads the expected LED display command from the RAM 293, outputs the expected LED display command to the CPU 281 of the sub integrated control board 280, ends the sub processing, and returns to the main flowchart.

Next, the sub-process of the confirmation signal transmission process (S206) will be described with reference to FIG.
As shown in FIG. 41, first, in S271, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. .
If the variable processing flag read from the RAM 293 in S271 is OFF, that is, “0” (S271: NO), the CPU 291 ends the sub-process and returns to the main flowchart.

On the other hand, when the variable processing flag read from the RAM 293 in S271 is ON, that is, “1” (S271: YES), the CPU 291 proceeds to the process of S272.
Subsequently, in S272, the CPU 291 reads the effect time corresponding to the variation pattern command output as instruction information from the ROM 292 to the CPU 281, and whether or not the measurement time when the measurement is started in the process of S264 is equal to or longer than this effect time. That is, a determination process for determining whether or not the three columns of the changing symbols displayed on the liquid crystal display 110 are stopped and displayed is executed.
For example, when the variation pattern command 1 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time for which the measurement is started in the process of S 264 has become 5 seconds or more. When the fluctuation pattern command 11 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time when measurement is started in the process of S264 is 20 seconds or longer. When the variation pattern command 12 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which the measurement is started in the process of S264 is 30 seconds or longer. When the variation pattern command 21 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which measurement is started in the process of S264 has been 22 seconds or longer. When the variation pattern command 22 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which measurement is started in the process of S264 has been 32 seconds or longer.

If the measurement time when measurement is started in the process of S264 is not equal to or longer than the effect time read from the ROM 292 (S272: NO), the CPU 291 ends the sub-process and returns to the main flowchart.
On the other hand, when the measurement time started in the process of S264 is equal to or longer than the effect time read from the ROM 292 (S272: YES), the CPU 291 stops the liquid crystal display 110 with respect to the CPU 281 in S273. A confirmation signal for instructing to confirm and display each displayed special symbol is output.
In S274, the CPU 291 reads the variation processing flag from the RAM 293, turns off the variation processing flag, that is, substitutes “0” for the variation processing flag and stores it again in the RAM 293. The process ends and the process returns to the main flowchart.

Next, the sub-process of the jackpot game process (S207) will be described with reference to FIG.
As shown in FIG. 42, first, in S281, the CPU 291 reads a jackpot flag from the RAM 293, and executes a determination process for determining whether or not the jackpot flag is ON, that is, “1”. If the jackpot flag read from the RAM 293 is OFF (S281: NO), the CPU 291 ends the sub-process and returns to the main flowchart.
On the other hand, when the jackpot flag read from the RAM 293 is ON (S281: YES), in S282, the CPU 291 opens the open / close door 138 upward via the open / close door solenoid 138A to open the big prize opening 139.
In step S283, the CPU 291 reads the algebra R indicating the number of consecutive openings of the big prize opening 139 from the RAM 293, adds “1” to the algebra R, and stores the algebra R in the RAM 293 again. When the pachinko machine 100 is started up or reset, “0” is substituted for the algebra R representing the number of consecutive opening of the special winning opening 139 and stored in the RAM 293.

Subsequently, in S284, the CPU 291 executes a determination process for determining whether or not a winning is made in the V port, that is, whether or not a winning detection signal is input from the V switch 139B via the input / output circuit 294.
When a winning detection signal is input from the V switch 139B via the input / output circuit 294 (S64: YES), in S285, the CPU 291 reads the V flag from the RAM 293 and turns this V flag on. That is, “1” is substituted into the V flag and stored in the RAM 293 again. When the pachinko machine 100 is started or reset, the V flag is set to OFF, that is, “0” is substituted for the V flag and stored in the RAM 293.
Thereafter, in S286, the CPU 291 reads the algebra V1 representing the total number of winning prizes to the big winning opening 139 from the RAM 293, adds “1” to the algebra V1, stores it in the RAM 293 again, and then proceeds to the processing of S288. . When the pachinko machine 100 is activated or reset, “0” is substituted into the algebra V1 representing the total number of winning prizes to the big winning opening 139 and stored in the RAM 293.

On the other hand, when the winning detection signal is not input from the V switch 139B via the input / output circuit 294 in S284 (S284: NO), the CPU 291 proceeds to the process of S287.
In S287, the CPU 291 executes a determination process for determining whether or not a prize winning opening 139 has been won, that is, whether or not a prize winning detection signal is input from the prize winning opening switch 139A via the input / output circuit 294.
When a winning detection signal is input from the large winning opening switch 139A via the input / output circuit 294 (S287: YES), the CPU 291 proceeds to the process of S288 after executing the process of S286.
On the other hand, if the winning detection signal is not input from the large winning opening switch 139A via the input / output circuit 294 in S287 (S287: NO), the CPU 291 proceeds to the process of S288.

Subsequently, in S288, the CPU 291 reads an algebra V1 representing the total number of winning prizes to the big winning opening 139 from the RAM 293, and determines whether or not the algebra V1 is less than 10, that is, the winning quantity to the big winning opening 139. A determination process for determining whether the total number is 9 or less is executed. Note that the upper limit number of winning prizes to the big prize opening 139 when the big prize opening 139 is opened is preset to ten.
If the algebra V1 read from the RAM 293 is less than 10 (S288: YES), in S289, the CPU 291 determines whether or not 29.5 seconds or more have elapsed since the special winning opening 139 was opened. Execute the judgment process. Then, when 29.5 seconds or more have not elapsed since the special winning opening 139 was opened (S289: NO), the CPU 291 executes the processing subsequent to S284 again.
On the other hand, when 29.5 seconds or more have elapsed after the special winning opening 139 is opened (S289: YES), the CPU 291 proceeds to the process of S290.
On the other hand, when the algebra V1 read from the RAM 293 in S288 is 10 or more (S288: NO), the CPU 291 proceeds to the process of S290.

Subsequently, in S290, the CPU 291 closes the open / close door 138 via the open / close door solenoid 138A and closes the special winning opening 139.
In S291, the CPU 291 reads an algebra V1 representing the total number of winning prizes from the RAM 293 to the big prize opening 139, substitutes “0” for the algebra V1, and stores it in the RAM 293 again.
Thereafter, in S292, the CPU 291 reads out the V flag from the RAM 293, and executes a determination process for determining whether or not the V flag is ON, that is, whether or not the V opening is won while the big winning opening 139 is opened. When the V flag read from the RAM 293 is ON, that is, when the V flag is “1” (S292: YES), the CPU 291 proceeds to the process of S293.
In S293, the CPU 291 reads an algebra R indicating the number of consecutive opening of the big prize opening 139 from the RAM 293, and whether or not the algebra R is larger than “14”, that is, the big winning opening 139 is continuously opened 15 times. Determination processing for determining whether or not has been performed is executed. When the algebra R read from the RAM 293 is “14” or less (S293: NO), the CPU 291 executes the processing after S281 again.
On the other hand, when the algebra R read from the RAM 293 is larger than “14” (S293: YES), the CPU 291 proceeds to the process of S294.
On the other hand, when the V flag read from the RAM 293 is OFF in S292, that is, when the V flag is “0” (S292: NO), the CPU 291 proceeds to the process of S294.

In S294, the CPU 291 reads the V flag from the RAM 293 and turns off the V flag, that is, substitutes “0” for the V flag and stores it again in the RAM 293.
In S295, the CPU 291 reads an algebra R indicating the number of consecutive opening of the big prize opening 139 from the RAM 293, substitutes “0” for the algebra R, and stores it in the RAM 293 again. That is, the algebra R is initialized.
Further, in S296, the CPU 291 reads the jackpot flag from the RAM 293, turns off the jackpot flag, that is, assigns “0” to the jackpot flag, stores it in the RAM 293 again, terminates the sub-processing, and performs the main processing. Return to the flowchart.

  Next, the control processing executed when the CPU 281 of the sub-integrated control board 280 receives each command such as a “fluctuation pattern command” representing a fluctuation pattern as instruction information from the CPU 291 of the main control board 290 is shown in FIG. 43 to FIG. 46 will be described. Here, the interrupt control process of FIG. 43 operates at regular intervals (for example, every 4 msec) after the power is turned on. 43 to 46 are stored in the ROM 282 and RAM 283 provided in the sub-integrated control board 280 and executed by the CPU 281.

As shown in FIG. 43, first, in S311, the CPU 281 of the sub-integrated control board 280 receives the “variation pattern command”, “final stop symbol instruction”, “expectation LED display command” input from the CPU 291 of the main control board 290. ”,“ Confirmation signal ”and the like are stored in the RAM 283.
Subsequently, in S312, the CPU 281 reads the instruction information from the RAM 283 again, and executes a determination process for determining whether the instruction information is a “confirmation signal”.
In S312, when the instruction information read from the RAM 283 is a “confirmation signal” (S312: YES), in S313, the CPU 281 outputs the “confirmation signal” as display instruction information to the CPU 261 (instructions). ), The process ends.

On the other hand, when the instruction information is not a “confirmation signal” (S312: NO), in S314, the CPU 281 executes a sub process of the effect instruction process.
In S315, the CPU 281 executes the sub process of the expectation LED display process 1 and then executes the sub process of the expectation LED display process 2 in S316 and ends the process.

Next, the sub-process of the effect instruction process (S314) will be described with reference to FIG.
As shown in FIG. 44, first, in S321, the CPU 281 substitutes the count value of the effect pattern selection counter 283A when the variation pattern command is input from the CPU 291 into the effect pattern algebra E, and stores it in the parameter storage area 283B of the RAM 283. Remember.

  Further, in S322, the CPU 281 reads out the “variation pattern command” and the “final stop symbol instruction” as the instruction information from the RAM 283, and also reads the effect pattern algebra E from the parameter storage area 283B. Then, the “effect pattern command” of the corresponding effect pattern is output from the effect pattern selection table 172 (see FIG. 33) to the CPU 261 of the effect display board 260 and stored in the RAM 283 as an effect pattern command of display instruction information. At the same time, the “lighting addition number” and the “lighting upper limit number” corresponding to the corresponding “effect pattern command” are stored in the RAM 283.

  For example, the “variation pattern command” read from the RAM 283 is “1”, the “final stop symbol instruction” is “123” for notifying complete loss, and the effect pattern algebra E read from the parameter storage area 283B is “0”. In any case of “13”, the CPU 281 stores “1A” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, “0” is stored in the RAM 283 as “lighting addition number” corresponding to this “effect pattern command 1A”, and “15” is stored as “lighting upper limit number”.

Further, the “variation pattern command” read from the RAM 283 is “11”, the “final stop symbol information” is “787” for notifying reach loss, and the effect pattern algebra E read from the parameter storage area 283B is “9”. In this case, the CPU 281 stores “11B” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, “+6” is stored in the RAM 283 as the “lighting addition number” corresponding to the “effect pattern command 11B”, and “20” is stored as the “lighting upper limit number”.
The “variation pattern command” read from the RAM 283 is “12”, the “final stop symbol information” is “212” for notifying reach loss, and the effect pattern algebra E read from the parameter storage area 283B is “12”. In this case, the CPU 281 stores “12C” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, “+15” is stored in the RAM 283 as the “lighting addition number” corresponding to the “effect pattern command 12C”, and “25” is stored as the “lighting upper limit number”.

Further, the “variation pattern command” read from the RAM 283 is “21”, the “final stop symbol information” is “333” for notifying the big hit, and the effect pattern algebra E read from the parameter storage area 283B is “5”. In this case, the CPU 281 stores “21B” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, “+20” is stored in the RAM 283 as the “lighting addition number” corresponding to the “effect pattern command 21B”, and “30” is stored as the “lighting upper limit number”.
Further, the “variation pattern command” read from the RAM 283 is “22”, the “final stop symbol information” is “666” for notifying the big hit, and the effect pattern algebra E read from the parameter storage area 283B is “13”. In this case, the CPU 281 stores “22C” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, “+30” is stored in the RAM 283 as the “lighting addition number” corresponding to the “effect pattern command 22C”, and “30” is stored as the “lighting upper limit number”.

Thereafter, in S323, the CPU 281 reads out the “effect pattern command” and the “final stop symbol information” from the RAM 283, outputs (instructs) to the CPU 261 of the effect display board 260, and ends the processing.
For example, when “1A” is read as the “effect pattern command” from the RAM 283, the CPU 281 outputs the effect pattern command “1A” and “final stop symbol information” to the CPU 261 as display instruction information. Further, when “11B” is read as the “effect pattern command” from the RAM 283, the effect pattern command “11B” and “final stop symbol information” are output to the CPU 261 as display instruction information.

Next, a sub-process of the expectation LED display process 1 (S315) will be described with reference to FIG.
As shown in FIG. 45, first, in S331, the CPU 281 reads the instruction information from the RAM 283 again, and executes a determination process for determining whether or not the instruction information is a “variation pattern command”.
If the instruction information read from the RAM 283 is not a “variation pattern command” in S331 (S331: NO), the CPU 281 ends the sub-process and returns to the main flowchart.
On the other hand, when the instruction information read from the RAM 283 is “variation pattern command” in S331 (S331: YES), in S332, the CPU 281 reads the “upper lighting limit number” from the RAM 283, and sets the “upper lighting limit number”. Substituting the lighting upper limit algebra MAX into the RAM 283.
When the pachinko machine 100 is activated, “0” is substituted for the lighting upper limit algebra MAX and stored in the RAM 283.

Subsequently, in S333, the CPU 281 reads from the RAM 283 the lighting number algebra X representing the number of the LED LEDs LL1 to LL30 and LR1 to LR30 that are lit, and the lighting upper limit algebra MAX, and the lighting number algebra X is lit. A determination process for determining whether or not the upper limit algebra MAX is exceeded is executed.
When the pachinko machine 100 is activated, “0” is substituted for the lighting number algebra X and stored in the RAM 283.

  Here, each expectation degree LEDLL1 to LL30, LR1 to LR30 is a pair of each expectation degree LEDLL1, LR1, each expectation degree LEDLL2, LR2, each expectation degree LEDLL3, LR3,. Each expectation degree LEDLL29, LR29 and each expectation degree LEDLL30, LR30 are configured to be sequentially lit upward. Then, when all the expected degrees LEDLL1 to LL30 and LR1 to LR30 are turned off, “0” is assigned to the lighting number algebra X and stored in the RAM 283. In addition, when the pair of expectations LEDLL1 and LR1 is lit, “1” is assigned to the lighting number algebra X and stored in the RAM 283. In addition, when each of the expectations LEDs LL <b> 1 to LL <b> 2 and LR <b> 1 to LR <b> 2 is lit, “2” is substituted for the lighting number algebra X and stored in the RAM 283. In addition, when each of the expected degrees LEDLL1 to LL3 and LR1 to LR3 is lit, “3” is substituted for the lighting number algebra X and stored in the RAM 283. Therefore, when all of the expected degrees LEDLL1 to LL30 and LR1 to LR30 are lit, “30” is substituted into the lighting number algebra X and stored in the RAM 283.

If the lighting number algebra X is equal to or greater than the lighting upper limit algebra MAX in S333 (S333: YES), the CPU 281 proceeds to the process of S334.
In S334, the CPU 281 moves to the process of S338 after turning off the left and right expectation LEDs for the number exceeding the lighting upper limit algebra MAX.
For example, when the lighting upper limit algebra MAX is “15” and the lighting number algebra X is “17”, the respective expected degrees LEDLL16 to LL17, LR16 to LR17 are extinguished, and the respective expected degrees LEDLL1 to LL15, LR1 to LR15 are set. Illuminated. Further, when the lighting upper limit algebra MAX is “20” and the lighting number algebra X is “23”, each of the expected LEDs LEDLL21 to LL23, LR21 to LR23 is turned off, and each of the expected LEDs LEDLL1 to LL20, LR1 to LR20 is set. Illuminated.

On the other hand, when the lighting number algebra X is less than the lighting upper limit algebra MAX in S333 (S333: NO), the CPU 281 proceeds to the process of S335.
In S335, the CPU 281 reads the lighting number algebra X, the lighting upper limit algebra MAX, and the “lighting addition number” from the RAM 283, and whether the numerical value obtained by adding the “lighting addition number” to the lighting number algebra X is equal to or higher than the lighting upper limit algebra MAX. A determination process for determining whether or not is executed.
When the numerical value obtained by adding the “lighting addition number” to the lighting number algebra X is equal to or greater than the lighting upper limit algebra MAX (S335: YES), the CPU 281 proceeds to the process of S336.
In S336, the CPU 281 additionally lights each expectation degree LED by the number equal to the number of additional points, using a numerical value obtained by subtracting the lighting number algebra X from the lighting upper limit algebra MAX as an additional lighting number. Further, the lighting number algebra X and the lighting upper limit algebra MAX are read out from the RAM 283, the value of the lighting upper limit algebra MAX is substituted into the lighting number algebra X, the value is stored in the RAM 283 again, and the process proceeds to S338.

For example, when the lighting number algebra X is “17”, the lighting upper limit algebra MAX is “20”, and the “lighting addition number” is “+4”, the expectation LEDs LL1 to LL17 and LR1 to LR17 are lit. To the state where each expectation degree LEDLL1 to LL20, LR1 to LR20 is turned on. In addition, when each of the expectation degree LEDs LL20 to LL25 and LR20 to LR25 is turned on, each electric lamp 153 is turned on. In this case, each electric lamp 153 is also turned on. The
In addition, when the lighting number algebra X is “17”, the lighting upper limit algebra MAX is “30”, and the “lighting addition number” is “+15”, the respective expectations LEDLL1 to LL17 and LR1 to LR17 are lit. To the state where each expectation degree LEDLL1 to LL30, LR1 to LR30 is turned on. In addition, when each of the expected degree LEDs LL26 to LL30 and LR26 to LR30 is turned on, each of the illumination lamps 152 is turned on. In this case, each of the illumination lamps 152 is also lit. The

On the other hand, when the numerical value obtained by adding the “lighting addition number” to the lighting number algebra X in S335 is less than the lighting upper limit algebra MAX (S335: NO), the CPU 281 proceeds to the process of S337.
In S <b> 337, the CPU 281 additionally lights each expectation degree LED by the number equal to the number of additional points, using the “lighting addition number” as the additional lighting number. Further, the lighting number algebra X is read from the RAM 283, the “lighting addition number” is added to the lighting number algebra X, and the result is stored in the RAM 283 again. Then, the process proceeds to S 338.

For example, when the lighting number algebra X is “12”, the lighting upper limit algebra MAX is “20”, and the “lighting addition number” is “+4”, the respective expectations LEDLL1 to LL12, LR1 to LR12 are lit. To the state in which each of the expectations LEDs LL1 to LL16 and LR1 to LR16 is turned on. In this case, the electric lamps 152 and 153 are turned off.
In addition, when the lighting number algebra X is “13”, the lighting upper limit algebra MAX is “30”, and the “lighting addition number” is “+15”, the respective expected degrees LEDLL1 to LL13 and LR1 to LR13 are lit. To the state where each expectation degree LEDLL1-LL28, LR1-LR28 is turned on. In addition, when each of the expected degree LEDs LL26 to LL30 and LR26 to LR30 is turned on, each of the illumination lamps 152 is turned on. In this case, each of the illumination lamps 152 is also lit. The

In S338, the CPU 281 reads out the count value of the timer counter as the measuring means from the RAM 283, substitutes “0” for the count value and stores it again in the RAM 283, that is, after initializing the timer counter, The process ends and the process returns to the main flowchart.
The timer counter is a counter that measures time based on a clock signal input from the clock circuit 285.

Next, the sub-process of the expectation LED display process 2 (S316) will be described with reference to FIG.
As shown in FIG. 46, first, in S341, the CPU 281 reads the instruction information from the RAM 283 again, and executes a determination process for determining whether or not the instruction information is an “expected degree LED display command”.
If the instruction information read from the RAM 283 is “expectation LED display command” in S341 (S341: YES), the CPU 281 proceeds to the process of S342.
In S <b> 342, the CPU 281 reads out the “lighting upper limit number” from the RAM 283, assigns the “lighting upper limit number” to the lighting upper limit algebra MAX, and stores it in the RAM 283.
Subsequently, in S343, the CPU 281 reads from the RAM 283 the lighting number algebra X representing the number of lighting of each of the expected degrees LEDs LL1 to LL30, LR1 to LR30 and the lighting upper limit algebra MAX, and the lighting number algebra X is turned on. A determination process for determining whether or not the upper limit algebra MAX is exceeded is executed.
If the lighting number algebra X is greater than or equal to the lighting upper limit algebra MAX in S343 (S343: YES), the CPU 281 ends the sub-process and returns to the main flowchart.

On the other hand, if the lighting number algebra X is less than the lighting upper limit algebra MAX in S343 (S343: NO), the CPU 281 proceeds to the process of S344.
In S344, the CPU 281 executes a determination process for determining whether or not the numerical value obtained by adding “1” to the lighting number algebra X is equal to or greater than the lighting upper limit algebra MAX.
If the numerical value obtained by adding “1” to the lighting number algebra X is equal to or higher than the lighting upper limit algebra MAX (S344: YES), in S345, the CPU 281 uses the lighting upper limit algebra MAX as the lighting number to the left and right of the lighting number. Each expectation LED is turned on. Further, the CPU 281 substitutes the numerical value of the lighting upper limit algebra MAX for the lighting number algebra X and stores it again in the RAM 283, and then proceeds to the processing of S347.
For example, when the lighting upper limit algebra MAX is “15” and the lighting number algebra X is “15”, the respective expectations LEDLL1 to LL15 and LR1 to LR15 are turned on.

On the other hand, when the numerical value obtained by adding “1” to the lighting number algebra X is less than the lighting upper limit algebra MAX in S344 (S344: NO), the CPU 281 adds “1” to the lighting number algebra X in S346. Using the numerical value as the number of lighting, the left and right expectation LEDs corresponding to the number of lighting are turned on. Further, the CPU 281 adds “1” to the lighting number algebra X, stores it in the RAM 283 again, and then proceeds to the processing of S347.
For example, when the lighting upper limit algebra MAX is “15” and the lighting number algebra X is “10”, the respective expected degrees LEDLL1 to LL11 and LR1 to LR11 are turned on.

  In S347, the CPU 281 reads out the count value of the timer counter as the measuring means from the RAM 283, assigns “0” to the count value and stores it again in the RAM 283, that is, after initializing the timer counter, The process ends and the process returns to the main flowchart.

On the other hand, if the instruction information read from the RAM 283 is not the “expected degree LED display command” in S341 (S341: NO), the CPU 281 proceeds to the process of S348.
In S348, the CPU 281 reads the count value of the timer counter as the measuring means from the RAM 283, and whether or not the count value has reached a predetermined value, that is, whether or not a predetermined time (for example, about 30 seconds to 3 minutes) has elapsed. A determination process for determining
If the count value of the timer counter does not reach the predetermined value, that is, if the predetermined time has not elapsed (S348: NO), the CPU 281 ends the sub-process and returns to the main flowchart.

On the other hand, when the count value of the timer counter reaches a predetermined value, that is, when a predetermined time has elapsed (S348: YES), the CPU 281 proceeds to the process of S349.
In step S349, the CPU 281 turns off the uppermost expectation LEDs among the expectation LEDs lit on the left and right of the liquid crystal display 110. At the same time, the CPU 281 reads the lighting number algebra X from the RAM 283, subtracts “1” from the lighting number algebra X, and stores it again in the RAM 283.
For example, when each of the expected degrees LEDLL1 to LL17 and LR1 to LR17 is turned on, the expected degrees LEDLL17 and LR17 are turned off, and only the expected degrees LEDLL1 to LL16 and LR1 to LR16 are turned on.
Subsequently, in S350, the CPU 281 reads out the count value of the timer counter as the measuring means from the RAM 283, substitutes “0” for the count value and stores it again in the RAM 283, that is, after initializing the timer counter, End the sub-process and return to the main flowchart.

  Next, control processing executed when the CPU 261 of the effect display board 260 configured as described above receives display instruction information from the CPU 281 of the sub-integrated control board 280 will be described with reference to FIG. 47 is stored in the ROM 262 and the RAM 263 provided in the effect display board 260 and is executed by the CPU 261.

As shown in FIG. 47, first, in S401, when the display instruction information is input from the CPU 281 of the sub-integrated control board 280, the CPU 261 displays an effect pattern command that constitutes the display instruction information, and a pattern that changes and stops display. Is stored in the RAM 263.
Next, in S402, the CPU 261 reads out the effect pattern command from the RAM 263, and executes a determination process for determining whether the effect pattern command is an effect pattern command corresponding to complete loss. Specifically, the CPU 261 executes a determination process for determining whether or not the effect pattern command read from the RAM 263 is “1A”.

If the effect pattern command read from the RAM 263 is “1A” (S402: YES), in S403, the CPU 261 executes a sub-process of “completely lost display process”.
In the sub-process of the “completely lost display process”, first, the CPU 261 reads out the “effect pattern command” and the “final stop symbol” as display instruction information from the RAM 263 again. Then, the “effect display pattern” corresponding to the “effect pattern command” is read from the effect display pattern table 173 (see FIG. 34) stored in the effect display pattern table storage area 262A of the ROM 262 and stored in the RAM 263. Subsequently, the CPU 261 reads the “effect display pattern” from the RAM 263 again, reads out the moving image data corresponding to the “effect display pattern” from the ROM 262 and displays it on the liquid crystal display 110, and a predetermined effect display time has elapsed. In this case, display control is performed so that the “final stop symbol” is stopped and displayed.

  For example, when the “effect pattern command” and the “final stop pattern” as the display instruction information are “1A” and “158”, the CPU 261 reads “complete loss” as the “effect display pattern” from the effect display pattern table 173. A ”is read out, and the moving image data corresponding to this“ complete loss A ”is read from the ROM 262 and displayed on the liquid crystal display 110. When the effect display time of about 5 seconds elapses, the loss pattern of“ 158 ”is displayed. The display is controlled so that is stopped.

Subsequently, in S404, the CPU 261 executes a determination process for determining whether or not a confirmation signal is input from the CPU 281 of the sub-integrated control board 280.
If the confirmation signal is not input from the CPU 281 (S404: NO), the CPU 261 continues to display the moving image displayed on the liquid crystal display 110 in S405. On the other hand, when the confirmation signal is input from the CPU 281 (S404: YES), in S406, the CPU 261 performs the confirmation stop display of the moving image display, and then ends the processing.

On the other hand, when the effect pattern command read from the RAM 263 is not “1A” in S402 (S402: NO), the CPU 261 proceeds to the process of S407.
In step S407, the CPU 261 reads out the effect pattern command from the RAM 263, and executes a determination process for determining whether the effect pattern command is an effect pattern command corresponding to reach lose. Specifically, the CPU 261 executes a determination process for determining whether or not the effect pattern commands read from the RAM 263 are “11A” to “11C” and “12A” to “12C”.

When the effect pattern commands read from the RAM 263 are “11A” to “11C” and “12A” to “12C” (S407: YES), in S408, the CPU 261 performs a sub-process of “reach loss display process”. Is executed, the processing after S404 is executed.
In the sub-process of this “reach loss display process”, first, the CPU 261 reads the “effect pattern command” and the “final stop symbol” as display instruction information from the RAM 263 again. Then, the “effect display pattern” corresponding to the “effect pattern command” is read from the effect display pattern table 173 (see FIG. 34) stored in the effect display pattern table storage area 262A of the ROM 262 and stored in the RAM 263. Subsequently, the CPU 261 reads the “effect display pattern” from the RAM 263 again, reads out the moving image data corresponding to the “effect display pattern” from the ROM 262 and displays it on the liquid crystal display 110, and a predetermined effect display time has elapsed. In this case, display control is performed so that the “final stop symbol” is stopped and displayed.

  For example, when the “effect pattern command” and the “final stop pattern” as the display instruction information are “11A” and “767”, the CPU 261 sets “reach loss 11A” as the “effect display pattern” from the effect display pattern table 173. Is read out from the ROM 262 and displayed on the liquid crystal display 110. When an effect display time of about 20 seconds elapses, the reach loss symbol of “767” is stopped. Control display so that it is displayed. When the “effect pattern command” and the “final stop pattern” as the display instruction information are “12B” and “545”, the CPU 261 reads “reach lose 12B” as the “effect display pattern” from the effect display pattern table 173. Is read out from the ROM 262 and displayed on the liquid crystal display 110. When an effect display time of about 30 seconds elapses, the reach loss pattern of “545” is stopped. Control display so that it is displayed.

On the other hand, if the effect pattern commands read from the RAM 263 are not “11A” to “11C” and “12A” to “12C” in S407 (S407: NO), the CPU 261 proceeds to the process of S409.
In step S409, the CPU 261 reads out the effect pattern command from the RAM 263, and executes a determination process for determining whether the effect pattern command is an effect pattern command corresponding to a jackpot. Specifically, the CPU 261 executes determination processing for determining whether or not the effect pattern commands read from the RAM 263 are “21A” to “21C” and “22A” to “22C”.

When the effect pattern commands read from the RAM 263 are “21A” to “21C” and “22A” to “22C” (S409: YES), in S410, the CPU 261 performs a sub-process of “big hit display process”. Is executed, the processing after S404 is executed.
In the sub-process of this “big hit display process”, first, the CPU 261 reads out “effect pattern command” and “final stop symbol” as display instruction information from the RAM 263 again. Then, the “effect display pattern” corresponding to the “effect pattern command” is read from the effect display pattern table 173 (see FIG. 34) stored in the effect display pattern table storage area 262A of the ROM 262 and stored in the RAM 263. Subsequently, the CPU 261 reads the “effect display pattern” from the RAM 263 again, reads out the moving image data corresponding to the “effect display pattern” from the ROM 262 and displays it on the liquid crystal display 110, and a predetermined effect display time has elapsed. In this case, display control is performed so that the “final stop symbol” is stopped and displayed.

  For example, when the “effect pattern command” and the “final stop pattern” as the display instruction information are “21A” and “777”, the CPU 261 sets “effect display pattern” as “effect display pattern” from the effect display pattern table 173. 21A "is read out, and the moving image data corresponding to" 21A per reach "is read from the ROM 262 and displayed on the liquid crystal display 110, and when the effect display time of about 22 seconds elapses, the jackpot symbol of" 777 " The display is controlled so that is stopped. When the “effect pattern command” and the “final stop pattern” as the display instruction information are “22B” and “111”, the CPU 261 sets “effect display pattern” as “effect display pattern” from the effect display pattern table 173. 22B "is read out, and the moving image data corresponding to" 22B per reach "is read from the ROM 262 and displayed on the liquid crystal display 110, and when the effect display time of about 32 seconds elapses, the jackpot symbol of" 111 " The display is controlled so that is stopped.

  As described above, according to the pachinko machine 100 according to the fifth embodiment, the CPU 281 of the sub-integrated control board 280 receives the variation pattern command from the CPU 291 of the main control board 290 (S331: YES), the RAM 283 The lighting upper limit algebra MAX is read out from the above and changed to the “lighting upper limit number” corresponding to the effect pattern command selected corresponding to this variation pattern command, and based on the “lighting addition number” corresponding to the effect pattern command, When each of the expectation degree LEDs LL1 to LL30 and LR1 to LR30 arranged on the left and right outer sides of the liquid crystal display 110 is limited to the lighting upper limit number, when the effect pattern command is output to the CPU 261 of the effect display board 260, additional lighting is sequentially performed. (S332 to S337). In addition, the number of additional lighting, which is the number of additional lighting, is “0” in the case of complete loss display, “+4 to +10” in the case of reach loss display of reach A, and reach loss display of reach B. Is set to “+8 to +15”, “+15 to +30” for reach A jackpot effect display, and “+20 to +30” for reach B jackpot effect display.

  Thereby, when the variation of the variation symbol displayed on the liquid crystal display 110 is started, each of the expected degrees LEDLL1 to LL30 and LR1 to LR30 provided on the left and right outer sides of the liquid crystal display 110 shows the degree of expectation of winning the jackpot. In the case of an effect pattern command in which additional lighting is driven and the number of additional lighting is a jackpot corresponding to each stage to be expressed (from the 0th stage in which each of the 0 lights is driven to the 31st stage in which 30 lights are driven). Is set to a large number, the player wins a big hit through each of the expectation LEDs LL1 to LL30 and LR1 to LR30 provided on the right and left outer sides of the liquid crystal display 110 of the special symbol display device 108 being watched It is possible to reliably control the drive so that the expected degree can be easily confirmed. In addition, since a plurality of types of accumulated addition values are provided corresponding to each of the effect pattern commands, it is possible to easily set an expectation for winning the jackpot of the effect display pattern corresponding to each of the effect pattern commands. And display control can be surely performed so that the player can easily confirm the expectation level of winning the jackpot.

Further, when the CPU 281 of the sub integrated control board 280 receives an expectation LED command, the CPU 281 does not exceed the “upper limit lighting number” corresponding to each effect pattern command for each expectation LEDLL1 to LL30, LR1 to LR30. Since each one of them is additionally lit, the number of lighting of each of the LED LEDs LL1 to LL30 and LR1 to LR30 is changed during the fluctuation of the three rows of the liquid crystal display 110, and the degree of expectation for winning the jackpot And the player's expectation for winning the jackpot can be further increased.
Further, if any of the variation pattern command or the expected LED display command is not input within a predetermined time after the predetermined number of LEDs LEDLL1 to LL30 and LR1 to LR30 are driven to be turned on, the lighting drive is performed. Each of the expected LEDs LEDLL1 to LL30 and LR1 to LR30 is turned off one by one every predetermined time (for example, about 30 seconds to 3 minutes). When the game is stopped, it is possible to control so as to surely stop the notification of the expected degree for the big hit acquisition by each of the expected degree LEDs LL1 to LL30 and LR1 to LR30.

  The present invention is not limited to the first to fifth embodiments, and various improvements and modifications can be made without departing from the scope of the present invention.

  For example, in the first to fourth embodiments, a predetermined time of “5 seconds” is measured by the lighting timer 73 and a predetermined time of “10 seconds” is measured by the extinguishing timer 74 in order to derive the winning rate. Although it is determined whether the pachinko ball enters the game ball, the measurement time may be the same time. Further, the predetermined time measured by the lighting timer 73 may be longer than the extinguishing timer 74.

  Further, the winning opening for displaying the winning rate is not limited to the start opening 39, and may be, for example, lower winning openings 48 and 49 (see FIG. 2).

  Further, in the first to fourth embodiments, when the pachinko ball does not win within a predetermined time (10 seconds in the first to fourth embodiments), the lighting area of the winning rate display unit 53 is reduced by one step. However, it may be reduced by two steps. Furthermore, when no prize is awarded for a predetermined time, the current lighting area may be eliminated and the light may be completely turned off. As a result, the width of the lighting area that is reduced when a prize is not won for a predetermined time is increased, and when the player stops the game, the winning rate stage is quickly set to “0” and the winning rate display portion 53 is turned off. Can be made. Therefore, when the game store side changes the arrangement of the nail or the like, it is possible to display the correct winning rate by a new game without displaying the previous winning rate.

  Further, in the fifth embodiment, when the count value of the first hold counter 293C is 4 or more (S212: YES), the CPU 291 outputs the “expectation LED display command” to be output to the CPU 281 of the sub integrated control board 280. Is not stored in the RAM 293 (S214), but also when the count value of the first hold counter 293C is “4” (S212: YES), the “expected LED display” is output to the CPU 281 of the sub integrated control board 280. The “command” may be stored in the RAM 293. Thereby, when many winnings are continuously made at the start opening 135, it is possible to display the effect so that the degree of expectation for winning the jackpot is high.

1,100 Pachinko machine 8, 101 Game board 9, 102 Game area 27, 110 Liquid crystal display (LCD)
39, 135 Start port 39B, 135A Start port switch 53 Award rate display 54 Award rate LED
66 display control board 69, 290 main control board 73 lighting timer 74 extinguishing timer 461 main control CPU
661 CPU for display control
260 Effect display board 261,271,281,291 CPU
262, 272, 282, 292 ROM
263, 273, 283, 293 RAM
270 Prize ball payout control board 280 Sub-integrated control board 462, 662 ROM
463, 663 RAM
464, 664 I / O circuits LL1-LL30, LR1-LR30 Expectation LED

Claims (2)

A start opening provided in the game area;
Starting port detecting means for detecting winning of a game ball to the starting port;
A special symbol display device provided in the game area and displaying a plurality of variable symbols;
Display control means for controlling the special symbol display device;
Control means for controlling the operating state of the gaming machine;
Expectation degree notifying means for notifying and notifying in a plurality of stages the degree of expectation that a plurality of change symbols that are variably displayed on the display screen of the special symbol display device notify the jackpot acquisition in a predetermined manner;
With
The control means includes
When the game ball wins the starting opening, a jackpot random number acquisition means for acquiring a jackpot random number value updated within a predetermined range;
Jackpot determination means for determining whether or not the value of the jackpot random number acquired by the jackpot random number acquisition means matches a jackpot value predetermined in the jackpot determination table;
Fluctuation information selection means for selecting, from among a plurality of preset fluctuation information, fluctuation information for determining a notification time for notifying the player of the determination result of the jackpot determination means;
When winning in the starting port during the fluctuation of the fluctuation symbol, the variable winning notification means for performing a winning notification for notifying the winning,
A jackpot game control means for controlling the variable winning device that opens and closes the jackpot to a jackpot gaming state that is more advantageous to the player than the normal gaming state when it is determined that the jackpot judgment means is a jackpot;
Production information for selecting production information indicating the display pattern of the variation symbol displayed on the special symbol display device from a plurality of production information set in advance based on the variation information selected by the variation information selection means. A selection means;
Addition value storage means for storing a plurality of types of addition values corresponding to each of the plurality of effects information;
Upper limit storage means for storing a plurality of upper limit values corresponding to each of the plurality of effects information;
When the production information is selected by the production information selection unit, the added value corresponding to the selected production information is cumulatively counted to obtain a first cumulative count value, and the variable winning notification unit Cumulative prize means for obtaining a second cumulative count value by adding a predetermined added value to the first cumulative count value when a winning notification is made;
When the production information is selected by the production information selection unit, the upper limit value corresponding to the selected production information is acquired and stored as a current upper limit value;
Cumulative upper limit determination means for determining whether the first or second cumulative count value obtained by the cumulative count means exceeds a current upper limit value stored in the current upper limit value storage means;
When it is determined by the cumulative upper limit determining means that the current upper limit value is exceeded, a corrected cumulative count is obtained by subtracting the count value exceeding the current upper limit value from the first or second cumulative count value of the cumulative count means. Count value correction means for obtaining a value;
When the count value is not corrected by the count value correcting unit, the expectation degree notifying unit is configured to associate the first or second accumulated count value of the cumulative count unit with each stage of the expectation degree notifying unit. If the count value is corrected by the count value correcting means, the expected accumulated value is associated with each stage of the expected degree notifying means when the count value is corrected by the count value correcting means. Expectation degree notification control means for controlling to notify the player via the means;
Have
The display control means includes
Effect display pattern storage means for storing an effect display pattern corresponding to each of the plurality of effect information;
When the production information is selected by the production information selection unit, the production display pattern selection unit that selects the production display pattern corresponding to the production information;
A stop display for starting the variation of the plurality of variable symbols in the special symbol display device based on the effect display pattern selected by the effect display pattern selecting means, and sequentially stopping and displaying the variable symbols based on the effect display pattern Control means;
A gaming machine characterized by comprising: The control means includes
Measuring means for starting time measurement when notifying the player of the first cumulative count value, the second cumulative count value, or the corrected cumulative count value via the expectation degree notifying means;
If a new cumulative count value is not notified to the player via the expectation notification control means within a predetermined period measured by the measuring means, a predetermined subtraction value is calculated from the reported cumulative count value. Control is performed so that the accumulated count value after subtraction is notified to the player via the expectation notification means corresponding to each stage of the expectation notification means, and time measurement by the measurement means is started. Second expectation notification control means for
The gaming machine according to claim 1, comprising: