JPS5845859B2 - Soushinyutsuriyokuseigiyokairo - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transmission output control circuit that suppresses transmission at frequencies other than channels used in a transceiver.

SUMMARY OF THE INVENTION An object of the present invention is to prevent damage prevention radio waves caused by the oscillation frequency in the unlocked state being different from the frequency in the locked state in a transmitter/receiver incorporating a phase-locked frequency synthesizer.

Generally, for wireless transmitters and receivers that use radio waves, there are detailed regulations regarding the frequency used, output wattage, spurious, and other transmission outputs, but these are well known.

For example, the carrier wave (27MHz band) of each channel in a transmitter/receiver for citizen band in the United States has a channel spacing of 1.
Since it is set at 0 KHz or 5 KHz, the frequency deviation must be at least less than 0.01%.

Conventionally, multi-channel transceivers for citizen bands have used crystal oscillators for the number of channels as oscillation sources with small frequency deviations in order to obtain the frequency of each channel.

Alternatively, each channel frequency was synthesized by combining multiple crystal oscillators.

Therefore, for devices with a very large number of channels, the number of crystals increases proportionally, especially when the number of channels reaches several tens and the channel spacing is chosen as small as 5 KHz. The cost of the frequency source was high because a crystal was required.

Furthermore, in order to obtain the frequency of each channel, it is necessary to selectively switch the resonator crystal to be used from among a large number of resonators, making the channel switching switch circuit complicated.

On the other hand, as shown in Figure 1, a phase-locked loop frequency synthesizer that has one reference frequency source and a digital counter that can set a variable frequency oscillator to an arbitrary frequency with respect to the reference frequency is used as the channel frequency standard of the transmitter/receiver. By using one crystal with a small deviation as a reference frequency, it is possible to synthesize a channel frequency with almost the same accuracy as the reference frequency, and the number of channels,
If a digital counter for setting the channel spacing is designed in advance within a necessary variable range, it becomes possible to synthesize all channel frequencies with one synthesizer.

Figure 1 is a block diagram of a phase-locked synthesizer, where 1 is a reference frequency oscillator, 2 is a counter,
3 is a program counter for frequency setting, 6 is a phase comparator, 9 is a charge pump, and 10 is a variable frequency oscillator control circuit, which usually consists of an integrator (filtering circuit).

10 is a variable frequency oscillator which oscillates at a frequency set by the program counter 3 based on the output of 9, and is usually a voltage controlled oscillator.

In a phase-locked loop type frequency synthesizer, the oscillation frequency of the variable frequency oscillator 11 can be considered to be in a controlled state by the loop (hereinafter referred to as a locked state) or in an uncontrolled state (non-locked state).

The unlocked state is when the power is first turned on, when the program counter 3 is reset to a different frequency, or when the lock is released due to disturbance.

In this case, the variable frequency oscillator oscillates irregularly within the variable frequency range of the oscillator input.

Normally, oscillation occurs at the upper or lower limit of the input variable range.

When using a phase-locked frequency synthesizer for the transmitter/receiver channel frequency, especially when using the synthesizer output directly or indirectly as the transmitting carrier, the oscillation frequency in the non-locked state is the oscillation frequency in the locked state, that is, the frequency you want to use. Since the frequency does not match, the frequency of the channel used cannot be obtained.

At this time, there is a good chance that the transmitted signal is related to another channel or another band, and not only cannot be received by the receiving device of the other party, but also may become a radio wave that interferes with other communications.

The present invention eliminates such problems when using a phase-locked loop type wavenumber synthesizer in a transmitter/receiver,
By stopping unnecessary radio waves, it improves the performance of transceivers using phase-locked synthesizers.

FIG. 2, FIG. 3, and FIG. 4 are examples of the transmission control circuit in an unlocked state according to the present invention.

Assuming that the channel frequency interval is 10 KHz, Fig. 1.6
In the phase comparator, the reference frequency oscillator 1
In this case, the phase comparison of the oscillation signal of the variable frequency oscillator 11 is performed by converting it to 10 KHz, which is the same as the channel spacing.
Counter 2 is a fixed counter for stepping down the frequency of reference oscillator 1 to 10 KHz, and counter 3 is preset so that when variable oscillator 11 is oscillating at the expected frequency, 10 KHz is obtained as the final output 5. It is a program counter that can be used.

The output of the phase comparator 6 is naturally a 10 KHz pulse train.

7 is a signal for detecting the amount of phase advance of the output 5 of the program counter 3 with respect to the output 4 of the reference frequency counter.

8 is a signal for detecting a phase delay amount of 5 relative to 4.

The output of the phase comparator is classified as follows for the following explanation.

(1) Locked in an ideal state.

When output 4 of counter 2 and output 5 of program counter 3 have completely the same frequency and the phase difference is O.

At this time, there is no signal at the outputs of the phase comparator 6 and 8.

(2) Practically in a locked state.

The frequencies of 4 and 5 completely match, and the phase difference is constant.

Alternatively, a variable oscillator 11 with vibration based on a loop transfer function
The oscillation frequency changes within the operating deviation of the preset frequency, and the phase difference slightly fluctuates.

(3) Unlocked.

The oscillation frequency of the variable oscillator 11 is outside the permissible deviation from the preset frequency.

In the phase-locked loop shown in Fig. 1, if the charge pump 9 and integrator 10 are implemented as a circuit, leakage current will always occur, so from the moment the charge pump input signal O enters the 70° state, the charge pump input signal O will be in the 9°10 state. (1) is difficult to achieve because it cannot be sustained forever.

(2) > (3) refers to the so-called locked state and non-locked state mentioned in this explanatory text.

FIG. 5 20 shows the waveform of the charge pump output 9 when it is in a practically locked state and is slightly vibrating.

The pulse interval is 10 KHz, and minute pulses are generated above and below the voltage (2), which corresponds to the phase difference changing from 0 to 10 or -.

FIG. 5 21 shows the output waveform of the charge pump 9 in the unlocked state, and 22 shows the waveform of FIG. 2 12 at this time.

FIGS. 3 and 4 show an example of a transmission control circuit according to the present invention.

In Fig. 2, the NOR circuit output 12 is connected to 2
When applied to the middle 13 of the directly connected diode, when the waveform of 12 is a minute pulse component as shown in FIG. Set the base resistance and capacitor values so that the voltage drops.

At this time, the loop of the synthesizer is in a locked state and the transistor is in an ON state.

The loop becomes unlocked and the 12 waveforms are shown in Figure 5.2.
In the case of the waveform shown in 2, the signal 12 becomes Vc
Since the potential of the base 14 is reverse biased with respect to the emitter, the base transistor is in an OFF state.

In FIG. 4, outputs of opposite polarity are obtained for the same signal input 12.

The base 18 of the transistor is in the locked state at O■,
It is around +0.7V in the unlocked state.

FIG. 5 23 shows an example of the output waveform of the charge pump 9 when the locked state changes to the non-locked state.
The waveform in FIG. 12 changes as shown in 24, and the waveform in 19 changes as shown in 25.

Here, the diode 26 plays the role of keeping 17 at the GND level, and when the signal 12 changes from +Vcc to O■, the AC capacitor changes from the GND to the diode 26.
Electric charge flows through the capacitor and is charged.

Conversely, when 12 changes from O■ to Vcc, the charge charged in the AC coupling capacitor is discharged through the diode 27 and charged in the capacitor 28, and flows into the emitter through the base of the transistor.

The transistor remains substantially ON until the charge stored in the capacitor 28 is exhausted through the base to the emitter.

Here, as shown in FIG. 3 or 4, it is extremely important to construct a diode rectifier circuit because the input signal is a pulse train.

If 24 waveforms are CR integrated and applied to the transistor base to determine ON or OFF, the CR time constant should be sufficiently large compared to the pulse interval (several tens to hundreds of pulses).
Therefore, when the lock state changes to the non-lock state, there is a delay of several tens of pulses to several hundred pulses before an inversion appears in the transistor output.

On the other hand, in the circuit shown in Figure 3 or 4, it is sufficiently possible to invert the transistor output with a delay of at most a few pulses after changing to the non-lock state, and the degree of delay depends on the capacitance of the AC coupling capacitor. It is clear that it can be set arbitrarily.

When the output of the variable frequency oscillator 11 is used directly or indirectly as a transmitted carrier wave, in an unlocked state, not only the carrier frequency of the used channel is not obtained, but also interference radio waves of other channels or other bases are generated. Therefore, if the lock state is changed to the unlock state in order to stop unnecessary radio waves, the transmitting signal must be stopped immediately.

Therefore, as mentioned above, it is important to immediately detect an out-of-lock condition using a diode rectifier circuit.

On the other hand, when the lock state changes from the unlocked state, it is necessary to send out a transmission signal, but even if the delay at this time were several hundred pulses, there would be no practical problem.

FIG. 4 is an example of stopping the transmission signal in an unlocked state by lowering the base bias of one amplification stage of the transmission signal to GND.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a phase-locked frequency synthesizer. FIG. 2 shows an unlock state detection circuit necessary for the present invention. FIGS. 3 and 4 show examples of transmission control signal detection circuits according to the present invention. FIG. 4 is an example of a circuit including one method of transmission control. FIG. 5 shows an example of the signal waveform at each point in FIGS. 3 and 4.

Claims (1)

[Claims] 1. In a transmission output control circuit having a frequency synthesizer with a phase-locked loop, after combining the phase lead signal and the phase-lag signal detected by the digital phase comparator circuit in the phase-locked loop using an OR or NOR circuit, A transmission output control circuit characterized in that it receives the diode rectified signal and stops the transmission output when it is not locked.