JPS5847717B2 - envelope signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an envelope signal generator for an electronic musical instrument;
In particular, the present invention relates to an envelope signal generator that allows the waveform of an envelope signal to be arbitrarily set using an electrical signal such as a voltage.

Conventionally, the envelope signals used in electronic musical instruments, especially music synthesizers, include an attack section, a decay section, and
A so-called AD with a sustain section and a release section.
Although the SR signal is used, in order to change the time constants of the waveforms of the four parts mentioned above, four variable resistors are often used as disclosed in Japanese Patent Application No. 49-99647. .

However, in this case, in order to prepare a plurality of ADSR signals, it is necessary to select a desired resistance value using a combination of a large number of resistors and switches instead of the variable resistor.

The present invention does not rely on combinations of many resistors and switches as described above, but rather uses only a small number (at least one) of control resistors whose resistance values can be electrically set, allowing the waveform to be freely set electrically. The present invention provides an envelope signal generator that can be modified and modified.

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, the voltage changeover switch device 10 is connected to a charging power source VCC, a first discharging power source v8, and a second discharging power source (ground).

Note that the first discharge power source V8 is created by the variable resistor Rs and the booster 6.

Three field effect transistors (hereinafter simply referred to as FETs) included in the voltage changeover switch device 10 QA 7
When one of QD and QR is turned on, one of the three power supplies is connected to the control resistor R.

Apply to the left end (input terminal) of

Control resistance R. The other end (output terminal) is connected to one end of a capacitor C, the other end of the capacitor C is grounded, and the control resistor Ro and capacitor C form a time constant circuit.

The terminal voltage of the capacitor C is outputted to the output terminal 9 via the bathophore amplifier 7.

Also, the voltage of this output terminal 9 ■.

ut is compared with a comparison voltage VP by a voltage comparator 8, and the output of the voltage comparator 8 is applied to a logic circuit 11.

The three control signal sources in this example are voltages vA, VD, V
R, which are provided by variable resistors RA, RD, and RR.

One of these control signal sources vA, VD, VR is selected by the changeover switch device 12, and the control signal source vA, VD, VR is
.

is applied to the control terminal of

The logic circuit 11 inputs the trigger pulse KG supplied in response to the key operation and the output CM of the voltage comparator 8, and outputs A, D.
, H, and the differentiator circuit 2
, an RS clip-flop 5, an AND gate 3, and an inverter 4.

Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to the timing chart shown in FIG.

The trigger pulse applied to the trigger terminal 1 becomes "0" when the key is not pressed and becomes "1" when the key is pressed.

Therefore, when no key is pressed, the RS flip-flop 5 is cleared and its output A becomes "O".

Further, the output D of the AND gate 3 becomes ゛゜0'', and the output R of the inverter 4 becomes ?+111.

Therefore, FETs QA and QD of the voltage changeover switch device 10 are turned off and QR is turned on, and the terminal voltage of the capacitor C is discharged through the control resistor RO and FETQR, and as a result, the terminal voltage of the capacitor C becomes Ov, and the output V.

ut also becomes OV.

At this time, the output of the voltage comparator 8 becomes "O".

The changeover switch device 12 also includes the voltage changeover switch device 1.
0, the output R of the inverter 4 selects the control signal source vR, and the resistance value of the control resistor Ro is set to RR.

Next, when the key is pressed and the trigger pulse KG becomes "1", its rising edge is detected by the differentiating circuit 2, and the RS
Set flip-flop 5.

Therefore, the RS flip-flop A is ``1'', the output D of the AND gate 3 is ``0'', and the output R of the inverter 40 is
becomes "O".

Therefore, the output A turns on the FFET QA, applies the charging power supply VCC to the control resistor Ro, and charges the capacitor C.

On the other hand, at this time, the control resistor Ro is connected to the changeover switch device 12.
A control signal source vA is added via the control signal source VA
Resistance value RA determined by and capacitance C of capacitor C
The output voltage vout rises with a time constant RA-C determined by .

And this output voltage V. When ut exceeds the comparison voltage Vp, the output CM of the voltage comparator 8 becomes "1" and the RS flip-flop 5 is reset, so that the output A becomes 10", the output D becomes "1", and the output R becomes "0".

When the output D becomes h1'', FET QD turns on and the first
The discharge voltage Vs is the control resistor R.

The control signal source vD is applied to the control resistor Ro via the changeover switch device 12, and the resistance value becomes RD.

Therefore, the output voltage V.

ut decreases to voltage VS with time constant RD-C.

When the key is released and the trigger pulse KG becomes ``O I+'', the RS flip-flop 50 output A becomes ttO 11
Then, the output D of AND gate 3 becomes “0 11,”
Since the inverter 40 output R becomes ff 1 +1, F
When ETQR is turned on, capacitor C has a time constant of RR-C.
to discharge.

As a result of the above operation, the output terminal 9 has a signal shown in Fig. 2.
.

An envelope signal as shown by ut is obtained.

In this way, in the above embodiment, the resistance value of one control resistor Ro is switched in each charging/discharging sequence, so the number of expensive control resistors can be reduced.

Also, since the resistance value of the control resistor Ro is set electrically,
It is possible to obtain an ADSR signal with an arbitrary time constant simply by applying various voltages from the outside. Many types of envelope signals can be generated.

3, 4, and 5 are diagrams showing an embodiment in which the main parts of the embodiment of FIG. 1 are digitized.

FIG. 3 shows a digitally controlled control resistor R6.

That is, the resistors r, 2r, 4r, 8r, connected in series
A switch using an FET is provided in parallel to each of the resistors 16r and 32r, and a digital signal is applied to the gates 21 to 26 of the resistors 16r and 32r, and a predetermined FET can be opened or closed using the 6-bit code of the gates 21 to 26. By terminal 20
The resistance value between 0 and 26 can be selected in 64 ways from 0 to 63r.

FIG. 4 shows a changeover switch device 28 for supplying a digital signal for controlling the resistance value of control resistor R6 in FIG.

That is, 6-bit control signal source (code) DA 7
DD t DR is selected according to the A, D, and H pulses applied to the digital data selector 28, respectively.

In FIG. 5, the first discharge voltage Vs is generated from the digital-to-analog converter 29, and the 6-bit code DS is used as a control signal source to generate the first discharge voltage Vs from the digital-to-analog converter 29.
, and the first discharge voltage is generated at its output.

In this way, if the control resistor R'O and the first discharge voltage vs are changed and set using the digital code, not only can an envelope signal with very good reproducibility be obtained, but also the digital code DA, DD, Ds, DR
can be stored in read-on memory or random access memory and read out as appropriate, making it easy to prepare many types of envelope signals in advance.

Note that in the above embodiment, one charging power source V is used.

0, one voltage comparator 8, and one comparison voltage Vp, but in order to create a more complex envelope waveform, a plurality of these and a larger number of control signal sources are prepared, and these predetermined The switching may be performed according to the following sequence.

For example, the present invention is applied to a device that creates a percussive waveform having an attack, decay, first release, and second release as disclosed in Japanese Patent Application No. 1973-125002. You can also do that.

As described above, the present invention uses a control resistor, a capacitor, a charging power source, and a discharging power source to generate an envelope signal of a charge/discharge waveform, and the resistance value of the control resistor is sequentially switched using a digital code. Since the resistance value settings are extremely accurate, the number of control resistors is small, and the control signal source is an electric signal, making it easy to preset and store resistance value information. It also has the advantage of being multi-dog, such as being easy to operate remotely or all at once.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a timing chart thereof, and FIGS. 3, 4, and 5 are circuit diagrams showing main parts of other embodiments. 1...Trigger pulse input terminal, 2...Differential circuit, 3...AND gate, 4...
Inverter, 5...RS flip-flop, 6
...booster, 7 ... - buffer amplifier, 8 ... voltage comparator, 10 ... voltage changeover switch device, 11 ... logic circuit , 12...
...Changing switch device, Ro...Control resistance, VCC, ■8...Discharge power supply, VA, VD,
VR... Control signal source.

Claims (1)

[Claims] 1. Integrating means for charging and discharging the voltage of the capacitor based on a plurality of charging/discharging power sources to generate an envelope signal, a control resistor for controlling the rate of charging and discharging, and a control resistor for controlling the voltage of the capacitor based on a plurality of control signal sources. resistance value variable means for changing the resistance value of the control resistor; and control means for controlling the switching of the plurality of charging/discharging power supplies and control signal sources synchronously and in time series; An envelope signal generator comprising a resistance element whose value can be switched, and a digital code generator as a control signal source.