JPS584965B2 - display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display device that uses a plasma display to display the magnitude of an analog input signal in the form of a bar graph.

Plasma displays used in this type of display device utilize the fact that an anode and a cathode are sealed in a discharge gas, and when a voltage is applied between the two electrodes, a discharge is generated between the two electrodes, causing the cathode to light up. , a large number of cathodes are arranged on the backsheet surface of the display device at positions corresponding to the display scale, facing oppositely to the anode of a transparent conductive film formed on the inner surface of the windshield of the display device, and the anode has a time width proportional to the analog signal level. By applying a pulse voltage and applying a low level (low voltage) to the cathode group from the lowest cathode to the highest cathode in a time-division manner, the number of cathodes that light up is made proportional to the time width of the anode signal, and analog input It displays the signal magnitude in a bar graph format.

In such a plasma display, main scale lines are marked at predetermined intervals on the windshield or a scale plate provided on the windshield surface, and numbers are printed to indicate the magnitude of the display amount that the main scale lines mean. This makes the bar graph display easier to read.

Therefore, conventionally, when marking main scale lines and numbers on a plasma display, a difficult process was required to accurately align the relative positions of the main scale lines and the cathode corresponding to the scale lines.

The alignment between the main scale line and the cathode is important in making use of the highly accurate digital display function of the plasma display.

The purpose of this invention is to eliminate the need for marking main scale lines,
To provide a display device in which the correspondence between a number representing the magnitude of a display amount and a cathode corresponding to the number is perfect, and the display amount can be read accurately and easily.

In this invention, the time width of the drive voltage signal applied to the cathode corresponding to the main scale line is made longer than the time width of the drive voltage signal applied to the other cathodes.

By doing this, in the present invention, the cathode corresponding to the main graduation line is lit more brightly than the other cathodes.

FIG. 1 is a block diagram showing one embodiment of the present invention.

The analog input signal Ein is applied to the comparator C0M1, and the voltage Ef corresponding to the full span of the three plasma display devices Dp is applied to the comparator C0M2, which compares it with the lamp voltage from the lamp voltage generator R. Compare with voltage.

The comparison output of comparator C0M2 is the ramp voltage generator R
, reset counter C and converter F.

The lamp voltage generator R starts generating a lamp voltage every time it is reset.

Therefore, in the closed circuit between the lamp voltage generator R and the comparator C0M2, the generated lamp voltage is applied to the plasma display DP.
The waveform becomes a repetitive sawtooth waveform that returns to zero when the voltage rises to a voltage corresponding to the full span of .

Then, the output of the comparator C0M1 becomes a pulse signal with a time width proportional to the magnitude of the analog input signal Ein, and this pulse signal passes through the anode driver DA for plasma display! The voltage is applied to the anode A of Dp.

Counter C then moves from its reset to clock generator C
This is a hexadecimal counter that starts counting the LK clock.

When the count value of the counter C is 10, the Nant gate NA1 closes the gate of the Nant gate NA2 and suppresses (holds) a change in the lamp voltage of the lamp voltage generator R.

This operation of the Nant gate NA continues until the count value of the counter C reaches the full count of 12.

The Nant gate NA2 inhibits the passage of the clock only during its gate period.

The converter F inputs the clock passed through the Nandt gate NA2 and converts it into an N-phase clock corresponding to the number N of cathodes of the plasma display DP.

This N-phase clock is applied to the cathode terminal of the plasma display DP through the cathode driver DK.

Here, the plasma display DP is of a self-scan type,
As shown in Figure 2, the cathode group is divided into three groups, and each group is connected in common to the cathode terminal KA.
1. KA2. It was extracted as KA3.

In the case of the configuration shown in FIG. 2, this self-scan type plasma display transmits a phase-shifted clock pulse to the terminal KA1. KA2
．． Sequential to KA3 (KAl, NA2.NA3.
KAl, NA2, etc.), the light is sequentially lit from the lowest cathode to the highest cathode.

In this embodiment, the self-scanning plasma display shown in FIG. 2 is used, and converter F converts clock pulses into three-phase clocks at 1°K2. Convert to 3,
The cathode driver DK also includes a drive circuit for three phases.

The operation of the above configuration will be explained with reference to the time chart of FIG.

A pulse voltage having a time width proportional to the magnitude of the analog input voltage Ein is applied to the anode of the plasma display DP.

On the other hand, for the clock from the clock generator CLK,
Outputs of counter C c(A), C(B), C(C), C(
D) has a decimal waveform as shown in FIG.

Therefore, the output of the Nant gate NA2, which is gated by the output of the Nant gate NA2, becomes a clock signal with a different time width every 10 clock signals.

Converter F converts this clock signal into a three-phase clock
The outputs F(Kl), F(K2), and F(Ka) are as shown in the figure and are applied to the cathode through the cathode driver DK.

Therefore, in the plasma display DP, the width of the clock voltage signal applied to the cathode terminal every 10 clocks is larger than the width of other clock voltage signals, and the amount of light emitted from the nX10th cathode is thicker than the other cathodes.

Incidentally, the time width extension of the pulse voltage applied to the anode with respect to the extension of the clock voltage signal width applied to the cathode is performed by holding the ramp voltage generator R by the output of the NAND game NA1.

That is, when the converter F stops clock counting, the lamp voltage change is stopped, and the width of the pulse voltage applied to the anode is extended by the extension of the lighting time of the cathode, so that the display matches the magnitude of the analog input signal.

FIG. 4 shows the display state on a plasma display DP, which is 50Xn (n is 1.2...
3) This is a case where the amount of light emitted from the second cathode is larger than that of the other cathodes.

In this case, the counter C is a 52-decimal counter, and the Nant gate NA2 detects a count value of 50.

In the above embodiment, a pulse signal with a time width proportional to the magnitude of the analog input signal is obtained by comparing the lamp voltage with the analog input signal, but other exchange means may be used. .

For example, the anode voltage signal can be obtained by converting an analog input signal into a digital value using an analog-to-digital converter, and by clock counting using a program counter that uses the digital value as a program value.

At this time, the clock count of the program counter is inhibited by the output of the Nant gate NA1 to compensate for the extension of the cathode lighting time at the predetermined interval.

In addition, the means for changing the width of the clock corresponding to the cathode corresponding to the main scale line is the counter C and NAND game shown in Fig. 1).
NA1. It is not limited to the configuration of NA2, but any configuration having equivalent functions may be used.

FIG. 5 shows another implementation sequence.

The clock from the clock generator CLK is directly applied to the converter F, where it is converted into an N-phase clock, and the frequency is divided by the frequency divider circuit DV.

This frequency dividing circuit DV resets the converter F and the lamp voltage generator R by counting the clocks of the number of cathodes of the plasma display DP, thereby returning the display to its initial state.

This function corresponds to comparator C0M2 shown in FIG.

Comparison circuit C0M3 compares the number of clocks counted by frequency dividing circuit DV with a preset number (number corresponding to the main scale line), and triggers timer circuit T when they match.

The timer circuit T suppresses the clock output of the clock generator CLK and holds the ramp voltage change of the ramp voltage generator R for a predetermined period of time each time it is activated.

As a result, the voltage signal width of the cathode corresponding to the main scale line is wider than that of other cathodes by the timer time of the timer circuit T (
The cathode lights up brightly.

As explained above, in the display device according to the present invention, the cathode corresponding to the main scale line is lit brighter than the other cathodes, so the cathode itself becomes the main scale line, and the plasma display has a main scale. This eliminates the need for marking scale lines, completes the correspondence between the number representing the displayed amount and the cathode corresponding to that number, and has the effect of making it easier and more accurate to read the displayed amount.

Note that as a display method for lighting up the cathode corresponding to the main scale line brighter than other cathodes, there are two methods: (1) as in the present invention, the time width of the drive voltage signal applied to the cathode corresponding to the main scale line is A voltage time width extension method that is longer than the time width of the driving voltage signal applied to the drive voltage signal.

(2) The voltage level (peak value) of the drive voltage signal applied to the cathode corresponding to the main scale line is set to be thicker than the level (peak value) of the drive voltage signal applied to other cathodes. Expansion method.

There are two possible methods.

However, in the voltage time width expansion method according to the present invention, the time width of the voltage signal applied to the cathode of the plasma display device DP is can be made longer.

Therefore, the pulses generated by the clock generator CLK may have only one type of time width.

However, in the case of the voltage peak value extension method, it is necessary to have two types of voltage levels, one for the drive voltage level applied to the cathode corresponding to the main scale line, and one for the drive voltage level applied to the other cathodes, and it is not necessary to switch between these. This method requires a switch circuit for supplying the cathode to the cathode, which has the drawback of complicating the circuit configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a configuration diagram of the plasma display in FIG. 1, FIG. 3 is a time chart for explaining the operation of FIG. 1, and FIG. 4 5 is a diagram illustrating a display state of a plasma display according to the present invention, and FIG. 5 is a block diagram showing another embodiment of the present invention. C0M1. C0M2: Comparator, DA near node driver, R: Ramp voltage generator, CLK: Clock generator, C: Counter, NA1. NA2: Nand Gate, F
: converter, DK: cathode driver, DP: plasma display.

Claims (1)

[Claims] 1. A large number of cathodes are arranged at positions corresponding to the display scale relative to the anode, a pulse voltage with a time width proportional to the analog input signal is applied to the anode, and a pulse voltage with a time width proportional to the analog input signal is applied to the cathode group, from the lower cathode to the upper cathode for lighting. Equipped with a plasma display that can display the magnitude of an analog input signal in a bar graph by sequentially applying driving voltages of A display device characterized in that the time width of a voltage signal is longer than the time width of a drive voltage signal applied to another cathode.