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JPS588587B2 - Method for manufacturing thick film integrated circuit device - Google Patents
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JPS588587B2 - Method for manufacturing thick film integrated circuit device - Google Patents

Method for manufacturing thick film integrated circuit device

Info

Publication number
JPS588587B2
JPS588587B2 JP52058954A JP5895477A JPS588587B2 JP S588587 B2 JPS588587 B2 JP S588587B2 JP 52058954 A JP52058954 A JP 52058954A JP 5895477 A JP5895477 A JP 5895477A JP S588587 B2 JPS588587 B2 JP S588587B2
Authority
JP
Japan
Prior art keywords
thick film
solder layer
glass coating
film resistor
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52058954A
Other languages
Japanese (ja)
Other versions
JPS53143973A (en
Inventor
戸田均
片岡正行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP52058954A priority Critical patent/JPS588587B2/en
Publication of JPS53143973A publication Critical patent/JPS53143973A/en
Publication of JPS588587B2 publication Critical patent/JPS588587B2/en
Expired legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Description

【発明の詳細な説明】 この発明は厚膜集積回路装置の厚膜抵杭体の作成方法の
改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for manufacturing a thick film resistor for a thick film integrated circuit device.

通常の厚膜集積回路装置では、コンデンサや能動素子が
外付き部品として取り付けられるので、厚膜で作成され
るものは厚膜抵抗体と厚膜配線だけである。
In normal thick film integrated circuit devices, capacitors and active elements are attached as external components, so the only things made of thick film are thick film resistors and thick film wiring.

この厚膜として代表的なものはサーメットで、このサー
メットはペースト状にした銀、白金、パラジウムなどを
スクリーン印刷したのち焼結して作成される。
A typical example of this thick film is cermet, which is created by screen printing a paste of silver, platinum, palladium, etc. and then sintering it.

以下、従来の厚膜抵抗体の作成方法の各作成段階を第1
図〜第3図で説明する。
Below, each production step of the conventional method for producing a thick film resistor is explained.
This will be explained with reference to FIGS.

第1図aは第1の作成段階を示す平面図、第1図bは第
1図aの■B−■B線での断面図である。
FIG. 1a is a plan view showing the first production stage, and FIG. 1b is a cross-sectional view taken along line 2B--2B in FIG. 1a.

第1図a,bに示すように、例えばアルミナ磁器などの
絶縁部材からなる基板1上に所定パターンのサーメット
厚膜2を作成し、その一部を厚膜抵抗体3として使用す
る。
As shown in FIGS. 1a and 1b, a cermet thick film 2 having a predetermined pattern is formed on a substrate 1 made of an insulating material such as alumina porcelain, and a portion thereof is used as a thick film resistor 3. As shown in FIGS.

第2図aは第2の作成段階を示す平面図、第2図bは第
2図aの■B−■B線での断面図である。
FIG. 2a is a plan view showing the second production stage, and FIG. 2b is a sectional view taken along the line 2B--2B in FIG. 2a.

第2図a,bに示すように、厚膜抵抗体3を湿気や不純
物から保護し、その抵抗値を安定化させるために厚膜抵
抗体3を被覆する長方形のガラス被膜4を作成する。
As shown in FIGS. 2a and 2b, a rectangular glass coating 4 is prepared to cover the thick film resistor 3 in order to protect the thick film resistor 3 from moisture and impurities and to stabilize its resistance value.

このガラス被膜4はペースト状にしたガラス粉末をスク
リーン印刷したのち焼結して作成される。
This glass coating 4 is created by screen printing glass powder made into a paste and then sintering it.

第3図aは第3の作成段階を示す平面図、第3図bは第
3図aの■B−■B線での断面図である。
FIG. 3a is a plan view showing the third production stage, and FIG. 3b is a sectional view taken along the line 2B--2B in FIG. 3a.

第3図a,bに示すように、厚膜抵抗体3以外のサーメ
ット厚膜2上に半田層5を被着し、厚膜抵抗体3の両側
端部と接続する厚膜配線6を作成する。
As shown in FIGS. 3a and 3b, a solder layer 5 is deposited on the cermet thick film 2 other than the thick film resistor 3, and thick film wiring 6 is created to connect to both ends of the thick film resistor 3. do.

ところで、このように作成された厚膜抵抗体3を繰返し
高温度になる条件のもとて長時間使用する場合には、厚
膜抵抗体3がその抵抗損による加熱により一層高温度に
なるので、厚膜抵抗体3を被覆するガラス被膜4と半田
層5との間の境界面にこれらの熱膨張係数の差による熱
応力が繰返し働く。
By the way, when the thick film resistor 3 created in this way is used for a long time under conditions where the temperature is repeatedly high, the temperature of the thick film resistor 3 becomes even higher due to heating due to the resistance loss. Thermal stress due to the difference in thermal expansion coefficients acts repeatedly on the interface between the glass coating 4 covering the thick film resistor 3 and the solder layer 5.

このために上記境界面における厚膜抵抗体3と半田層5
の下敷であるサーメット厚膜2との間に裂け目が発生し
、この裂け目により厚膜抵抗体3と厚膜配線6との接続
抵抗が著しく変動するばかりか厚膜抵抗体3と厚膜配線
6との間に断線が発生するおそれがあるという欠点があ
った。
For this purpose, the thick film resistor 3 and the solder layer 5 at the interface
A tear occurs between the cermet thick film 2 which is the underlayment, and this tear not only causes a significant change in the connection resistance between the thick film resistor 3 and the thick film wiring 6, but also causes a There was a drawback that there was a risk of wire breakage occurring between the two.

また、ガラス被膜4が高温度に長時間保持されると、半
田層5がガラス被膜4を溶かすようになるので、第3図
bの破線Aで示すように、半田層5がガラス被膜4上に
流れ込むようになる。
Furthermore, if the glass coating 4 is kept at a high temperature for a long time, the solder layer 5 will melt the glass coating 4, so that the solder layer 5 will melt on the glass coating 4, as shown by the broken line A in FIG. 3b. It starts to flow into.

したがって、ガラス被膜4とこの上に流れ込んだ半田層
5との間に生ずる熱応力によりガラス被膜4に裂け目が
生じ、この裂目により厚膜抵抗体3の安定化が阻害され
るおそれがあるという欠点もあった。
Therefore, the thermal stress generated between the glass coating 4 and the solder layer 5 that has flowed thereon causes cracks in the glass coating 4, which may hinder the stabilization of the thick film resistor 3. There were also drawbacks.

これらの欠点はいずれも、ガラス被膜4と半田層5との
境界面において、半田層5の厚さが厚い程促進される。
All of these drawbacks are exacerbated as the thickness of the solder layer 5 increases at the interface between the glass coating 4 and the solder layer 5.

この発明は、上述の欠点に鑑みてなされたもので、導電
注厚膜上にこれを被覆し両側端部を凹凸形状にしたガラ
ス被膜を作成することによって、この両側端部に接する
半田層の厚さを薄くし、上記半田層と上記ガラス被膜と
の境界面に生ずる熱応力の減少を図るとともに上記半田
層の上記ガラス被膜上への流れ込みの抑制を図り、繰返
し高温度になる条件のもとで長時間使用に耐え得る厚膜
抵抗体を提供することを目的とする。
This invention was made in view of the above-mentioned drawbacks, and by forming a glass coating on a conductive thick film and having an uneven shape at both side edges, the solder layer in contact with the both side edges of the glass coating is formed. The thickness is reduced to reduce the thermal stress generated at the interface between the solder layer and the glass coating, and to suppress the solder layer from flowing onto the glass coating, making it possible to avoid conditions where the temperature is repeatedly high. The purpose of the present invention is to provide a thick film resistor that can withstand long-term use.

以下、この発明による厚膜抵抗体の作成方法の一実施例
についてその各作成段階を第4図〜第6図で説明する。
Hereinafter, each manufacturing step of an embodiment of the method for manufacturing a thick film resistor according to the present invention will be explained with reference to FIGS. 4 to 6.

第4図aは第1の作成段階を示す平面図、第4図bは第
4図aの■B−■B線での断面図である。
FIG. 4a is a plan view showing the first production stage, and FIG. 4b is a sectional view taken along the line 2B--2B in FIG. 4a.

第4図に示す第1の作成段階は第1図に示した従来例の
第1の作成段階と全く同様であるので、ここでは説明を
省略する。
The first production stage shown in FIG. 4 is exactly the same as the first production stage of the conventional example shown in FIG. 1, so the explanation will be omitted here.

第5図aは第2の作成段階を示す平面図、第5図bは第
5図aの■B−■B線での断面図である。
FIG. 5a is a plan view showing the second production stage, and FIG. 5b is a sectional view taken along the line 2B--2B in FIG. 5a.

第5図a,bに示すように、サーメット厚膜2上にこれ
を被覆しこれに接する両側端部を凹凸形状にしたガラス
被膜4aを作成する。
As shown in FIGS. 5a and 5b, a glass coating 4a is prepared on the cermet thick film 2, which is coated with the thick cermet film 2 and has an uneven shape at both end portions in contact with the thick cermet film 2.

第6図aは第3の作成段階を示す平面図、第6図bは第
6図aのVl 137 VI B線での断面図である。
FIG. 6a is a plan view showing the third production stage, and FIG. 6b is a sectional view taken along line Vl 137 VI B in FIG. 6a.

第6図a,bに示すように、ガラス被膜4a直下の厚膜
抵抗体3以外のサーメット厚膜2上に半田層5を作成し
,厚膜抵抗体3の両興端部に接続する厚膜配線6を作成
する。
As shown in FIGS. 6a and 6b, a solder layer 5 is created on the cermet thick film 2 other than the thick film resistor 3 directly under the glass coating 4a, and a solder layer 5 is formed on the cermet thick film 2 to connect to both ends of the thick film resistor 3. A membrane wiring 6 is created.

このとき、半田層5を形成する半田は、その表面張力に
よりガラス被膜4aの両側端部の凹部内へ容易に流れ込
むことができず、わずかに半田流れのよいサーメット厚
膜2上に沿うで上記凹部内へ流れ込むだけである。
At this time, the solder forming the solder layer 5 cannot easily flow into the recesses at both ends of the glass coating 4a due to its surface tension, and the solder flows along the cermet thick film 2 with slightly better solder flow. It simply flows into the recess.

したがって、上記凹部内での半田層5の厚さは非常に薄
くなっているので、半田層5とガラス被膜4aとの境界
面に生ずる既述の熱応力を減少させることができる。
Therefore, since the thickness of the solder layer 5 within the recessed portion is extremely thin, the aforementioned thermal stress occurring at the interface between the solder layer 5 and the glass coating 4a can be reduced.

よって、この熱応力の減少により厚膜抵抗体3とサーメ
ット厚膜2との間に裂け目が発生するのを抑制すること
ができる。
Therefore, the occurrence of a tear between the thick film resistor 3 and the cermet thick film 2 can be suppressed due to this reduction in thermal stress.

また、上記凹部内での半田層5の厚さを薄くすることに
より既述の半田層5のガラス被膜4a上への流れ込みを
抑制することができる。
Furthermore, by reducing the thickness of the solder layer 5 within the recessed portion, it is possible to suppress the solder layer 5 from flowing onto the glass coating 4a.

なお、これまで、サーメット厚膜について述べてきたが
、この発明による方法はこれに限らず、この他の導電姓
厚膜についでも適用することができる。
Although the description has been made so far regarding a cermet thick film, the method according to the present invention is not limited to this, and can be applied to other conductive thick films as well.

以上、詳述したように、この発明による厚膜抵抗体の作
成方法では、絶縁部材からなる基板上に導電姓厚膜を作
成し、この導電訃厚膜上にこれを被覆し両側端部を凹凸
形状にしたガラス被膜を作成し、このガラス被膜直下を
除くその他残余の上記導電姓厚膜上に半田層を作成する
ので次のような効果がある。
As described in detail above, in the method for producing a thick film resistor according to the present invention, a conductive thick film is created on a substrate made of an insulating material, and the conductive thick film is coated with the conductive thick film to cover both ends. A glass film having an uneven shape is created, and a solder layer is created on the remaining conductive thick film except directly under the glass film, resulting in the following effects.

すなわち、上記半田層の半田の表面張力により上記ガラ
ス被膜の両側端部の凹部内での上記半田層の厚さを薄く
することができるので、上記ガラス被膜直下の導電姓厚
膜により作成された厚膜抵抗体では、繰返し高温度にな
る条件のもとて長時間使用されても,上記半田層と上記
ガラス被膜との境界面に生ずる熱応力を減少させること
ができるとともに上記半田層の上記ガラス被膜上への流
れ込みを抑制することができる。
That is, the surface tension of the solder in the solder layer allows the thickness of the solder layer within the recesses at both ends of the glass coating to be thinned, so that the thickness of the solder layer created by the conductive thick film directly under the glass coating can be reduced. Even if a thick film resistor is used for a long time under conditions of repeated high temperatures, it is possible to reduce the thermal stress generated at the interface between the solder layer and the glass coating, and also to reduce the thermal stress generated at the interface between the solder layer and the glass coating. Flowing onto the glass coating can be suppressed.

よって、上記熱応力の減少により上記導電姓厚膜に裂け
目が発生するのを防止し、上記厚膜抵抗体とこれに接続
する厚膜配線と間に接続抵抗の変動および断線が発生す
るのを防止することができるとともに、上記半田層のガ
ラス被膜上への流れ込みの抑制により上記ガラス被膜に
裂け目が発生するのを防止し、この裂け目により上記厚
膜抵抗体の安定化が阻害されるのを防止することができ
る。
Therefore, due to the reduction in thermal stress, cracks are prevented from occurring in the conductive thick film, and variations in connection resistance and disconnection between the thick film resistor and the thick film wiring connected thereto are prevented. In addition, by suppressing the flow of the solder layer onto the glass coating, the generation of cracks in the glass coating can be prevented, and the stabilization of the thick film resistor due to the cracks can be prevented. It can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは従来の厚膜抵抗体の作成方法の第1の作成段
階を示す平面図、第1図bは第1図aの■B−■B線で
の断面図、第2図aは上記従来の作成方法の第2の作成
段階を示す平面図、第2図bは第2図aの■B−■B線
での断面図、第3図aは上記従来の作成方法の第3の作
成段階を示す平面図、第3図bは第3図aの■B−■B
線での断面図、第4図aはこの発明による厚膜抵抗体の
作成方法の一実施例の第1の作成段階を示す平面図、第
4図bは第4図aの■B−■B線での断面図、第5図a
は上記実施例の第2の作成段階を示す平面図、第5図b
は第5図aの■B−■B線での断面図、第6図aは上記
実施例の第3の作成段階を示す平面図、第6図bは第6
図aの■B−■B線での断面図である。 図において、1は基板、2はサーメット厚膜、3は厚膜
抵抗体、4,4aはガラス被膜、5は半田層、6は厚膜
配線を示す。 なお、図中同一符号は夫々同一または相当部分を示す。
Figure 1a is a plan view showing the first manufacturing step of the conventional thick film resistor manufacturing method, Figure 1b is a sectional view taken along the line ■B-■B in Figure 1a, and Figure 2a is is a plan view showing the second production stage of the above conventional production method, FIG. 2b is a sectional view taken along the line ■B-■B of FIG. A plan view showing the production stage of 3, Fig. 3b is the same as ■B-■B in Fig. 3a.
4a is a plan view showing the first manufacturing step of an embodiment of the method for manufacturing a thick film resistor according to the present invention, and FIG. Cross-sectional view along line B, Figure 5a
is a plan view showing the second production stage of the above embodiment, FIG. 5b
is a sectional view taken along the line ■B--■B in FIG. 5a, FIG. 6a is a plan view showing the third production stage of the above embodiment, and FIG.
It is a sectional view taken along the line ■B-■B in Figure a. In the figure, 1 is a substrate, 2 is a cermet thick film, 3 is a thick film resistor, 4 and 4a are glass coatings, 5 is a solder layer, and 6 is a thick film wiring. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁部材からなる基板上に導電姓厚膜を作成する第
1の段階、この導電性厚膜上にこれを被覆しこれに接す
る両側端部を凹凸形状にしたガラス被膜を形成する第2
の段階、およびこのガラス被膜直下の部分を除く上記導
電院厚膜上に半田層を作成する第3の段階を備えてなる
厚膜集積回路装置の製造方法。
1. The first step is to create a conductive thick film on a substrate made of an insulating material, and the second step is to form a glass film that covers this conductive thick film and has uneven edges on both sides in contact with the conductive thick film.
and a third step of forming a solder layer on the conductive thick film excluding the portion immediately below the glass coating.
JP52058954A 1977-05-21 1977-05-21 Method for manufacturing thick film integrated circuit device Expired JPS588587B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52058954A JPS588587B2 (en) 1977-05-21 1977-05-21 Method for manufacturing thick film integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52058954A JPS588587B2 (en) 1977-05-21 1977-05-21 Method for manufacturing thick film integrated circuit device

Publications (2)

Publication Number Publication Date
JPS53143973A JPS53143973A (en) 1978-12-14
JPS588587B2 true JPS588587B2 (en) 1983-02-16

Family

ID=13099221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52058954A Expired JPS588587B2 (en) 1977-05-21 1977-05-21 Method for manufacturing thick film integrated circuit device

Country Status (1)

Country Link
JP (1) JPS588587B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59232485A (en) * 1983-06-15 1984-12-27 株式会社日立製作所 Thick film circuit board

Also Published As

Publication number Publication date
JPS53143973A (en) 1978-12-14

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