JPS5915492B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular, the semiconductor device is directed to a high frequency transistor (or IC) in which a high melting point metal film is interposed between a substrate and aluminum. do.

In general, in high frequency transistors or ICs, the impurity diffusion layer is usually very shallow, and is formed to have a thickness of 0.3 μm or less.

If such a shallow diffusion layer is used and the electrode wiring is formed using ordinary aluminum, the aluminum and silicon will mutually diffuse due to the temperature rise during the device manufacturing process, resulting in shallow base-emitter formation. There is a problem of shorting the junction.

Therefore, it is necessary to prevent the above-mentioned mutual diffusion, and as a means for this purpose, a high melting point metal film such as molybdenum, titanium, or chromium is interposed between the aluminum vapor deposited film and the silicon substrate.

The above-mentioned titanium and chromium react with aluminum at low temperatures, for example, 400 to 450° C., forming a gold-o intermetallic compound, which increases the conductor resistance of the wiring. For this reason, molybdenum is used, which does not react with aluminum at this temperature. However, if a wiring is formed using the above-mentioned layered film of aluminum and molybdenum, and a part of the wiring is used as a bonding pad (external connection part), and an aluminum wire is connected there by ultrasonic bonding, the substrate The pad part peeled off between the surface insulating film and the molybdenum, resulting in a bonding failure.

The fact that there were 30 such bonding defects became a big problem, especially in ICs, LSIs, etc. in which the number of bondings per pellet is large. As a result of investigating the cause of such delamination of the pad portion, it was found that due to the low adhesive strength between molybdenum and silicon oxide, which is the main component of the insulating film, the layer peeled off due to the large shear force that is applied during ultrasonic 35-wave bonding. It was revealed that it would be easier. Therefore, the present invention improves the bonding strength by making the bonding pad portion different from the wiring. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to improve the adhesive strength of a bonding pad using a wiring material to a substrate in a method of manufacturing a semiconductor device.

Hereinafter, the present invention will be specifically explained with reference to Examples. Embodiment FIG. 1 shows an example in which the present invention is applied to the manufacturing process of single-layer IC wiring.

(a) A base region 2 and an emitter region 3 of a transistor are formed on a Si (silicon) substrate 1 by a known method, and an SiO2 film 4 is formed by thermal oxidation or CVD (vapor phase chemical reaction) method on the surface of the substrate, and the emitter region The above SiO
A contact hole 5 is made in the two films.

(b) Platinum (P) was deposited on the Si substrate using a normal vacuum evaporation method.
t) is deposited.

After that, Pt-Si (platinum silicide) was heated at about 400℃ for several minutes to form a low resistance ohmic contact layer with Si.
Form layer 6. Note that Pt on the surface of the SiO2 film 4 is removed by etching. (c) Next, MO is sputtered over the entire surface using a normal sputtering device to deposit an MO film 7 to a thickness of about 1000 mm.

The reason for forming this MO film 7 is that if an Al film is formed directly on the Pt-Si layer 6, the Si in the Pt-Si layer 6 and its Al
This is to solve the problem of mutual diffusion. (
d) Al was deposited on the entire surface of the soil on which the SiO2 film 4 and M0 film 7 were formed on the Sl substrate 1.
An Al film 9 is formed to a thickness of 00λ.

(e) Form a first layer wiring pattern by photoetching.

At this time, bonding pads are not formed, but wiring is formed up to the connection portion with the pads. That is, the MO film 7 and A
The overlapping film with the L film 9 is simultaneously patterned to form a first wiring layer. (f) An interlayer insulating film, for example a SiO2 film 10, is formed by CVD to a thickness of 6,000 to 7,000. (Support) Contact holes (through holes) 11, 10a are formed in the interlayer insulating film by photoetching.

This through hole is formed to make sufficient contact with an Al underlayer 310 for a bonding pad to be formed later on. (h) Vapor depositing All over the entire surface, 1 to 1.5
An Al film 12 of μ is formed.

(1) Pattern 12 of second layer wiring by photo-etching
At the same time, a bonding pad 12b connected to the second layer wiring is also formed.

According to the present invention as explained in the embodiments above, the object can be achieved and the effects can be brought about for the following reasons.
(1) Most of the bonding area between the bonding pad and the SiO2 film has a structure in which the second layer of Al (5Si02) is directly connected, and the adhesive strength between Al and SiO2 is high. When connecting a bonding wire to this bonding pad, the bonding portion will not peel off even if a strong force is applied by ultrasonic bonding.

In addition, if the insulating film under this bonding pad is SiO2 formed by thermal oxidation, the SiO2
Since SiO2 is harder than SiO2 formed by CVD, energy absorption into the ultrasonic bonding SiO2 is not small. Therefore, the bonding wire is reliably connected to the bonding pad. (2) Conventional Al-MO
In the stacked structure, defects due to pad peeling occurred in about 1% of the number of bondings, but this was reduced to less than 0.01% by the present invention.

(3) Even in C, which has a two-layer wiring structure using MO-Al first-layer wiring and A2-only second-layer wiring, as in the present invention, it can be manufactured with the same yield as the bonding of general Al wiring C. be able to. (4) Contact holes 10a to the first layer wirings 7 and 9 are formed by selectively removing the interlayer insulating film 10
When forming the first layer wirings 7 and 9, the interlayer insulation film 10 is selectively removed so that the side surfaces of the first layer wirings 7 and 9 are covered with the interlayer insulation film 10. ,9
The SiO2 film 4 under the side surface is not side-etched. That is, if the interlayer insulating film 10 is removed so as not to cover the side surfaces of the first layer wirings 7 and 9, the SlO2 film 4 under the side surfaces of the first layer wirings 7 and 9 will be side etched. According to the present invention, side etching as described above can be prevented. Therefore, the second layer wiring 12a formed thereafter will not be broken at the side surfaces of the first layer wirings 7, 9. In addition to the embodiments described above, the present invention can be implemented in the following embodiments.

(5) MO film, that is, a high melting point metal that does not have a high adhesive strength to SiO2, is formed at least on the electrode contact portion of the semiconductor substrate, and at least the bonding strength necessary for the bonding pad portion and SiO2 is sufficient. Al
and SiO2 within a range that provides a bonding area.

The wiring from the electrode contact hole to the bonding pad should be made of Al or MO and A to reduce resistance.
It is desirable to have two layers of MO, and it is good to use MO alone, but this is not desirable because the resistance becomes significantly large. The present invention can be applied to all electrode formations of semiconductor devices such as transistors, ICs, and LSs, and is particularly effective in application to semiconductor devices for high frequencies and high-speed switching.

[Brief explanation of drawings]

FIG. 1a-1 is a cross-sectional view during the manufacturing process of a semiconductor device to which the present invention is applied. 1... Si substrate, 2... Base, 3...
...Emitta, 4...SiO2 film, 5.
...Contact hole, 6...Pt-
Si layer, 7... MO film, 9... Wiring (
1st layer) Al film, 9a... wiring, 9b...
...Bonding pad, 9c...Connection part,
10... Interlayer insulating layer (Si-02), 10a.
... Contact hole, 11 ... Through hole, 12 ... Second layer Al film, 12b ...
...bonding pad.

Claims (1)

[Claims] 1. A step of forming a first insulating film on the semiconductor surface, a step of selectively forming a wiring layer having a high melting point metal extending on the first insulating film, and a step of forming the first insulating film and the high melting point metal. a step of forming a second insulating film on the wiring layer having the high melting point metal, leaving the second insulating film so that the side surfaces of the wiring layer having the high melting point metal are covered with the second insulating film; a step of selectively removing a part of the second insulating film to selectively expose the surface of the wiring layer having the high melting point metal; forming a bonding pad made of aluminum that passes over the insulating film of No. 2 and extends to a portion where the wiring layer containing the high melting point metal is not formed.