JPS5922950B2 - EL display device drive device - Google Patents

Description

Detailed Description of the Invention (Summary) In a thin film EL having a hysteresis memory, writing or erasing is performed by instantaneously applying a voltage equal to or less than the maintenance AC amplitude under maintenance AC drive, and subsequent The present applicant has already filed an application as a prior invention for a technique for maintaining the light-emitting state or light-off state using a maintenance AC voltage.

The present invention relates to an AC hysteresis phenomenon, that is, a device for erasing only a specific desired portion (by line in the Y direction) in a thin film EL matrix panel having a memory function. □Prior Art□ First, the technology of the prior invention, which is the basis of the present invention, will be briefly explained.

First, the configuration of the EL display device will be explained.

As shown in FIG. 1, transparent electrodes 2 are arranged in a striped pattern on a glass substrate 1. On top of this, for example, a dielectric material 3 such as Y203
Further, on top of this, a phosphor layer 4 made of, for example, Mn-doped ZnS, etc., and further on top of that, a dielectric material 3' is deposited as a thin film of 500 to 10,000 A by vapor deposition, sputtering, etc. It has a three-layer structure, on which electrodes 5 perpendicular to the transparent electrodes 2 are arranged in a striped manner. With such a structure, when an appropriate AC voltage is applied to one of the first electrode group 2 and one of the second electrode group 5, a small area where the two electrodes intersect and are sandwiched. This corresponds to one pixel on the screen. An EL display device can be constructed by sandwiching the fluorescent layer 4 that emits EL between the dielectrics 3 and 3' and further forming the electrodes 2 and 5 thereon, but as described above, the formation of the electrodes 2 and 5 is difficult. By forming a grid, a matrix display panel can be formed. EL with this structure has low brightness and lifetime. Conventional decentralized E in terms of stability
Although it has characteristics superior to L elements, each picture element newly exhibits a hysteresis phenomenon between luminance and applied voltage as shown in FIG. 2b.

To explain this characteristic according to Fig. 2, when a pulse of voltage amplitude V is first applied as shown in Fig. 2 a, the luminance will change to B and c in the same figure.
As shown, it is at the B1 level. Maintain voltage V1 here
is 1≧Vth, where Vih is the light emission threshold voltage. When write voltage 2 is applied to this, the brightness increases all at once to B3, and even if the voltage value is returned to the maintenance voltage V, the brightness settles to B2, which is higher than B1.When erase voltage V is applied to this, the brightness increases to B3. The level decreases rapidly and again the maintaining voltage is 1
When the brightness is returned to B, the brightness settles to B. These temporal relationships are indicated by the symbols Tl, t3...I2,
are shown by corresponding to the positions of the same symbols in FIG. This hysteresis phenomenon can take any small loop depending on the amplitude and pulse width (not shown) of the write voltage, as shown by the thin line in FIG. 2b. That is, it is also possible to display halftones. A major feature of the ELP, which is not found in other display elements, is that once a write voltage is applied, each picture element continues to emit light without losing the gradation given to it by the sustain pulse. The above voltages vary greatly depending on the composition, film thickness, and applied waveform, but in a prototype example, Vth=200V1V,
=210V12-210~230V, V3-190V
It is. The present invention relates to an improvement of the "EL display device driving device" (Japanese Patent Application No. 88510/1989) that was previously invented by the inventors, and aims to provide a circuit that enables line amplitude cancellation. purpose.

The structure of the present invention will be explained below using Examples.

<<Preferred Embodiment>> FIG. 3 shows an embodiment of the present invention.

This diagram consists of six major blocks. In the first block, a sustain drive circuit 10 performs three-phase resonance sustain drive.

The second block is a write switch circuit 20, which is a switch circuit for applying a write voltage W to the X line to be written in the write phase. In the circuit description to be described later, the X line will be treated as a barrier scanning line.

The third block is a data switch circuit 30.

All switches are short-circuited (connected) during maintenance operation.
In the write phase, only the Y line to be written is kept short-circuited, and the non-write Y line is opened. The fourth block is a write line isolation and sustain amplitude hold circuit 40. This is a circuit for separating the scanning write lines in the X direction and a diode circuit for maintaining the resonance drive amplitude at the same time. The fifth block is a matrix panel 50 as shown in FIG.
It is.

The sixth block is a line erase circuit 60 according to the present invention.

Further, FIG. 4 shows the switching pulse a, the drive voltage waveform BxY line drive voltage waveform c applied to the X line, and the voltage waveform d applied to each picture element. The specifications of the 8-inch EL panel prototyped by the inventors are line pitch: 2 lines/Ml. x
320 lines (transparent electrode side), 240 Y lines (rear aluminum electrode side) Displayed characters: 64 types of Roman letters, Arabic numerals, and symbols in 5 x 7 dot configuration Number of displayed characters: X direction (scanning side) 52 characters Y direction (Data side) 24 lines Maximum number of display characters: 1248 characters Number of effective display lines: 260 lines in the X direction (character spacing of 1 line) and 168 lines in the Y direction (line spacing of 2 lines).

In order to maintain and drive the above EL panel, the circuit shown in FIG. 5 was prototyped. In this figure, U: Oven collector TTL Tr: Switching transistor T1: Interstage coupling transformer D1: Protection diode D: Holding diode T゜Resonant transformer, and other symbols are the same as in the previously explained drawings. It is used for meaning.

In this circuit, circuit constants, inductance of resonant transformer: L = 29mH Panel capacitance when connecting effective display line number: CT = 0.377μFφ1Pφ29φ3 ~ Pulse width: 200μSec Repetition of each pulse: 330Hz,
As a result of resonance driving, the natural frequency was 4 to 5 kHz.

Based on the above circuit constants and driving results, we have determined the on-resistance of the transparent electrode resistance RTl switching transistor of the thin-film EL panel, the large amplitude of the thin-film EL, the nonlinear loss in driving, the forward resistance of the diode, and the loss of the coil. etc. are all calculated as constant resistance Rp loss Rp = 115Ω ~ 12
It was about 5Ω.

From this, the damping constant: 1n- Vibration condition 1〉? TnAT9 attenuation conditions when the following is true. However, C is the capacitance value L of the capacitance component C is the inductance R of the coil L (the sum of the resistance values of the electrodes and each part of the circuit π η = Exp (-α) are both 0.30 ~ 0.321 is calculated as the natural frequency when LC4L2 holds true.

Returning to FIG. 4, three-phase resonance maintaining drive will be explained. In this figure, π H-2exp(-α-) f β:Arctan(-) α.

To simplify the explanation, it is best to think of the coefficient η as a coefficient that indicates the ``extra'' increment of the potential applied to the capacitive element C after a half cycle of LC resonance with respect to the potential difference applied to the LC circuit. . The exact formulation of the coefficient η was given in the explanation of the invention of the prior application. Now, in FIGS. 4 and 5, when the first holding switch SWl is closed at the first timing φ1, the difference between the third holding potential H and the first power supply potential E is applied to the capacitive element CT.
(In this figure, the entire EL display panel is considered to be a capacitive element CT with approximately constant capacity), and is overlined by η times this potential difference, so that the first holding potential 1=E1+η(
B, -H) ......... It is held in [7].

Similarly, when the second holding switch SW2 is closed at the second timing φ2, the second holding potential -2--E2-η(, +E
2) ...... (8), and then, when the third holding switch SW3 is closed at the third timing φ3, the third holding potential H=ηV2...・・・・・・
...(9).

In this way, three-phase drive was realized. In this way, multi-phase sustaining drive with three or more phases is performed at an intermediate holding potential (
In this embodiment, data switch elements DSl, DS2, . . .
This is to reduce the pressure resistance requirements of... As shown in FIG. 4, writing is performed by selecting the X and Y sides of the writing picture element M (J, i) by the write switch circuit 20 and data switch circuit 30, respectively, during the intermediate holding period (H period). Let's do it.

Next, the erase circuit 60 that constitutes the main part of the present invention will be explained.

The line erase circuit 60 is connected to each data switch DSl, DS2, . . . DS, which constitutes the data switch circuit 30.
A data line separation diode DE is inserted in series from the connection line between the display matrix panel 50 and the display matrix panel 50, and the other ends (anode side) of the diodes DE are connected in common and connected to one end of the erase switch SE. The other end is connected to the erasing voltage line VE connected to the power source E3.

Next, to explain the line erase operation for the written picture element of line Yj with reference to FIG. 6, the phase pulse φ of sustain 1 drive
1, the erase switch SE is turned on before the switch SWl is turned on, and the data side switch DSj is turned off. On the other hand, the data side switch DSt8j of the line whose sustain drive is desired to continue remains on. In this state, when the scanning side lines Xl, x2, . . . . . .
Increase the amplitude until it is clamped. That is, switch S
When Wl is turned on, all scanning side lines Xl, X2...
・When the sustain amplitude voltage s is applied to Xn, the line Yj
An erase amplitude voltage of canceled voltage s-E is applied to all the picture elements above. This erase amplitude voltage will be applied. This erase amplitude voltage corresponds to the voltage shown in FIG. A sustain amplitude voltage Vs is applied to the data lines Yt\j other than the erase line Yj. In this way, the erase amplitude voltage is applied only to the specific data line Yj to be erased, the amplitude of all written picture elements on the line Yj is erased, and the other lines Yt8j maintain their previous states with the sustain pulse.

In the above description, the case where line Yj is erased has been described, but the number of lines selected for erasure can be set to any number. Furthermore, the pulse width of the erase voltage VE applied to the line Yj is equivalent to one sustain pulse, and erasing is performed only once, but the more times the erase pulse is applied, the greater the difference in brightness from the time of writing. Therefore, it is optimal to apply the erasing pulse 4 to 5 times, although this is related to the luminance of the light emitted.

Therefore, the pulse width of the erase voltage VE is selected to be as large as four to five sustain pulses. Alternatively, while four to five sustain pulses are applied, an erase voltage is applied immediately before each sustain pulse is applied. A detailed circuit diagram of the data switch circuit 30 and erase circuit 60 is shown in FIG. Data switch DS,,
DS2... DSn is made up of a transistor, and the erase switch SE is made up of a transistor. Controlled on/off. <<Effects of the Invention>> As described above, the present invention applies the erasing amplitude voltage E in the direction of canceling the sustain amplitude voltage s to the electrode opposite to the electrode side to which the sustain pulse is applied during sustain drive, and Line erasing is performed by applying an erasing voltage to the lines.

Therefore, the erase power supply may be a circuit that generates a voltage equal to the difference between the sustain drive voltage and the erase voltage, and since this voltage is lower than the erase voltage, a low voltage power supply may be provided. In the example of the present invention, the voltage was 25V. Furthermore, since the erasing voltage is applied in the phase when the sustain drive voltage is applied, there is no need to specially set the erasing phase, and therefore the duty of the sustain drive pulse is not reduced.

[Brief explanation of the drawing]

Fig. 1 is a partially cutaway cross-sectional view of a thin film EL display element, Fig. 2 is a characteristic curve diagram of applied voltage and luminance to explain the operation of the element, and Fig. 3 is an embodiment of the present invention. The block diagram of the example, FIG. 4 is an operating waveform diagram during sustain drive of this embodiment, FIG. 5 is a partial circuit diagram of this embodiment, and FIG. 6 is an operating waveform during erase operation of this embodiment. 7 are essential circuit diagrams of an embodiment of the present invention. 2 is a transparent electrode, 4 is an EL layer, 5 is a back electrode, Xl, x,
......Xn is the scanning side electrode, Y,, Y2...
......Yn is the data side electrode, SWl, SW2,
SW, is a sustain switch element, PSl, PS2...
...DSn is a data switch element, SE is an erase switch element, and E3 is an erase power supply.

Claims (1)

[Claims] 1. In a driving device for an EL display device having a history characteristic between the voltage applied between the two electrodes and the emission brightness, one of the two electrodes arranged in a matrix is used as a scanning side electrode and the other as a data side electrode, means for connecting a sustaining amplitude voltage source to the scanning side electrode, and simultaneously applying a sustaining amplitude voltage to all electrodes of the matrix while keeping the data side electrode in a grounded state; Only the electrode of the desired line is disconnected from the above-mentioned ground state, and while maintaining the connection of the sustain amplitude voltage source of the above-mentioned scanning side electrode and the ground state of the other data-side electrodes, the above-mentioned disconnected data-side electrode is applied to cancel out the above-mentioned sustain amplitude voltage. 1. A driving device for an EL display device, comprising: means for applying a voltage substantially serving as an erasing voltage.