JPS5933979B2 - semiconductor equipment - Google Patents

Description

[Detailed description of the invention] The present invention relates to semiconductor integrated circuits.

A multilayer wiring structure is used in semiconductor devices, especially semiconductor integrated circuits, and a metal wiring layer that constitutes one wiring layer of the multilayer wiring structure, such as an aluminum wiring layer, and a silicon substrate provided in a silicon substrate that constitutes another wiring layer. Electrical contact is obtained through contact holes provided in the insulating layer and the diffusion layer or polycrystalline silicon wiring layer, which has a conductivity type different from that of Alloying is carried out. However, alloying between wirings progresses more than necessary in the contact hole portion, or progresses locally to a large extent, causing deterioration of the p-n junction and disconnection of the multilayer wiring layer. The present invention provides a highly reliable and high yield semiconductor device, particularly a silicon semiconductor integrated circuit, by controlling the alloying reaction. 5 A conventional example will be explained using FIGS. 1 to 3.

That is, after forming an oxide film 2 on a p-type silicon substrate 1 using, for example, a thermal oxidation technique, a window is opened in the oxide film 2 in the transistor formation and diffusion wiring area using a conventional photolithography method. Thereafter, using thermal oxidation technology, polycrystalline silicon growth technology, photo-etching technology, etc., the gate electrode 3 made of polycrystalline silicon, the wiring layers 4 and 5 constituting one layer of the multilayer wiring, the electrode 3 and the gate oxide film 6 are formed. Form. After that, phosphorus is diffused to form the drain region 7 of the MOS transistor.
At the same time as forming diffusion regions such as the source region 8 and the source region 8, impurities are added to the polycrystalline silicon gate electrode 3 and the wiring layers 4 and 5 to make them low in resistance. After forming a low temperature oxide film 9, drain region T, source region 8 and wiring layers 4, 5 are formed.
Contact holes 10, 11, 12, and 13 are formed using photo-etching to obtain electrical contact with the other layers, and aluminum wiring layer 14, which constitutes the other layer of the multilayer wiring structure, is formed using vapor deposition and photo-etching. , 15, 16 are formed. After that, drain region 1, source region 8 and polystyrene;
In order to obtain good ohmic contact between the crystalline silicon wiring layers 4 and 5 and the aluminum wirings 14, 15 and 16, respectively, heat treatment is performed at 500° C. for 15 minutes in a nitrogen atmosphere, for example. During this heat treatment, silicon and aluminum react and form an alloy, but if the amount of aluminum connected to the contact area is large, the polycrystalline silicon wiring layers 4 and 5 will be disconnected as shown in FIG. Part 17 occurs,
Further, the reaction progresses locally, and the pn junction characteristics, which are formed by the p-type silicon substrate 1 and diffusion regions such as the drain region 7 and the source region 8, are often deteriorated. In other words, silicon melts into aluminum in a certain amount at a certain temperature and further diffuses into the aluminum, but only a narrow, e.g., long aluminum wiring of 10 μm in width comes into contact with the silicon through a contact hole of, for example, 6 μ x 6 μ in size. In the case where the aluminum wiring is provided with silicon, sufficient silicon is supplied to the aluminum wiring, but if the aluminum wiring 16 which is wide, for example, wider than 10μ, comes into direct contact with the contact holes 12 and 13 of 6μ x 6μ in size, and is placed under the contact or with the contact If there is not enough silicon to be supplied to the aluminum wiring 16 within 30μ from the periphery of the holes 12 and 13, silicon will be supplied from the polycrystalline silicon wiring layer around the contact area, and as a result, disconnections 17 will often occur, for example, the size As in the 6μ x 6μ contact hole 11, for example, an aluminum wiring 16 with a width of more than 10μ is placed within 30μ from the end of the contact hole, for example, with a width of 10μ.
If there is no silicon supply source for the aluminum wiring 16 nearby other than the source region 9, the reaction often progresses locally because silicon is mainly supplied from the end of the contact hole. As shown in FIG. 3, an alloy layer 20 is formed that penetrates through the p-n junction 18, causing the p-n junction 18 to deteriorate. If the drain region 7 is in contact with the aluminum wiring 14 having a width wider than 10μ, for example 20μ, and there is no sufficient silicon supply source nearby to supply the aluminum wiring 14 other than the drain region 7, the edge of the contact hole Similar to the contact hole 1V, an alloy layer 19 is formed near the aluminum wiring 14 through the p-n junction, deteriorating the p-n junction 18, and the above-mentioned disconnection or Even if penetration through the alloy layer does not occur, silicon diffuses due to electromigration during the operation of the semiconductor device, causing the above phenomenon, which causes a decline in the yield and reliability of semiconductor devices, especially integrated circuits. Conventional improvement methods to eliminate these drawbacks include forming a thin layer of a metal that does not easily react with the silicon substrate, such as titanium, in the contact area, followed by forming an aluminum wiring, or forming a polycrystalline silicon film or an epitaxial layer. Although aluminum wiring layers and deep diffusion layers were used,
Natan has the disadvantage that it has a high melting point and is difficult to evaporate, and in the case of a polycrystalline silicon film, the contact resistance is high, and in the case of an epitaxial layer, the process is complicated, and integration cannot be achieved if a deep diffusion layer is provided. There was a drawback.

The present invention prevents the above-mentioned disconnection of the polycrystalline silicon wiring layer and penetration of the pn junction of the Al-Si alloy layer by providing an opening in the metal wiring near the contact hole. This aims to improve the stability and reliability of the system. An embodiment of the present invention will be described below with reference to the drawings.

The method is the same as the conventional method except that the shape of the aluminum wiring in FIG. 4 is different. To explain this embodiment in more detail, in FIG. 4, an aluminum wiring with a width of, for example, more than 10μ is provided within 30μ from a contact hole, and a silicon supply source is sufficient to supply silicon to the aluminum wiring near the contact hole. If not, for example, the size 6μ
For example, an aluminum wiring 15' having a width of 10μ and a length of 15μ (a=15μ) is connected to a wire with a width of 3 through the contact hole 11'.
When connected to the aluminum wiring 161 of 0μ (e-30μ), the effective length is 20μ or more (b=5μ, c=2
10μ) An opening 17' having a width of, for example, 6μ (d=6μ) is provided in a part so that an aluminum wiring having a width of 10μ is connected to the source region 8' via a contact hole 1V. By providing the opening 17', the diffusion of silicon into the surrounding aluminum layer is suppressed, and as a result, the so-called (Al penetration) phenomenon can be prevented.The effective line width of the aluminum wiring 16'f is 24μ. (e-d=24
μ) is less than 30μ, but if the current capacity is sufficient, there is no need to increase the width of the aluminum wiring 16'f). If the current capacity of the wiring is not sufficient, the effective line width (e-d) can be adjusted by changing the opening 17 as shown in the latter two embodiments.
The line width can be made equal to the line width of 30μ before providing the line width. Also width 10
An aluminum wiring with a diameter larger than μ directly contacts a polycrystalline silicon wiring layer or a silicon diffusion layer through a contact hole in the middle of the wiring, and there is not enough silicon supply source to supply enough silicon to the aluminum wiring near the contact hole. For example, the size is 6μ×6μ
Openings 18', 19', 20' of, for example, 6μ (d-6μ) are provided on both sides or one side of the contact holes as in the contact holes 12', 13', and contact is made to, for example, the polycrystalline silicon wiring layers 4 and 5. The line width of the aluminum wiring directly connected through holes 12' and 13' is 10μ (f=g=10μ) and the length is 20μ or more (h>
20Li>20μ). As a result, disconnection of the polycrystalline silicon in the contact hole is prevented, and if the current capacity of the aluminum wiring 16' is insufficient by providing the openings 18', 19/20', the opening 18
The protruding portions 2V and 22' can be provided on the desired side of the aluminum wiring 16' so that the effective aluminum line width is the same as before providing the bulges 2V and 22' (j+f+
k=g+1=30μ). Further, if a wide aluminum wiring is directly connected to a silicon diffusion layer or a polycrystalline silicon film through a contact hole, and there is not a sufficient silicon supply source near the contact hole, for example, a 6μ x 56μ contact may be connected to the drain region 7'. When the aluminum wiring 14' is contacted through the hole 10', an opening is provided in the wide aluminum wiring 141, and the width of the contact hole 105 is 20μ or more (m≧
For example, the line width is 10μ at the position of 20μ), and the spacing is 20μ.
Two aluminum wires 23 with μ (n=20μ)
',24'. As a result, the so-called Al penetration phenomenon in the drain region 7' could be prevented. As described above, by providing an opening to suppress the diffusion of semiconductor material in a wide metal wiring region, the diffusion of silicon from the patterned Pn junction layer or semiconductor film connected via the contact hole is suppressed. , it is possible to prevent penetration and disconnection of the p-n junction.

Furthermore, the above-mentioned problem is more pronounced when the contact hole is provided in the middle of a wide metal wiring region than in a location where the contact hole is provided outside the wide metal wiring region. Further, restrictions on contact hole positions are significantly relaxed, making it possible to facilitate the design of integrated circuits. Although the opening may be formed in a part of the thickness of the metal wiring, it is effective to form a through hole that penetrates the thickness of the metal wiring in order to prevent penetration and disconnection.

It can also be applied when a wide aluminum wiring is in direct contact with a diffusion layer such as a drain region or source region through a contact hole, or when making contact on a polycrystalline silicon gate electrode. . Further, in the above embodiments of the present invention, the case of an n-channel silicon gate MOS type integrated circuit has been described, but it is not limited to an n-channel, but may also be a p-channel, and not only a silicon gate but also an aluminum gate, and a MOS type integrated circuit. It goes without saying that the opening is not limited to the above example, and can be modified in various ways without departing from the gist of the present invention. Further, although silicon is used as the semiconductor substrate and the polycrystalline semiconductor layer, other semiconductor materials such as germanium, gallium arsenide, and combinations of these materials may also be used without departing from the spirit of the present invention. Further, although aluminum is used as the metal wiring layer, other materials may be used as long as they do not depart from the spirit of the present invention.

[Brief explanation of drawings]

1 and 2 are a sectional view and a plan view, respectively, showing the structure of a conventional n-channel silicon gate MOS integrated circuit, FIG. 3 is a sectional view illustrating the conventional example, and FIG. 4 is an embodiment of the present invention. It is a top view explaining an example.

Claims (1)

[Scope of Claims] 1. A contact hole is provided in the middle of a wide metal wiring area so as to overlap the area, and the contact hole is connected to the wide metal wiring area near the contact hole via the contact hole, and patterned p
A semiconductor integrated circuit characterized in that an opening is provided to suppress diffusion of semiconductor material from the n-junction layer or the semiconductor film to the wide metal wiring region. 2. The semiconductor integrated circuit according to claim 1, wherein the opening is a through hole that penetrates the thickness of the metal wiring.