JPS5937835B2 - Driving method of image display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image display device that displays moving images such as television images using an EL element having a memory function.

Semiconductor light emitting thin films such as ZnS and ZnSe doped with Mn are used as Y203, Si3N4, TiO2, SiO, SiO2
A three-layer structure ZnS:Mn (or ZnSe:Mn) thin film EL device sandwiched between dielectric thin films such as Ta2O5 emits high brightness when an AC voltage is applied, and has a long lifespan. have.

Furthermore, the light emission of this thin film EL element has a hysteresis characteristic in which the luminance of the light emitted by the same applied voltage value differs in the process of increasing the applied voltage and in the process of decreasing the voltage from the high voltage side. It was discovered that in the process of increasing the voltage applied to an EL element with this hysteresis characteristic, when light, electric field, heat, etc. are applied, the EL element is excited to a state of luminescence brightness corresponding to the intensity. It is known that there is a memory phenomenon in which the luminance remains in a high state even after the light, electric field, heat, etc. are removed and the state is returned to its original state. Generally, when an EL element is used as a display element, a matrix type electrode arrangement is adopted as shown in FIGS. 1a and 1b.

In Fig. 1, 1 is a glass plate, 2 is a transparent electrode arranged in a grid pattern, 3 is a dielectric material such as Y202, 4 is a light emitting layer such as ZnS doped with Mn, etc., 3' is the same dielectric material as 3, Reference numeral 5 denotes a back electrode made of aluminum or the like and arranged perpendicular to the electrode 2. When an appropriate AC voltage is applied to one of the transparent electrode group 2 and one of the back electrode group 5 in an element having such a structure, only the portion where these two electrodes intersect will emit light. This corresponds to one picture element on the screen. Figure 2 a, b, 'c shows the relationship between the applied voltage and luminance when a bipolar pulse is applied to one pixel of the matrix type EL element.
Shown below. As shown in Figure 2a, , , and 2 are applied to the EL element.
When a sustain pulse of amplitude ±vs is applied at the timing of , the luminance of light emission is Bs as shown in FIGS. 2b and 2c. Next, when a write pulse of amplitude Vw is applied at timing 3, light is emitted instantaneously at a brightness of Bw, and when a sustain pulse of amplitude Vw is applied at timing 4 to 8, the emission brightness is Bw.
It becomes w. Next, at the timing of 9 to tl, the amplitude tester VE
When an erasing pulse of Tl2,t is applied, the luminescent layer intensity decreases and
, 3, the sustain pulse emission brightness applied at 3 becomes Bs again. There is a history characteristic between the luminance of light emission and the applied voltage as shown in FIG. 2b. A display method of an image display device incorporating an EL element having the above characteristics as a display panel will be explained with reference to FIGS. 3 and 4. Figure 3 is (
EL with matrix electrode structure having picture elements of m><n)
1 is a basic configuration block diagram of an image display device having a panel.

(Xl,X2...,Xm,)(Yl
, Y2, . . . , Yn) are electrode groups arranged horizontally and vertically, respectively.

The composite video signal input from 6 is separated into a video signal and a synchronization signal by a signal separation circuit 7, and each is guided to a signal processing circuit 8 and a timing control circuit 9.

The signal processing circuit 8 sequentially samples the video signal and sends it to the holding circuit 10. Write pulses modulated from the write pulse generator 11 in accordance with these signals are applied to the electrode groups Xl, x2 . . . , Xm through the output drive circuit 12. On the other hand, sustain pulses, erase pulses, and selection pulses are applied from each generator 14, 15, 16 to the electrode groups Yl, Y2, . . . , Yn through an output drive circuit 17. The flow of these series of signals is controlled by a timing control circuit 9 which synthesizes the clock from the clock generation circuit 13 and the TV synchronization signal to generate timing pulses. Of the picture elements that make up the display panel arranged in this way,
When only desired picture elements are selected, since each electrode is common to picture elements in each horizontal or vertical row and each column, it is necessary to devise a method for applying voltages to each electrode. Now, as shown in Figure 3, n rows m
Of the picture elements made up of rows of electrodes, the i-th row electrode
i. l! l: Picture element 1 intersecting at the j-th row electrode Yj,
Electrodes Xi, Yj and picture elements 1, j when light emission is maintained by a sustain pulse after writing and then erased
Time charts of the voltage waveforms Xl, YJ, (1, j) applied to are shown in FIGS. 4A, b, and c.

FIG. 4d shows the light emission waveforms of picture elements 1 and j corresponding to the above applied voltage when an EL panel is used. 7 in Figure 4
is a write pulse, ◎ is a sustain pulse, and O is an erase pulse. Also, O is a write signal pulse given to the column electrode, 8
is the row select pulse. The line sequential scanning method, which is commonly used in such matrix type displays, is a method in which the erase pulse and the row selection pulse are sequentially selected row by row to cause each row to sequentially emit light. Therefore, when displaying on a panel with a memory, unless overwriting is performed, each picture element is given a pulse, regardless of whether it is a multi-gradation display or a binary display.

Here it is. Note that each pulse may be a single pulse or a plurality of pulses. In this case, for each pixel, TN is the non-emission period, T3
is the luminescence period. Therefore, when writing and erasing are performed at regular intervals as in T display, the larger the ratio of the Tw period to the TN period, the brighter the screen becomes, making the panel with memory suitable for large screen display. In a standard television signal, one frame consists of a first field and a second field.

Writing of video signals is performed line sequentially, in which signals for one horizontal scanning line are written simultaneously, and when an interlaced method is adopted, the odd numbered lines (Yl, Y3,
Odd number electrodes such as Y5, etc.), even number lines (Y2, Y4, etc.)
, Y6, . . . ) are switched for each field (1/60 second) as shown in FIG. In FIG. 5, the cross mark indicates the timing of applying the erase pulse, and the mark O indicates the timing of applying the write pulse. 3/3 of the total period after the write pulse is applied until the erase pulse is applied.
No. 4 emits light, and the image display speed is 15 images/second.
In this case, there remain problems such as flicker being slightly noticeable and fast-moving images being unable to be followed. In view of the above-mentioned current situation, it is an object of the present invention to effectively solve the above-mentioned problems by providing a circuit system capable of displaying images at a speed of 30 frames per second.

FIG. 6 shows a timing chart that is one embodiment of the present invention. The video signal is written in a line-sequential manner, and interlaced scanning is performed. In the first field of the television signal, the odd lines of the matrix panel are written and the even lines are erased. Second
In the field, the odd lines of the matrix panel are erased and the even lines are written. During the period (1/2 of the total period) from the application of the write pulse until the application of the erase pulse, light is emitted due to the sustain pulse. If write and erase pulses are applied at the timings described above, flickering will no longer occur. As an example, when the number of vertical scanning electrodes of the matrix panel is 160,
FIG. 7 shows the relationship between various timing pulses.

When performing interlaced scanning, if a write pulse is applied to the odd lines of 80 electrodes during one field (1/60 second), the write pulse will be applied to the 80 even lines in one field. Ru. In a standard television signal, the number of scanning lines included in one field is 2.
Of these, approximately 240 include video signals. It is sufficient to count 240 horizontal synchronization signals with a counter and take out 80 of them. In FIG. 7, Vp is a vertical synchronization signal and Hp is a horizontal synchronization signal. PR is a signal generated based on the Vp signal, and is used as the timing to start counting 240 Hp signals. SPL is a signal indicating a sampling period. SEL is a write selection pulse, which is used to select the vertical scanning electrode to which the write pulse is applied. 7th
As shown in the figure, in the first field, the odd numbered electrodes (Yl, Y3, Y5, Y7・゛゜゛・Yl
59), write selection pulses are applied one by one. P.E.
M is a negative voltage erase pulse and PEP is a positive voltage erase pulse.
O). For example, six erase pulses shown in the figure may be applied to the Y2 electrode. The number of erase pulses can be varied by timing considerations. P.S.
M indicates the timing of applying the negative voltage sustaining pulse, and Psp indicates the timing of applying the positive voltage sustaining pulse. The reason why P8M (5PSP is applied successively) is to reduce the unevenness in luminance due to the transient characteristics of EL. In the example shown in Fig. 7, the sustain pulse is generated every 25 horizontal synchronizing signals, and the period is Approximately 1
．． It is 6 msec. In the second field, the lines to which write selection pulses and erase pulses are applied are reversed for odd and even lines. The timing for generating the write selection pulse and the erase pulse can be considered in the same way as in FIG. FIG. 8 shows a block diagram of the configuration of an image display device adopting the method of the present invention.

A composite video signal inputted from the input terminal 19 is separated into a video signal 21 and horizontal and vertical synchronization signals 22 by a signal separation circuit 20 . The video signal 21 is further temporally extracted by a signal processing circuit 23 using sampling pulses, and the analog signal is converted into a digital signal, which is held for a certain period of time in a holding circuit 24. After that, a horizontal drive circuit 25 extracts a signal from a horizontal electrode of an EL panel. applied to groups X1 to Xm.
Reference numeral 26 denotes a clock pulse generation circuit, and a signal from this circuit is combined with horizontal and vertical synchronization signals 22 in a timing pulse generation circuit 27 to generate timing control signals for each circuit.

28 is a selection pulse timing signal generation circuit 29 is an erase pulse timing signal generation circuit, and matrix circuit 3
1, the selection/erase pulses are combined and applied to 32 vertical 1 drive circuits.

30 is a sustain pulse timing signal generation circuit, and an output signal is applied to the vertical 1 drive circuit 32.

The output of the vertical 1 drive circuit 32 is the vertical electrode group Y of the EL panel.
1 to Yn. As explained in detail above, if the image display speed is set to 30 frames per second, flickering can be eliminated and a good image can be obtained.

[Brief explanation of the drawing]

Figures 1A, b are partially cutaway perspective views and cross-sectional views of a matrix structure EL element, and Figures 2A, b, and c are pulse waveforms applied to the EL element, the relationship between EL luminance and applied voltage, and Figure 3 is a block diagram showing the basic configuration of the image display device, Figure 4 is a time chart of the voltage waveform applied to the image display device in Figure 3, and Figure 5 is a diagram showing the image display device. Timing chart when the speed is 15 sheets/second,
Fig. 6 is a timing chart when the image display speed is 30 frames per second, Fig. 7 is a timing chart of various pulse signals, and Fig. 8 is a plot showing the configuration of an image display device adopting the method of the present invention. It is a diagram.

Claims (1)

[Claims] 1. In an image display device that has a history characteristic between applied voltage and luminance and performs moving image display by applying a pulse voltage to a matrix electrode structure, the electrode lines of the matrix electrode structure are divided into groups. the first electrode line group and the second electrode line group,
The electrode line group and the second electrode line group are made to correspond to an erasing period and a writing period, respectively, in one field, and the erasing period and the writing period are set alternately to each of the electrode line groups for each field, and an image is displayed. A method for driving an image display device characterized by increasing the speed.