JPS6030111B2 - semiconductor equipment - Google Patents

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a semiconductor device.

[Technical background of the invention and its problems]

Conventionally, for example, a semiconductor device 8 having a bipolar structure shown in FIG. After forming the base diffusion layer 5 and the emitter diffusion layer 6, an oxide film is formed on the exposed surface thereof, and contact holes communicating with each of the diffusion layers 4, 5, and 6 are formed in this oxide film by a well-known photolithography method. An extraction electrode 7 is formed through this contact hole.

However, if dust or the like adheres to the surface of the oxide film when contact holes are formed by photolithography, the holes will reach areas other than those corresponding to the predetermined diffusion layers 4, 5, and 6, resulting in short circuits. There was a problem that this caused the production of defective products.

Further, since a process is required to form such a contact hole, there is a problem in that the quality of the product is significantly reduced.

[Purpose of the invention]

An object of the present invention is to provide a semiconductor device with improved device characteristics and improved yield.

[Summary of the Invention] The present invention provides a semiconductor in which a silicon carbide film connecting an extraction electrode is formed on a semiconductor substrate under extremely high ohmic contact and with high shape accuracy, thereby achieving an improved yield. It is a device.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of one embodiment of the present invention.

1 in the figure is a P conductivity type semiconductor substrate. An epitaxial growth layer 12 is formed on the surface of the semiconductor substrate 10 with a buried layer 11 interposed therebetween. Epitaxial growth layer 12
A P-conductivity type base diffusion layer 13 having a predetermined diffusion depth from the surface and an N-conductivity type collector diffusion layer 14 having a diffusion depth reaching the buried layer 11 are formed in a predetermined region. . An emitter diffusion layer 15 of N conductivity type is formed in a predetermined region of the base diffusion layer 13 to a predetermined diffusion depth from the surface thereof. Further, on the surface of the epitaxial growth layer IZ2, an oxide film 1 is formed so as to insulate and separate the base diffusion layer 13, emitter diffusion layer 15, and collector diffusion layer 14.
6 is formed. An extraction electrode 18 is formed on the surfaces of the base diffusion layer 13, emitter diffusion layer 15, and collector diffusion layer 14 via a silicon carbide Z film IT containing a high melting point metal. Here, the high melting point metals include tungsten (W), molybdenum (Mo), vanadium (V),
It is desirable to use titanium (Ti) or the like.

The content of the high melting point metal in the silicon carbide film 17 may be such as to impart a predetermined electrical conductivity to the silicon carbide film 17. Further, the thickness of the silicon carbide film 17 is the same as that of the semiconductor substrate 1.
0100 to 8000 depending on the specifications of the element to be formed
It is desirable to set it appropriately within the range of A. According to the semiconductor device 19 configured in this manner, the extraction electrode 18 is formed on the surfaces of the base diffusion layer 13, the emitter diffusion layer 15, and the collector diffusion layer 16 via the silicon carbide film 17. The process of forming an oxide film and opening a contact hole in a predetermined region of the oxide film to form the electrode 18 is no longer necessary, and the yield of products can be significantly improved.

Next, a method for manufacturing a semiconductor device according to an embodiment will be described.

First, as shown in FIG. 2A, an epitaxial growth layer 12 doped with n-type impurities is formed on the surface of a p-conductivity type semiconductor substrate 10 on which an n-conductivity type buried layer 11 is formed in a predetermined region. do.

Next, as shown in FIG. 1B, a collector diffusion layer 14 is formed in which n-type impurities such as antimony (Sb) and arsenic (As) are diffused into a predetermined region of the epitaxial growth layer 12 by selective diffusion and reach the buried layer 11. form.

Next, a p-type impurity such as boron B is diffused into a predetermined region of the epitaxial growth layer 12 to form a base diffusion layer 13, and then a p-type impurity is diffused into a predetermined region of the base diffusion layer 13 to form an emitter diffusion layer. form 15. After that,
As shown in Figure C, plasma C. V. D
．． Chemical Vapor Deposit
on), a silicon carbide film 17 made of silicon carbide having oxidation resistance is formed by sputtering or the like.

The thickness of silicon carbide film 17 is desirably set appropriately within the range of 100 to 8000 Δ. Next, by a well-known photolithography method, the silicon carbide film 17 is removed so that portions corresponding to predetermined regions of the base diffusion layer 13, emitter diffusion layer 15, and collector diffusion layer 14 remain, while other portions are removed.
Next, as shown in Figure D, a thick oxide film 16 is formed on the surface of the epitaxial growth layer 12 by high-pressure oxidation using the silicon carbide film 17 as a mask, and the base diffusion layer 13, emitter diffusion layer 15, and collector diffusion layer are Perform 14 insulation separations.

Here, the oxide film 16 is formed by high-pressure oxidation.
This is to prevent normal thermal oxidation from having an adverse effect on the characteristics of the NPN transistor that has already been formed due to the oxidation temperature being too high.

The high pressure state is preferably set in the range of 3 to 1 atmospheric pressure. Under such high pressure conditions, the oxidation temperature is 50
It can be set to 0 to 80,000, and the oxidation rate can also be increased. The film thickness of the oxide film 16 is 100 to 30
It is desirable to set it appropriately within the range of 00A. The reason for forming the thick oxide film 16 is to prevent interaction between the extraction electrode 18, which will be described later, and other elements formed on the semiconductor substrate. Note that if there is a ring in which the surface concentration of the base resistor formed in other regions of the semiconductor substrate 10 changes during this oxidation step, a silicon dioxide film (
It is desirable that Si02) partially form a protective film such as a silicon nitride film.

Next, as shown in FIG. D, tungsten (W), molybdenum (
A deposited layer 17a made of a conductive element such as Mo), vanadium (V), or titanium (Ti) is formed.

The thickness of this deposited layer 17a is desirably set appropriately in the range of 100 to several thousand angstroms. If it is less than 100 angstroms, the electrical resistance of silicon carbide film 17 cannot be lowered sufficiently, and if it is more than several thousand angstroms, the electrical resistance reaches a saturated state at a predetermined value. Then 400
Firing is performed at a temperature of ~80,000°C to diffuse the conductive element into the silicon carbide film 17. Thereafter, the deposited layer 17a is removed using a chemical treatment solution such as aqua regia. Next, as shown in FIG. 1, an extraction electrode 18 made of aluminum is formed on the surface of the silicon carbide film 7 thus formed to obtain a semiconductor device 19. In the embodiments, the present invention is applied to a semiconductor device with a bibolar structure, but it goes without saying that the present invention can also be applied to a semiconductor device with a MOS type structure. .

[Effects of the Invention] As explained above, according to the semiconductor device according to the present invention, it is possible to improve device characteristics and improve performance.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, FIGS. 2A to 2D are cross-sectional views showing the manufacturing method of the semiconductor device in order of steps, and FIG. 3 is a cross-sectional view of a conventional semiconductor device. FIG. 10...Semiconductor substrate, 13...Base diffusion layer, 14...Collector diffusion layer, 15...
・Emitter diffusion layer, 17...Silicon film, 18.
...Takeout electrode, 19...Semiconductor device. Figure 1 Figure 2 Figure 2 Figure 2 Figure 2 Figure 3

Claims (1)

[Claims] 1. A silicon carbide film containing a high melting point metal laminated on a desired portion of one main surface of a semiconductor substrate, an insulating film that covers one main surface of the semiconductor substrate in a continuous manner with the silicon carbide film, and a silicon carbide film on the silicon carbide film. 1. A semiconductor device comprising: an extraction electrode provided in the semiconductor device;