JPS6056296B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a semiconductor substrate having a structure in which metal protrusions (so-called bumps) are formed on a semiconductor substrate, and the electrode wiring pattern under the metal protrusions does not suffer from corrosion. This is what I am trying to do.

An outline of the conventional process of forming metal protrusions on a semiconductor substrate will be explained with reference to FIG.

An electrode wiring pattern 2, which connects each element (not shown) formed in the semiconductor substrate 1 and serves as an external lead wiring, is formed on the semiconductor substrate 1 from a good electrical conductor such as aluminum.

Next, CVDSiO with holes formed only for the electrode wiring pattern 2
. An insulating film 3 such as a film is formed. This insulating film 3 prevents contamination of wiring patterns and elements other than the electrode wiring pattern 2.
It is intended to prevent mechanical damage, and the entire surface is coated with CVD.
S.I.O. After forming the membrane, openings 3a are formed in order to obtain electrical connection with the outside. Next, a metal film 4 called a barrier metal is formed by a sputtering method, an electron beam method, or a resistance heating method.

This metal film 4 is formed near the electrode wiring pattern, and usually has a structure in which multiple layers of metal are laminated.
For example, Cr-Cu, Ti-Ni-Cu, Cr-Ni-C
This is the configuration of u, etc. Next, metal protrusions, Au, Ag, Ni, Sn) solder, etc. are formed to a height of 10 to 20 μm on the metal film 4 by an electrolytic method or an electroless method. In such a conventional configuration, all the metal protrusions 6 were formed on the electrode wiring pattern 2.

That is, as shown in FIG. 1, the size of the pattern 3' of the opening 3a of the insulating film 3 is smaller than the size of the electrode wiring pattern 2'. This is an essential element in preventing the electrode wiring pattern 2 from being contaminated. Further, the metal film 4 has metal protrusions 6 formed thereon in relation to the metal protrusions 6 formed thereon.
The size of pattern 6' is larger than that of pattern 6'. Furthermore, the pattern 6' of the metal protrusions 6 is larger than the size of the insulating film 3. This is because if the metal protrusions 6 are formed in the opening area of the insulating film 3, the electrode wiring pattern 2 will be corroded due to the process of removing unnecessary parts of the metal film or due to pinholes in the formed metal film. This is because it can sometimes disappear, which is why it has this structure. However, such a configuration has the following problems.

This will be explained first with reference to FIG. As already mentioned, the insulating film 3 is used to protect a part of the electrode wiring pattern 2 or the wiring pattern on the substrate 1, but cracks or pinholes in the insulating film 3 at the stepped portions of the electrode wiring pattern 2 10 occurs. Normal electrode wiring pattern 2
A1 with a thickness of about 1 μm is used, and as the insulating film 3, a film formed at a low temperature of 0.8 μm such as CVDSiO2 is used.
~1.0 μm is formed. It is extremely difficult to uniformly deposit such a CVDSiO2 film on the stepped portions, resulting in a very thin film or innumerable pinholes. Furthermore, even if the CVDSlO2 film were uniformly deposited on the stepped portion, the temperature of the substrate would not rise in the vapor deposition process for depositing the metal film 4, and the thermal expansion would cause the substrate temperature to reach around 20 (s). A crack 10 occurs in the CVDSiO2 film. Also, in the process of connecting other external lead-out terminals on the metal protrusion 6 by thermocompression bonding, the pressure of the thermocompression bonding process (30 to 50y/100×100 μm)
Alternatively, it was confirmed that cracks 10 were easily generated at the stepped portions due to the temperature at which they were generated (around 45 CfC).

Such pinholes or cracks in the CVDSiO2 film at the stepped portion of A1 similarly appear in the metal film 4 as cracks or pinholes 11, which allow the etching solution to penetrate during etching of the metal film.
For this reason, the electrode wiring pattern 2 may be corroded to form a corroded part 12, or the battery may be damaged due to the intrusion of moisture between the metal materials. The effect works and electrode wiring pattern 2
are similarly corroded. Such corrosion accelerates with time, and eventually all of the electrode wiring pattern 2 disappears, resulting in complete electrical failure. Furthermore, the problems with the structure in Figure 1 are explained along with Figure 3. explain. The electrode wiring pattern 2 is usually composed of A1, but these need to be heat treated at a temperature around 450°C to 530°C in order to improve adhesion to the substrate material, such as Si, and lower contact resistance. . However, when these electrode wiring pattern materials are -N, grain boundaries grow, and the surface has many irregularities 14 compared to A1 immediately after evaporation, and the height of the irregularities 14 increases. Saha 2000A~500
It even reaches 0A. When a CVDSiO2 film is formed on such a surface, as shown in the figure, pinholes 13 are formed therein, and pinholes 13a or 13b are formed in the metal film 4 as well. Such pinholes 13a, 13b
As shown in the example of FIG. 2, the occurrence of this causes moisture or etching solution to enter from the outside, and the electrode wiring pattern 2 is gradually corroded, eventually causing electrical failure. The present invention is based on the results of considering the above-mentioned disadvantages and examining their causes, and provides a semiconductor device that actively prevents pinholes and cracks in the CVDSiO film at the stepped portions and does not cause corrosion. That is.

FIG. 4 is a sectional view showing the structure of a main part of a semiconductor device according to an embodiment of the present invention.

Semiconductor substrate 2! The pattern 22'' of the electrode wiring pattern 22 formed above is the opening pattern 2 of the CVDSiO2 film 23.
Greater than 3″.

Further, the semiconductor device in FIG. 4 has a pattern 2 of metal protrusions 25.
5'' is larger than the opening pattern 23'' of the CVDSiO2 film 23 and larger than the pattern 22'' of the electrode wiring pattern 22.

That is, the pattern 25'' is formed larger than the pattern 22'', and the pattern 25'' of the metal protrusions 25 is formed so as to surround the stepped portion of the A1 pattern 22. Here, of course, the pattern of the metal film 24 is 2C is metal protrusion 2
5. In the structure of the present invention, even if a pinhole or crack 26 occurs in the CVDSiO2 film as shown in FIG. Even if pinholes 28 are generated in the CVDSiO2 film 23 due to the growth of the grain boundaries 27 of A1, the electrode wiring pattern 22 will not be corroded.

That is, the electrode wiring pattern 22 in which grain boundaries of A1 occur
area or the entire area near the A1 step with metal protrusions 25
This is because it is covered with Therefore, the intrusion 29 of corrosive moisture or solution from the outside is not allowed. Furthermore, according to the structure shown in FIG. 4, when connecting other external lead-out terminals on the metal protrusion 25, cracks occur in the CVDSiO2 film 23 at the step A1 due to processing by thermocompression bonding. However, as mentioned above, metal protrusions 25
Since the vicinity of the Al step portion is covered with the aluminum layer, it is possible to prevent moisture and solution from entering from the outside. As described above, the present invention has been made by focusing on the points discovered as a result of studying the inconveniences that occur when forming metal protrusions on an electrode wiring pattern. Corrosion of the electrode wiring pattern due to the presence of pinholes, cracks, etc. that occur can be completely prevented.

Therefore, the present invention can realize a semiconductor device with extremely high reliability, and greatly contributes to semiconductor devices in which metal protrusions are formed.

[Brief explanation of the drawing]

FIG. 1 is a planar pattern and structural cross-sectional view of an electrode part of a conventional semiconductor device, FIGS. 2 and 3 are diagrams showing a state of corrosion occurrence in a conventional semiconductor device, and FIG. 4 is a diagram showing an example of the present invention. FIG. 5 is a cross-sectional view of the plane pattern and structure of the electrode portion of such a semiconductor device, and FIG. 5 is a cross-sectional view of the semiconductor device after fabrication according to the present invention. 21... Semiconductor substrate, 22... Electrode wiring pattern, 23... CVDSiO2 film, 23''.
...Opening pattern, 24...Metal film, 25...
...Metal protrusion, 25Z...Metal protrusion pattern.

Claims (1)

[Claims] 1. An electrode wiring pattern installed on the surface of a predetermined region of a semiconductor substrate, and a stepped portion formed from the surface of the semiconductor substrate to the surface of the electrode wiring pattern, and corresponding to the end of the electrode wiring pattern. an insulating film, an opening formed by selectively removing the insulating film on the electrode wiring pattern, and a metal film installed from the opening to the surface of the insulating film including the stepped part. . A semiconductor device comprising: a metal protrusion installed on the metal film so as to cover a portion of the metal film corresponding to the stepped portion of the insulating film.