JPS6159673B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a bulk conduction type insulated gate field effect transistor using GaAs as a semiconductor.

A bulk conduction type insulated gate field effect transistor (hereinafter referred to as a bulk conduction type MOS FET) is a
As shown in the figure, a semiconductor layer 2 of one conductivity type is provided on a semi-insulating substrate 1, a source electrode 3 and a drain electrode 4 are provided on this semiconductor layer 2, and an insulating layer is provided on the semiconductor layer 2 between both electrodes. It has a structure in which a gate electrode 6 is formed through a film 5, and the current flowing through the semiconductor layer 2 between the source electrode 3 and the drain electrode 4 is controlled by the voltage applied to the gate electrode 6.
This bulk conduction type MOS FET has higher carrier mobility than the inverted type MOS FET, which is widely used in Si, etc., so it can operate at high speed, and even if the gate length is shortened, it can be used as an inverted type MOS FET. Short channel effects such as pulch-through as seen do not occur. Furthermore, unlike shot-gate type FETs, gate current does not flow even when a positive voltage is applied to the gate electrode, so it has the advantage of allowing a large logic amplitude, making it an element suitable for high-speed operation. I can say that. And to enable higher-speed operation, it has a higher carrier mobility than Si.
Since the use of GaAs as a semiconductor material is advantageous in principle, research and development of such devices has been promoted in recent years.

By the way, in conventional methods for manufacturing GaAs bulk conduction type MOS FETs, the insulating film 5 is generally formed using a thermal oxidation method, an anodization method in an electrolytic solution, a plasma oxidation method, etc.
Methods of directly oxidizing a portion of GaAs, and methods of loading other insulating films on GaAs using CVD, vacuum evaporation, etc., have been adopted. However, GaAs bulk conduction type MOS manufactured by these conventional methods
The FET has a fatal drawback in that a large amount of interface states exist at the interface between the semiconductor layer 2 and the insulating film 5. Therefore, it is not possible to obtain a sufficient current change at low frequencies where the interface states respond, and the bulk conductivity type
The advantages of MOS FETs could not be fully demonstrated.

In other words, when configuring a logic element, each
Due to coupling issues with the next stage and the need to reduce power consumption, FETs must be of a type that does not allow current to flow when no voltage is applied to the gate.
Such a device requires that a sufficient current change be obtained with respect to a positive gate voltage. However, in a GaAs bulk conduction type MOS FET manufactured using a conventional manufacturing method, for example, a method in which the insulating film 5 is formed using a plasma oxidation method, its DC drain characteristics are as shown in Fig. 2, and the interface state density is high. Therefore, the change in drain current with respect to positive gate voltage becomes small.

The present invention improves these conventional drawbacks, and its purpose is to provide a GaAs bulk conduction type MOS with excellent interface characteristics between a GaAs semiconductor layer and an insulating film.
The object of the present invention is to provide a method for manufacturing FETs. Examples will be described in detail below.

3 to 8 are process diagrams for explaining embodiments of the present invention, and in each figure, 7 is a GaAs
Semi-insulating substrate, 8 is GaAs layer, 9 is Al thin film, 10
is an Al oxide film, 11 is a GaAs oxide film, 12 is a source electrode, 13 is a drain electrode, 14 is a gate electrode,
15 is a gate region.

First, as shown in FIG. 3, a GaAs layer 8 of one conductivity type is formed on a GaAs semi-insulating substrate 7 by a liquid phase epitaxial method, etc., and after mesa etching is performed on both sides of the GaAs layer 8, it is used as a gate. Only the region is etched to the middle of the GaAs layer 8. The reason for this structure is to lower the source resistance and to ensure that the entire region of the gate is included under the gate electrode.

Next, as shown in FIG. 4, an Al thin film 9 is selectively loaded to a thickness of, for example, 800 Å on the GaAs layer 8 and the substrate 7 except for regions where source and drain electrodes are to be formed. As the method, for example, photo etching or lift-off method can be adopted.

Next, this is anodized using an electrolyte solution, such as a mixture of tartaric acid, ethylene glycol, and water, thereby converting the Al thin film 9 into an Al oxide film 10, which is an insulator, as shown in FIG. At this time, the source
The GaAs layer 8 in the region where the drain electrode is to be formed is also oxidized, and a GaAs oxide film 11 is formed.

What is important here is to ensure that the Al thin film 9 is completely anodized but that the GaAs is not anodized too much.
The purpose is to reach the interface between the layer 8 and the Al thin film 9. In this way, an insulating film with the lowest interface state density can be obtained. However, according to experiments, it has been confirmed that even if the oxidation progresses to some extent to the GaAs layer 8 after the oxidation of the Al thin film 9 is completed, the interface state density remains a sufficiently small value. Therefore, when using a constant current source, the anode voltage at the end of the anodization is the voltage at which the oxidation of Al ends and its 1.1
The interface state density can be kept sufficiently low within the range of about twice the voltage. In addition, Al
Since the rate of anodic oxidation of GaAs and GaAs is different, when the time change of the anode voltage is recorded on a recorder, the slope is different before and after the oxidation of Al is completed. Oxidation can also be carried out. Furthermore, since the surface reflectance of Al and GaAs is different, interference colors are not shown when the oxide layer is Al underneath, but interference colors are shown when the bottom is GaAs. Therefore, the beginning of the appearance of interference colors indicates that the oxidation of Al has ended, and it is also possible to optically detect the end of the oxidation of Al.

Now, as shown in FIG. 6, only the GaAs oxide film 11 on the area where the ohmic electrode is to be formed is
For example, it is removed by etching using phosphoric acid. Generally, Al oxides are extremely stable to chemicals, and it is not easy to process Al oxides by etching or the like after forming them. On the other hand, GaAs oxide can be easily removed using acid, so by adopting the method of the present invention, it is possible to selectively form an Al oxide film in regions other than the source and drain very easily. Become.

Next, the element obtained in the above step is heat-treated at, for example, 400° C. for 30 minutes in an N ₂ atmosphere. The heat treatment temperature also varies depending on the heat treatment time, but for heat treatment for 30 minutes, heat treatment below 300°C increases the interface state density, and heat treatment at a temperature higher than 500°C causes insulation when voltage is applied. The film becomes more susceptible to dielectric breakdown. Therefore, the practically preferred range is approximately 300°C to 500°C.

Next, as shown in FIG.
A source electrode 12 and a drain electrode 13 are formed by depositing an ohmic metal such as AuGeNi on the region where the etching has been removed. Finally, as shown in FIG. 8, a gate electrode 14 made of, for example, Al is formed on the groove-shaped region of the Al oxide film 10. Here, a narrow region 15 of the GaAs layer 8 becomes a gate region.

Figure 9 is a diagram showing an example of the DC drain characteristics of the GaAs bulk conduction type MOS FET manufactured as described above. As shown in the figure, the drain current is the same for both positive and negative polarity gate voltages. It can be seen that the interface characteristics of the GaAs bulk conduction type MOS FET according to the present invention are significantly superior to those of the conventional one.

As described above, in the method of this embodiment, the Al thin film 9 is selectively formed on the GaAs layer 8 except for the drain and source regions, and the gate insulating film is formed by anodizing this. By controlling the process so that only the Al thin film 9 is subjected to anodic oxidation, a gate insulating film having a low interface state density can be formed.

As explained above, according to the present invention, a high-quality Al oxide film with a low interface state density can be used as a source,
GaAs bulk conduction type MOS with excellent characteristics because it can be selectively formed in regions other than the drain
There is an advantage that FETs can be manufactured reliably. In addition, since the Al loaded on the main surface of the device is anodized except for the area where the ohmic electrode is to be formed, the gate insulating film is formed and other areas can be passivated at the same time. Therefore, it is very effective to apply the present invention to GaAs bulk conduction type MOS FETs or their integrated circuits. Note that when applied to an integrated circuit, it is effective to form an Al wiring pattern simultaneously with the formation of a gate insulating film by selectively anodizing Al to simplify the process.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a bulk conduction type MOS FET, Figure 2 is a diagram showing the DC drain characteristics of a GaAs bulk conduction type MOS FET manufactured using a conventional method.
Figures 3 to 8 are process diagrams for explaining examples of the present invention, and Figure 9 is a diagram showing the process of manufacturing according to the method of the present invention.
FIG. 2 is a diagram showing an example of DC drain characteristics of a GaAs bulk conduction type MOS FET. 7 is a GaAs semi-insulating substrate, 8 is a GaAs layer, and 9 is a GaAs semi-insulating substrate.
Al thin film, 10 is Al oxide film, 11 is GaAs oxide film,
12 is a source electrode, 13 is a drain electrode, 14 is a gate electrode, and 15 is a gate region.

Claims (1)

[Claims] 1 One conductivity type on GaAs semi-insulating substrate
A step of forming a GaAs layer and etching the gate region part of the GaAs layer halfway; a step of forming an Al thin film on the GaAs layer except for the area where an ohmic electrode is to be formed; and anodizing the Al thin film. a step of forming an Al oxide film, a step of removing a GaAs oxide film produced by the anodic oxidation in a region of the GaAs layer where the ohmic electrode is to be formed, a step of heat-treating the GaAs oxide film after the step, and A method of manufacturing a semiconductor device, comprising the steps of: forming an ohmic electrode in the region from which the film has been removed; and forming a gate electrode on the Al oxide film in the gate region.