JPS6212901B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electric circuit including a dividing resistor circuit for driving a liquid crystal and a resistor network circuit for a digital-to-analog converter.

In recent years, liquid crystal displays have been used in many electronic devices,
A liquid crystal driving circuit is incorporated into a large scale integrated circuit. By the way, one of the liquid crystal driving methods, for example, the driving method of matrix type liquid crystal elements, is the voltage averaging method. In this method, in order to set the selected state and non-selected state of the liquid crystal element by voltage ratio, the intermediate voltage is set. A dividing resistor that generates is often used. Furthermore, recently, it has become common for a digital-to-analog conversion circuit and the liquid crystal driving circuit to be incorporated into the same large-scale integrated circuit chip.

Both the above-mentioned dividing resistor for driving the liquid crystal and the resistor for digital-to-analog conversion require high precision, so the width and length of the resistor pattern in a large-scale integrated circuit must be increased, and a considerable amount of chip space is required. It takes up area. Therefore, this has been a major obstacle to reducing the overall chip area.

The present invention has been made in view of the above-mentioned drawbacks, and it is an object of the present invention to provide an electric circuit that takes up less space.

That is, the present invention shares at least part of the resistance for driving the liquid crystal and for digital-to-analog conversion by controlling the switching transistor, and selectively uses the shared resistance for digital-to-analog conversion and driving the liquid crystal. By providing a switch circuit for switching, the number of resistor elements used is reduced and the overall chip area is reduced.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of a conventionally used circuit. FIG. 1 first includes a calculation control section 1 and a digital/analog control section 2.
From there, the analog conversion data group 3 is transferred to the digital/analog control section 2. Here, digital
Let the output signals weighted 1, 2, 4, and 8 by the analog control section 2 be Q ₁ , Q ₂ , Q ₄ , and Q ₈ , respectively. The resistor with one end connected to _Q8 is _R1 , the resistor with one end connected to the negative potential _VDD is _R5 , and the other ends of the resistors _R1 and _R5 are commonly connected. Next, the resistor with one end connected to Q ₄ is R ₂ , the resistor with one end connected to the common connection point of resistors R ₁ and R ₅ is R ₆ , and the other ends of resistors R ₂ and R ₆ are commonly connected. Similarly, the resistor with one end connected to Q ₂ is R ₃ , the resistor with one end connected to the common connection point of resistors R ₂ and R ₆ is R ₇ , and the other ends of resistors R ₃ and R ₇ are commonly connected. Also, the resistor whose one end is connected to Q ₁ is R ₄ ,
The resistor with one end connected to the common connection point of resistors R ₃ and R ₇ is called R ₈ , and the other ends of resistors R ₄ and R ₈ are commonly connected.
Connect the common connection point of resistors R ₄ and R ₈ to analog output terminal 4.
It is derived as follows.

On the other hand, the resistor whose one end is connected to the negative potential V _DD is R ₉
and a resistor connected with the other end of resistor _R9 as one end.
Let it be _R10 . Similarly, R ₁₁ is the resistor connected with the other end of resistor R 10 as one end, R ₁₂ is the resistor connected with the other end of resistor R ₁₁ as one end, and R is the resistor connected with the other end of resistor R ₁₂ as one end _{. 13} , and connect the other end of the resistor R ₁₃ to the ground potential V _O.

The connection points of each of the above-mentioned resistors are connected to a liquid crystal display circuit section 5 which is composed of a flip-flop and is formed on the same chip as the digital/analog control section 2. A display data group 6 is supplied from the arithmetic control section 1 to the liquid crystal display circuit section 5. Although the circuit operation of the conventional example will be omitted, as is clear from the figure, 13 resistors are required for display driving and analog conversion.

FIG. 2 is a main part block diagram showing one embodiment of the present invention. In FIG. 2, an arithmetic control section 11 and a digital/analog control section 12 are integrated in the same chip, and a digital/analog control section 11 is integrated into the same chip.
The analog conversion data group 13 is transferred to the analog control section 12 . This data is digital
The analog control unit 12 weights the signals to 1, 2, 4, and 8, and outputs them from P ₁ , P ₂ , P ₄ , and P ₈ , respectively. The source is connected to P ₈ , the transistor T ₁ conducts when the gate input signal is logic “1”, the source is connected to
A transistor T 2 connected to P ₄ and conductive when the gate input signal is logic "1", a transistor T ₃ of similar conductivity type _with its source connected to P ₂ and a transistor T ₄ whose source is connected to P ₁ are connected to a resistor. It is provided between the circuit and the analog control section 12.

Next, connect the resistor with one end connected to the negative potential V _DD as R ₁₅
shall be. Further, a resistor R ₁₁ has one end connected to the drain of the transistor T ₁ , a resistor R ₁₆ has one end connected to the other end of the resistor R ₁₅ , and the other ends of the resistor R ₁₁ and the resistor R ₁₆ are commonly connected. The resistor with one end connected to the drain of transistor T ₂ is R ₁₂ and the other end is the resistor R ₁₁ .
The resistance connected to the common connection point of R ₁₆ is R ₁₇ , and the resistance
Connect _R12 and the other end of resistor _R17 in common. Similarly, the resistor with one end connected to the drain of transistor T ₃ is R ₁₃ , the resistor with one end connected to the common connection point of resistor R ₁₂ and resistor R ₁₇ is R ₁₈ , and resistor R ₁₃ is the resistor
Connect the other ends of R ₁₈ in common. Also, the resistor whose one end is connected to the drain of the transistor T ₄ is R ₁₄ , the resistor whose one end is connected to the common connection point of resistor R ₁₃ and resistor R ₁₈ is R ₁₉ , and the other ends of resistor R ₁₄ and resistor R ₁₉ are Make a common connection. The common connection point of the resistor R ₁₄ and the resistor R ₁₉ is connected to the analog output terminal 14, the source is connected to the ground potential V _O , and the drain of the transistor T ₅ conducts when the gate input signal is logic "0". Connected.

Resistors R ₁₅ and R ₁₆ and resistors R ₁₆ and R ₁₇ , resistors R ₁₇ and
R ₁₈ , each connection point of resistors R ₁₈ and R ₁₉ consists of a flip-flop, and is connected to a liquid crystal display circuit section 15 made on the same chip as the digital/analog control section 12. Display data group 16 is output to 15.

Further, from the arithmetic control section 11 to the liquid crystal display circuit section 1
A signal for resetting the flip-flop in 5 is a display mask command signal 17.

Display mask command signal 17 is transmitted through transistor T ₁ ,
Connect to each gate of T ₂ , T ₃ , T ₄ , and T ₅ .

Next, the operation of the circuit shown in FIG. 2 of this embodiment will be explained.

1 During digital/analog conversion: Analog conversion data group 13 sent from the arithmetic control unit 11 to the digital/analog control unit 12
are weighted and output within the digital/analog control unit 12, and sent to the respective drains of transistors T ₁ , T ₂ , T ₃ , and T ₄ that are conductive at logic “1”. During digital-to-analog conversion, the display mask command signal 17 is logic "1", so the transistors T ₁ , T ₂ , T ₃ , and T ₄ are conductive. The display mask command signal 17 also renders transistor _T5 , which is conductive at logic "0", non-conductive.

Therefore, the resistor network formed by resistors R ₁₁ to R ₁₉ operates as a digital-to-analog converter circuit. For example, the resistance values of resistors R ₁₁ to R ₁₄ are set to be equal, and the resistance values of resistors R ₁₅ to R ₁₉ are also set to be equal, so that the resistance value of the former is twice the resistance value of the latter. When set, an R-2R resistor network circuit, which is well known as a digital-to-analog converter circuit, is configured.

In this circuit, if _P1 of the outputs of the digital/analog control section 12 is logic "1", the potential of the analog output terminal 14 becomes 1/2V _DD . Also, if P ₂ of the outputs of the digital/analog control section 12 is logic "1", the analog output terminal 14
The potential is 3/4V _DD , 7/8V if P ₄ is logic “1”
If _DD , _P8 is logic "1", it becomes 15/16V _DD .
At this time, the flip-flop in the liquid crystal display circuit section 15 is reset by the display mask command signal 17, so that the display is masked (prohibited).

2 When not performing digital-to-analog conversion.

Since the display mask command signal 17 sent from the arithmetic control section 11 to the liquid crystal display circuit section 15 is logic "0", the flip-flop in the liquid crystal display circuit section 15 is not reset, and the display data signal also sent from the arithmetic control section 11 is not reset. Load group 16.
At this time, transistors T ₁ , T ₂ , T ₃ , and T ₄ become non-conducting, while transistor T ₅ becomes conductive. Therefore, resistors R ₁₅ to R ₁₉ are connected between the negative potential V _DD and the earth potential _VO , and 4/5
V _DD and potentials of 3/5V _DD , 2/5V _DD , and 1/5V _DD are applied to the liquid crystal display circuit section 15 . As a result, the liquid crystal element is driven by the voltage averaging method. On the other hand, at this time, the potential of the analog output terminal 14 is fixed to the ground potential V _O.

As described above, in this embodiment, both analog conversion processing and display drive processing can be controlled in a time-division manner using only nine resistive elements, so that the overall chip area can be reduced, and a reduction in cost can also be expected.

[Brief explanation of the drawing]

Figure 1 is a block diagram of an electronic circuit including a conventional liquid crystal drive circuit and digital/analog conversion circuit.
The figure is a block diagram of essential parts of an electronic circuit according to an embodiment of the present invention. 1, 11... Arithmetic control section, 2, 12... Digital/analog control section, 3, 13... Data,
4, 14...Analog signal output terminal, 5, 15...
...Display control unit, 6, 16...Display data.

Claims (1)

[Claims] 1. In an electric circuit having a liquid crystal drive circuit and a digital-to-analog conversion circuit, at least a part of the dividing resistor for liquid crystal drive and a resistor for digital-to-analog conversion are shared, and the shared resistance is used for both digital-to-analog conversion and liquid crystal conversion. An electric circuit characterized by being provided with a switch circuit that is selectively used during driving.