JPS62549B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a digital arithmetic circuit that calculates the magnitude of a vector and its angle from a reference coordinate from two vector components expressed in orthogonal coordinates.

When performing this type of calculation using a digital circuit,
A memory circuit is used in which the calculation inputs and outputs are made into a table, and it is desirable that the capacity of this table be as small as possible. Furthermore, it is desirable to always use the same table instead of using different tables depending on the magnitudes of the two vector components serving as calculation inputs.

The operation of this type of arithmetic circuit will be explained using the vector diagram shown in FIG. In the first vector diagram, the two orthogonal components of vector A are Ax, Ay, and
The angle formed with the reference axis (here referred to as the x-axis) is indicated by β. From FIG. 1, the following relationship holds true.

|A|=√() ² +() ² ...(1) β=tan ^-1 (Ay／Ax) ...(2) Therefore, from the two vector components Ax and Ay expressed in orthogonal coordinates, the vector is Size | A | is (1)
In the equation, the angle β is given by equation (2). This type of arithmetic circuit that executes equations (1) and (2) can be constructed from general-purpose hardware and software using dedicated hardware or a microprocessor.

FIG. 2 is a block diagram showing a conventional example in which this type of arithmetic circuit is constructed with dedicated hardware, and performs the arithmetic operations of equations (1) and (2). Note that since these circuits can be easily realized using known techniques, a description of their configuration will be omitted.

In the figure, 1 and 2 are multiplication circuits, and 3
is an addition circuit, 4 is a square root table, 5 is a division circuit, 6 is an arc tangent table, 1
0 and 11 are input terminals, and 12 and 13 are output terminals. A square root table is a ROM table in which an input value is an address and the square root value of the input value is written at the address, and an arctangent table is a similar ROM table.

Now, in FIG. 2, the two component signals Ax and Ay input from input terminals 10 and 11 are input to
2, and after being added by the adder circuit 3, the vector A is halved by the ROM table 4 in which the square root value is written, and the magnitude |A| of the vector A is output to the output terminal 12.

On the other hand, the ratio of the component signals Ax and Ay is determined by a divider circuit 5 and inputted to a ROM table 6 in which arctangent values are written, where angle β is determined and output to an output terminal 13. Here, as an example, input signals Ax and Ay are 0<Ax≦2,0
If it is within the range of <Ay≦2, then two
The input values for each of ROM tables 4 and 6 are 0<
(Ax) ₂ + (Ay) ² ≦8, 0<(Ax)/(Ay)<∞, and the contents of the ROM table at this time are also 0<√() ² +() ² ≦√ 8,0＜ ^tan-
1
It is necessary that (Ax/Ay)<π/2.

As can be seen from this example, the number of input addresses for the two ROM tables 4 and 6 must be made considerably large to correspond to the change range of the input signals Ax and Ay, which results in an increase in the capacity of the ROM table. This leads to the disadvantage of increasing costs.

In addition, since the input values in Tables 4 and 6 change depending on the change range of the input signals Ax and Ay, the input signal
When the change range of Ax and Ay is wide, it is necessary to use separate tables accordingly, but using multiple tables separately has the disadvantage of making operations complicated and inconvenient.

The present invention has been made to eliminate the drawbacks of the prior art as described above, and an object of the present invention is to reduce the table capacity even though the input signal has a wide range of variation, and to Therefore, it is an object of the present invention to provide a digital arithmetic circuit which does not require the use of a plurality of tables and can always use the same table.

The main point of the configuration of this invention is that in a digital arithmetic circuit that calculates the magnitude and angle of two vector components (Ax and Ay) expressed in orthogonal coordinates, the larger of the two components Ax and Ay is used. a, and the smaller one is b, then the square root value (√
1+() ² ) and then multiplying that value by a to find the magnitude of the vector. Also, the arctangent value (tan ^-1 b /
Find a), and if a=Ax, use that value as a=Ay
In this case, the angle of the vector is found by subtracting it from π/2.

Next, one embodiment of the present invention will be described with reference to the drawings, but before that, the principle of the present invention will be explained.

3a and 3b are block diagrams for explaining the principle of the present invention, and the same elements as in FIG. 2 are designated by the same numbers. The above equations (1) and (2) can be modified as described below by comparing the magnitudes of the two input signals Ax and Ay.

(i) When Ax≧Ay, |A|=(Ax)×√1+() ² …(3) Here, 0＜Ay/Ax≦1…(4) (ii) When Ax＜Ay, |A| (Ay)×√1+() ² …(5) β=π/2−tan ^-1 (Ax/Ay) …(6) Here, 0<Ax/Ay≦1 …(7) Therefore, Ax≧Ay. By adopting the configuration shown in Figure 3 a when Ax<Ay, and by adopting the configuration shown in Figure 3 b when Ax<Ay, the two tables 4 and 6 each require a small capacity, and the two input values
The same table can always be used regardless of the size of the change range of Ax and Ay. That is, in Figure 3 a and b, √1+() ² or √1+
The input values of the square root table 4 and arctangent table 6 that calculate (Ax/Ay) ² are always between 0 and 2, regardless of the change range of the two input values Ax and Ay.
It is in the range of 1. From this, the contents of table 4 may range from 1 to √2, and the contents of table 6 may range from 0 to π/4.

FIG. 4 is a block diagram showing one embodiment of the present invention. In the figure, 7 and 8 are respectively switching circuits, and other elements that are the same as those in FIGS. 2 and 3 are designated by the same numbers.

The embodiment shown in FIG. 4 has two input values Ax,
The switching circuits 7 and 8 are automatically switched according to the comparison result of the magnitude of Ay, so that a circuit configuration corresponding to FIG. 3a or a circuit configuration corresponding to FIG. 3b can be obtained. The mode of operation is the same as that described above with reference to FIGS. 3a and 3b, and will not be repeated.

In addition, the magnitude comparison circuit of the two input values Ax and Ay,
A drive circuit that causes the switching circuits 7 and 8 to perform switching operations depending on the result can be easily realized using conventionally known techniques, and further explanation thereof will be omitted.

According to this invention, the circuits shown in FIG. 3 a and b are switched and used by comparing the magnitudes of the two input values Ax and Ay, so that the input values can be used as a square root table and an arctangent table.
Regardless of the size of the change range of Ax and Ay, the number of input addresses is small, so it is possible to use a ROM with a small capacity, and it is possible to always use the same table.

The present invention can be applied not only to the dedicated digital circuit described above but also to the case where a microcomputer or the like is used to perform calculations by a program.

[Brief explanation of the drawing]

FIG. 1 is a vector diagram showing vectors to be obtained by calculation, FIG. 2 is a block diagram showing a conventional example of a digital arithmetic circuit, FIGS. 3 a and b are block diagrams for explaining the principle of the present invention, and FIG. The figure is a block diagram showing one embodiment of the present invention. Symbol explanation, 1, 2...Multiplication circuit, 3...Addition circuit, 4...Square root table, 5...Division circuit, 6
...Arctangent table, 7,8...
Switching circuit, 9... Adding circuit, 10, 11... Input terminal, 12, 13... Output terminal.

Claims (1)

[Scope of Claims] 1. A digital arithmetic circuit that calculates the magnitude of a vector given two vector components (Ax, Ay) expressed in orthogonal coordinates,
A comparison circuit that compares the two components, a division circuit that divides (b/a) the smaller one (b) by the larger one (a) found as a result, and the division result (b When /a) is entered as an address, √1+(
a) A digital arithmetic circuit comprising: a table memory that outputs a value of ² ; and a multiplication circuit that multiplies the memory output by a and outputs the magnitude of the vector. 2. A digital arithmetic circuit that is given two vector components (Ax, Ay) expressed in orthogonal coordinates and calculates the angle between the vector and the reference coordinates, which is a comparison circuit that compares the two components. and a division circuit that divides (b/a) the smaller one (b) by the larger one (a) found as a result, and the division result (b/a) input as an address. 1. A digital arithmetic circuit comprising: a table memory for outputting an arc tangent value (tan ^-1 b/a) stored at the address when 3. In the digital arithmetic circuit according to claim 2, depending on which of the two vector components (Ax, Ay) is larger, the arc tangent value output from the memory table is output as is, or A digital arithmetic circuit characterized by comprising a switching circuit that subtracts the value from /2 and outputs the result.