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JPS64812B2 - - Google Patents
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JPS64812B2 - - Google Patents

Info

Publication number
JPS64812B2
JPS64812B2 JP56107770A JP10777081A JPS64812B2 JP S64812 B2 JPS64812 B2 JP S64812B2 JP 56107770 A JP56107770 A JP 56107770A JP 10777081 A JP10777081 A JP 10777081A JP S64812 B2 JPS64812 B2 JP S64812B2
Authority
JP
Japan
Prior art keywords
semiconductor element
base body
ceramic
radiator
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56107770A
Other languages
Japanese (ja)
Other versions
JPS5810840A (en
Inventor
Yutaka Hirano
Hiromoto Yamawaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56107770A priority Critical patent/JPS5810840A/en
Publication of JPS5810840A publication Critical patent/JPS5810840A/en
Publication of JPS64812B2 publication Critical patent/JPS64812B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/692Ceramics or glasses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the generation of a crack in an insulating base body by forming the cover member of an insulating frame body disposed while surrounding a semiconductor element by a material having a thermal expansion coefficient equal to a radiator arranged to the base body on which the semiconductor element is placed. CONSTITUTION:The semiconductor element 32 is fixed onto a metallized lyaer 33a shaped to the surface of the vessel base body 31 consisting of a ceramic material, the ceramic frame body 35 is disposed while surrounding the semiconductor element 32 on the vessel base body 31, the cover 36 is fastened onto the frame body, the radiator 38 is mounted to the lower surface of the vessel base body 31, and the radiator 38 and the cover 36 are made of the same member such as copper. Accordingly, since the cover 36 also expands and contracts in the same direction even when the radiator expands and contracts when heat treatment such as fixing is executed, stress applied to the vesel base only 31 is offset, and there occurs no crack in the vessel base body 31.

Description

【発明の詳細な説明】 本発明は半導体装置に関し、特に素子収容容器
(パツケージ)としてセラミツク材を主体とする
素子収容容器を用いた電力用半導体装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to a power semiconductor device using an element housing container mainly made of ceramic material as an element housing container (package).

かかるセラミツク材を主体とする素子収容容器
(以下セラミツクパツケージと称する)は、従来、
例えば第1図に示される構造を有してしている。
Conventionally, an element housing container mainly made of ceramic material (hereinafter referred to as a ceramic package) has been
For example, it has the structure shown in FIG.

同図において、11はアルミナ(Al2O3)等の
セラミツク材からなる容器基体、12は前記容器
基体11の表面に形成された金属化層(メタライ
ズ層)13a上にろう材により固着された例えば
トランジスタ等の半導体素子である。かかる半導
体素子12の他の電極はリード線14a,14b
を介して前記容器基体11の表面に形成された金
属化層13b,13cに接続される。また15は
前記容器体11上に前記半導体素子12を囲んで
配設されたセラミツク枠体、16は該セラミツク
枠体15の項面に形成される金属化層により該セ
ラミツク枠体15上に固着されるセラミツクある
いはコバールからなる蓋(キヤツプ)である。ま
た17a,17bは前記セラミツク枠体15の外
側において前記金属化層13b及び13cに接続
される例えばコバールからなる外部接続端子であ
る。
In the figure, 11 is a container base made of a ceramic material such as alumina (Al 2 O 3 ), and 12 is a metallized layer 13a formed on the surface of the container base 11, which is fixed with a brazing material. For example, it is a semiconductor element such as a transistor. Other electrodes of the semiconductor element 12 are lead wires 14a and 14b.
It is connected to the metallized layers 13b and 13c formed on the surface of the container base 11 through. Further, 15 is a ceramic frame disposed on the container body 11 to surround the semiconductor element 12, and 16 is a ceramic frame fixed to the ceramic frame 15 by a metallized layer formed on the top surface of the ceramic frame 15. The cap is made of ceramic or Kovar. Further, 17a and 17b are external connection terminals made of Kovar, for example, and connected to the metallized layers 13b and 13c on the outside of the ceramic frame 15.

このような半導体装置において、前記半導体素
子12が大電力を扱うものである場合には、第2
図に示されるように該半導体素子12を支持する
容器基体11の下面(半導体素子12の固着面と
は反対の面)に銅製の放熱体(ヒートシリンク)
21が金錫あるいは半田等のろう材により固着さ
れる。
In such a semiconductor device, when the semiconductor element 12 handles large electric power, the second
As shown in the figure, a copper heat sink (heat shrink) is attached to the lower surface of the container base 11 that supports the semiconductor device 12 (the surface opposite to the surface on which the semiconductor device 12 is fixed).
21 is fixed with a brazing material such as gold tin or solder.

ところがこのような構造にあつては、前記放熱
体21の固着時あるいはその後熱処理に伴う、該
放熱体21の伸縮によつて、セラミツク製容器基
体11にクラツクを生じ(第2図の部分A)、当
該半導体装置の製造歩留り及び信頼性の低下を招
いていた。
However, in such a structure, cracks may occur in the ceramic container base 11 due to expansion and contraction of the heat radiator 21 during fixation or subsequent heat treatment (part A in FIG. 2). , resulting in a decrease in manufacturing yield and reliability of the semiconductor device.

本発明はこのような従来の半導体装置の有する
欠点を除去し、より高い製造歩留り及び信頼性を
得ることができる半導体装置を提供しようとする
ものである。
The present invention aims to eliminate such drawbacks of conventional semiconductor devices and provide a semiconductor device that can achieve higher manufacturing yield and reliability.

このため、本発明によれば、絶縁物基体の一方
の主面に搭載固着された半導体素子、前記主面上
において前記半導体素子を囲んで配設された絶縁
物枠体、前記絶縁物枠体に固着された蓋部材、前
記絶縁物基体の他方の主面に配設された放熱体及
び前記半導体素子から導出された外部接続端子を
備えてなる半導体装置において、前記蓋部材が前
記放熱体と同等の熱膨張係数を有する材料から構
成されてなる半導体装置が提供される。
Therefore, according to the present invention, there is provided a semiconductor element mounted and fixed on one main surface of an insulating substrate, an insulating frame disposed surrounding the semiconductor element on the main surface, and the insulating frame In the semiconductor device, the lid member is fixed to the heat sink, a heat sink disposed on the other main surface of the insulator base, and an external connection terminal led out from the semiconductor element. A semiconductor device is provided that is made of materials having similar coefficients of thermal expansion.

以下本発明を実施例をもつて詳細に説明する。 The present invention will be explained in detail below using examples.

第3図は本発明による半導体装置を示す。 FIG. 3 shows a semiconductor device according to the invention.

同図において、31はアルミナ(Al2O3)等の
セラミツク材からなる容器基体、32は前記容器
基体31の表面に形成された金属化層(メタライ
ズ層)33a上にろう材により固着された例えば
トランジスタ等の半導体素子である。かかる半導
体素子32の他の電極はリード線34a,34b
を介して前記容器基体31の表面に形成された金
属化層33b,33cに接続される。また15は
前記容器体31上に前記半導体素子32を囲んで
配設されたセラミツク枠体、36は該セラミツク
枠体35の項面に形成される金属化層により該セ
ラミツク枠体35上に固着される蓋(キヤツプ)
である。また37a,37bは前記セラミツク枠
体35の外側において前記金属化層33b及び3
3cに接続される例えばコバールからなる外部接
続端子である。更に38は容器基体31の下面に
金錫あるいは半田等のろう材により固着された銅
製の放熱体(ヒートシンク)である。かかる放熱
体38は、容器基体31への半導体素子32の搭
載固着、リード線34の接続、36の固着等が終
了した後に取り付けられる。
In the figure, 31 is a container base made of ceramic material such as alumina (Al 2 O 3 ), and 32 is a metallized layer 33a formed on the surface of the container base 31, which is fixed with a brazing material. For example, it is a semiconductor element such as a transistor. The other electrodes of the semiconductor element 32 are lead wires 34a and 34b.
It is connected to the metallized layers 33b and 33c formed on the surface of the container base 31 via. Further, 15 is a ceramic frame disposed on the container body 31 to surround the semiconductor element 32, and 36 is a ceramic frame fixed to the ceramic frame 35 by a metallized layer formed on the top surface of the ceramic frame 35. Cap
It is. Further, 37a and 37b are the metallized layers 33b and 3 on the outside of the ceramic frame 35.
3c is an external connection terminal made of Kovar, for example. Furthermore, 38 is a heat sink made of copper and fixed to the lower surface of the container base 31 with a brazing material such as gold-tin or solder. The heat sink 38 is attached after the mounting and fixing of the semiconductor element 32 to the container base 31, the connection of the lead wires 34, the fixing of the lead wires 36, etc. are completed.

このような本発明においては、前記蓋36を構
成する部材として、前記放熱体38と同一材料、
すなわち本実施例にあつては銅を用いる。
In the present invention, the member constituting the lid 36 is made of the same material as the heat sink 38;
That is, copper is used in this embodiment.

このような構成によれば、前記放熱体38を容
器基体31に固着する際の熱処理あるいはその後
の熱処理により、当該放熱体が伸縮しても、蓋3
6も同一方向に伸縮するために、容器基体31へ
加わる応力は相殺され、該容器基体31へクラツ
クを生じない。
According to such a configuration, even if the heat radiator 38 expands or contracts due to the heat treatment when fixing the heat radiator 38 to the container base 31 or the subsequent heat treatment, the lid 3
6 also expand and contract in the same direction, the stress applied to the container base 31 is canceled out, and no cracks are caused to the container base 31.

なお、前記蓋36はそれ自体の体積が小さなた
め、該蓋36のセラミツク枠体35への固着の際
に該セラミツク枠体35、容器基体31へ加わる
応力は小さく、クラツクを生じない。したがつて
蓋36と放熱体37の固着を300〔℃〕程の温度で
同時に行なつてもよく、また蓋36を300〔℃〕程
の温度で固着した後、放熱体38を240〔℃〕程の
温度で固着する方法をとることもできる。
Incidentally, since the volume of the lid 36 itself is small, the stress applied to the ceramic frame 35 and the container base 31 when the lid 36 is fixed to the ceramic frame 35 is small, and no cracks occur. Therefore, the lid 36 and the heat sink 37 may be fixed at the same time at a temperature of about 300 [°C], or after the cover 36 is fixed at a temperature of about 300 [°C], the heat sink 38 is fixed at a temperature of about 240 [°C]. ] It is also possible to use a method of fixing at a temperature of about

以上のように、本発明によればセラミツク容器
基体上に固着された半導体素子を気密封止する蓋
を構成する材料として、前記容器基体の下面(半
導体素子の固着される面とは反対の面)に配設さ
れる放熱体と同一材料を用いることにより、前記
放熱体の固着時あるいはその後の熱処理において
もセラミツク容器基体にクラツクを生ぜず、半導
体装置の製造歩留り及び信頼性を高めることがで
きる。
As described above, according to the present invention, the lower surface of the ceramic container base (the surface opposite to the surface on which the semiconductor element is fixed) is ) By using the same material as the heat sink disposed in the heat sink, no cracks will occur in the ceramic container base during fixation of the heat sink or during subsequent heat treatment, and the manufacturing yield and reliability of semiconductor devices can be improved. .

なお前記蓋部材を構成する材料としては、放熱
体を構成する材料と同一でなくとも、ほぼ同等の
熱膨張係数を有するものであれば、適用すること
ができる。例えば放熱体を構成する材料として銅
を用いる場合には蓋部材を構成する材料として、
アルミニウム、銀等を用いることができる。
Note that the material constituting the lid member does not have to be the same as the material constituting the heat sink, but any material can be used as long as it has substantially the same coefficient of thermal expansion. For example, when copper is used as the material for the heat sink, the material for the lid member is
Aluminum, silver, etc. can be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来の半導体装置の構造を
示す断面図、第3図は本発明による半導体装置の
構造を示す断面図である。 図において11,31……セラミツク製容器基
体、12,32……半導体素子、15,35……
セラミツク枠体、16,36……蓋(キヤツプ)、
21,38……放熱体、である。
1 and 2 are cross-sectional views showing the structure of a conventional semiconductor device, and FIG. 3 is a cross-sectional view showing the structure of a semiconductor device according to the present invention. In the figure, 11, 31... Ceramic container base, 12, 32... Semiconductor element, 15, 35...
Ceramic frame body, 16, 36...lid (cap),
21, 38... Heat sink.

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁物基体の一方の主面に搭載固着された半
導体素子、前記主面上において前記半導体素子を
囲んで配設された絶縁物枠体、前記絶縁物枠体に
固着された蓋部材、前記絶縁物基体の他方の主面
に配設された放熱体及び前記半導体素子から導出
された外部接続端子を備えてなる半導体装置にお
いて、前記蓋部材が前記放熱体と同等の熱膨張係
数を有する材料から構成されてなることを特徴と
する半導体装置。
1. A semiconductor element mounted and fixed on one main surface of an insulating substrate, an insulating frame disposed surrounding the semiconductor element on the main surface, a lid member fixed to the insulating frame, and the In a semiconductor device comprising a heat sink disposed on the other main surface of an insulating substrate and an external connection terminal led out from the semiconductor element, the lid member is made of a material having a coefficient of thermal expansion equivalent to that of the heat sink. A semiconductor device comprising:
JP56107770A 1981-07-10 1981-07-10 Semiconductor device Granted JPS5810840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56107770A JPS5810840A (en) 1981-07-10 1981-07-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56107770A JPS5810840A (en) 1981-07-10 1981-07-10 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5810840A JPS5810840A (en) 1983-01-21
JPS64812B2 true JPS64812B2 (en) 1989-01-09

Family

ID=14467563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56107770A Granted JPS5810840A (en) 1981-07-10 1981-07-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5810840A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059756A (en) * 1983-09-12 1985-04-06 Ibiden Co Ltd Plug-in package and manufacture thereof
JPS6095944A (en) * 1983-10-31 1985-05-29 Ibiden Co Ltd Plug-in package and manufacture thereof
JPS6095943A (en) * 1983-10-31 1985-05-29 Ibiden Co Ltd Plug-in package and manufacture thereof
JP2531469Y2 (en) * 1990-04-17 1997-04-02 三菱重工業株式会社 Flexible joint for high temperature and high pressure
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package

Also Published As

Publication number Publication date
JPS5810840A (en) 1983-01-21

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