JPH0127596B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to a so-called SOS (silicon on sapphire) type semiconductor device in which a semiconductor is grown on sapphire, which is an insulating substrate, and elements are incorporated into the semiconductor. This relates to a manufacturing method.

[Problems to be solved by conventional technology and invention]

Conventionally, when creating devices using SOS substrates,
Diffusion of aluminum, a component of saphire, from the saphire substrate has been a problem.

That is, after a single crystal silicon film is grown on a sapphire substrate, it is necessary to diffuse various impurities, mainly phosphorus, boron, etc., in order to form elements within the silicon. During this high-temperature process of diffusing impurities such as phosphorus and boron from the silicon surface, the aluminum in the sapphire substrate diffuses into the silicon, making the silicon, especially the silicon at the interface with the sapphire substrate, always a P-type, which is a major problem. It was hot.

Conventional methods to solve this problem include:
There was a method of diffusing phosphorus, boron, etc. into silicon using a low-temperature process, but the silicon film thickness
As the size becomes larger than 1μ, if we try to diffuse impurities such as phosphorus and boron sufficiently from the surface to reach the sapphire substrate, sapphire inevitably forms in the silicon near the interface with the sapphire substrate. The drawback was that the aluminum in the substrate was diffused.

In order to reduce the influence of aluminum, it was necessary to make the amount of impurities doped into silicon during growth sufficiently larger than that of aluminum. However, increasing the amount of impurities in silicon has the major drawback of limiting the characteristics of devices formed therein.

In addition, in order to compensate for the interface charge that occurs at the interface between the sapphire substrate and the silicon on it, it is possible to introduce boron ions into the surface of the sapphire substrate in advance, but in this way boron ions, which are acceptor type impurities, When boron is implanted into the sapphire substrate, boron is diffused into the silicon provided on top of it.
In combination with aluminum diffused from sapphire, when a p-channel field effect transistor is provided in silicon, it becomes easier to conduct between the source and drain.

[Means for solving problems]

According to the present invention, the first layer on the surface of the sapphire substrate
a step of selectively introducing a donor type impurity into the region, a step of subsequently providing a semiconductor layer on the surface of the sapphire substrate, and a step of selecting the donor type impurity from the first region into the semiconductor layer located on the first region. a step of providing a p-channel field effect transistor on the surface of the semiconductor layer located on the first region; and a step of providing a p-channel field effect transistor on the surface of the sapphire substrate on a second region different from the first region. A method for manufacturing an SOS type semiconductor device is obtained, which includes a step of providing an n-channel field effect transistor on the surface of a semiconductor layer.

More specifically, in the method for manufacturing an SOS semiconductor device of the present invention, phosphorus, which becomes an n-type impurity in silicon, is added to the surface of a sapphire substrate on which silicon is grown.
Arsenic, antimony, etc. are partially implanted, and when phosphorus, boron, etc. are thermally diffused from the silicon surface after silicon growth, they are diffused from the sapphire surface to a place close to the sapphire interface in the silicon, and at the same time the movement of the diffused aluminum is inhibited. This is a method of partially canceling out the effects.

Therefore, in the SOS type semiconductor device of the present invention, various drawbacks caused by the silicon at a predetermined location near the interface with the sapphire substrate becoming P-type due to aluminum can be eliminated.

Furthermore, in the present invention, by selectively introducing donor-type impurities into the surface of the sapphire substrate, the source and drain regions of the p-channel field effect transistor can be electrically separated.
In addition to effectively operating a p-channel field effect transistor, an n-channel field effect transistor can also be provided in the same semiconductor layer.

〔Example〕

Next, in order to better understand the present invention, the present invention will be explained using figures.

Referring to FIG. 1, in order to obtain a conventional SOS type semiconductor device incorporating a P-channel MOS type element, an N-type single crystal silicon 102 is placed on a sapphire substrate 101 as shown in FIG. 1a. After the growth, selective etching is performed to leave a silicon dioxide film 103 on the silicon surface of the portion that will become the gate, and an acceptor impurity such as boron is thermally diffused into the portions 104 and 105 that will become the source and drain.

At this time, since the temperature must be raised to diffuse the acceptor impurities, aluminum diffuses from the sapphire substrate 101 into the silicon 102 near the sapphire substrate 101, converting that portion into P type.

FIG. 1b shows a state in which a P-channel MOS is incorporated using the substrate shown in FIG. 1a. sapphire substrate 101,
Silicon 102, source region 104, drain region 105, silicon dioxide film 1 as a gate film
07, silicon dioxide film 108, 108' covering other parts of silicon 102, metal wiring 109, 1
10 shows an SOS type semiconductor device consisting of 10,111 elements.

In this device, even if a positive voltage is applied to the metal wiring 110 serving as the gate electrode to make the silicon surface under the gate film 107 into a strong N type, electrical isolation between the source 104 and the drain 105 is avoided. , since the portion 106 of the silicon 102 near the sapphire substrate 101 is always P-type due to the aluminum diffused from the sapphire substrate 101, the source 104 and drain 105 are connected regardless of the voltage applied to the gate metal wiring 110. Always in a conductive state. For this purpose, this P-channel
MOS transistors often had a fatal defect in that they became inoperable and did not function as devices.

Referring to FIG. 2, the method for manufacturing the SOS type semiconductor device according to the embodiment of the present invention involves implanting impurities as ions in advance into the vicinity of the surface 202 of the sapphire substrate 201 before growing silicon on the sapphire substrate 201, as shown in FIG. 2a. I'll leave it there. In this technology, antimony is implanted with an energy of 100 Kev and the energy is 10 ¹⁴ cm ^-2 to 10 ¹⁵ cm ^-2.
Enter some degree.

After that, as in the normal process, N-type silicon 2 is placed on the sapphire substrate 201 as shown in FIG. 2b.
03 is grown, and then, as shown in FIG. 2c, a portion is covered with a silicon oxide film 204, and then boron is thermally diffused into the source region 205 and drain region 206.

During this heat treatment process, aluminum from the sapphire substrate 201 diffuses into the silicon 204, particularly in the portions close to the sapphire substrate, and at the same time, antimony, which had been implanted in advance, also diffuses into the silicon. Therefore, in the silicon portion 207 close to the sapphire substrate 201, aluminum is diffused and antimony is also diffused at the same time, so that inversion to P type due to aluminum is suppressed.

Therefore, as shown in FIG. 2d, the sapphire substrate 2 made by the subsequent normal process
01, antimony implanted portion 202, silicon 203, source region 20
5. Drain region 206, silicon portion 207 close to sapphire substrate 201 where aluminum and antimony are diffused, gate silicon dioxide film 208, silicon dioxide film 209, 209' covering other parts of silicon, metal wiring 210 ,211,
The SOS type semiconductor device consisting of 212 has a silicon portion 207 near the sapphire substrate 201 as described above.
is maintained as an n-type due to the antimony diffused from the sapphire surface 202, so the source region 205 and drain region 206 are electrically separated or electrically connected by the voltage applied to the metal wiring 211 that becomes the gate electrode. This makes it possible to have various MOS functions.

FIG. 3 shows another embodiment of the invention. This can be obtained by selectively forming a silicon dioxide film 302 on a sapphire substrate 301 and partially implanting impurities into the sapphire surface 303 using ion implantation. When making a complementary MOS type element, this is achieved by selectively exposing the sapphire surface 303 so that the impurity that becomes a donor is diffused only in the part where the P-channel MOS transistor is formed. Diffusion of the donor from the sapphire substrate 301 can be prevented from occurring in the portion where the MOS transistor is formed, and therefore it is possible to prevent conduction from occurring in the source/drain portion of the n-channel transistor.

In the embodiment of the present invention, the P-channel
As described above regarding an SOS type semiconductor device incorporating a MOS transistor, it is obvious that the implanted impurity in this case is replaced not only by antimony but also by other donor type impurities such as phosphorus and arsenic.

〔Effect of the invention〕

In the method for manufacturing an SOS semiconductor device of the present invention, donor-type impurities are partially implanted in advance into the surface of the sapphire substrate on which the semiconductor layer is grown, so that after the semiconductor layer is grown, phosphorus, boron, etc. At the time of thermal diffusion, it can be diffused from the sapphire surface to a place close to the sapphire interface in the semiconductor layer, thereby partially canceling out the action of the simultaneously diffusing aluminum. Therefore, in the SOS type semiconductor device obtained by the present invention, various drawbacks caused by the semiconductor layer at a predetermined location near the interface with the sapphire substrate becoming P-type due to aluminum can be eliminated.

Furthermore, in the present invention, by selectively introducing donor-type impurities into the surface of the sapphire substrate, the source and drain regions of the p-channel field effect transistor can be electrically separated.
In addition to effectively operating a p-channel field effect transistor, an n-channel field effect transistor can also be provided in the same semiconductor layer.

[Brief explanation of drawings]

FIG. 1 is a sectional view for explaining a conventional SOS type semiconductor device, FIG. 2 is a sectional view for explaining one embodiment of the present invention, and FIG. 3 is a sectional diagram for explaining another embodiment of the present invention. FIG. In the figure, 101, 201, 301...
Sapphire substrate, 102, 203... Silicon layer, 104, 205... Source region, 105, 2
06...Drain region, 106,207...Region close to the sapphire interface of the silicon layer, 202,3
03... Surface portion of saphire substrate implanted with impurities, 107, 208... Gate film, 10
8, 108', 209, 209', 302...Silicon dioxide film, 109, 110, 111, 21
0,211,212...Metal electrode.

Claims (1)

[Claims] 1. A step of selectively introducing donor-type impurities into a first region of a surface of a sapphire substrate, a step of subsequently providing a semiconductor layer on the surface of the sapphire substrate, and a step of providing the semiconductor layer located on the first region. selectively introducing the donor type impurity into the layer from the first region; providing a p-channel field effect transistor on the surface of the semiconductor layer located on the first region; and the sapphire substrate. a second region different from the first region of the surface of the
A method for manufacturing an SOS type semiconductor device, comprising the step of providing an n-channel field effect transistor on the surface of the semiconductor layer located on the region.