JPH0691055B2 - Method for forming outer peripheral reinforcing portion of semiconductor wafer - Google Patents
Method for forming outer peripheral reinforcing portion of semiconductor waferInfo
- Publication number
- JPH0691055B2 JPH0691055B2 JP1195757A JP19575789A JPH0691055B2 JP H0691055 B2 JPH0691055 B2 JP H0691055B2 JP 1195757 A JP1195757 A JP 1195757A JP 19575789 A JP19575789 A JP 19575789A JP H0691055 B2 JPH0691055 B2 JP H0691055B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- adhesive
- intermediate plate
- reinforcing
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 80
- 230000002093 peripheral effect Effects 0.000 title claims description 20
- 230000003014 reinforcing effect Effects 0.000 title claims description 19
- 238000000034 method Methods 0.000 title claims description 12
- 235000012431 wafers Nutrition 0.000 claims description 85
- 239000000853 adhesive Substances 0.000 claims description 29
- 230000001070 adhesive effect Effects 0.000 claims description 29
- 238000005520 cutting process Methods 0.000 claims description 11
- 239000012535 impurity Substances 0.000 claims description 8
- 238000009792 diffusion process Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 description 16
- 239000012779 reinforcing material Substances 0.000 description 10
- 230000000694 effects Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 230000002787 reinforcement Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000000454 talc Substances 0.000 description 2
- 229910052623 talc Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- BFKJFAAPBSQJPD-UHFFFAOYSA-N tetrafluoroethene Chemical group FC(F)=C(F)F BFKJFAAPBSQJPD-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、半導体ウエハ外周に補強部を形成する方法に
関する。TECHNICAL FIELD The present invention relates to a method of forming a reinforcing portion on the outer periphery of a semiconductor wafer.
さらに詳しくは、トランジスタ，ダイオード等のディス
クリート素子（個別素子）等として利用されるシリコン
半導体ウエハを厚み巾の中心より２分割に切断する際の
切断時の外周部破損を防止する半導体ウエハ周縁部の補
強方法に関する。More specifically, when a silicon semiconductor wafer used as a discrete element (individual element) such as a transistor or a diode is cut into two parts from the center of the thickness width, the peripheral part of the semiconductor wafer is prevented from being damaged during cutting. Reinforcement method.
［従来の技術］ 従来、本出願人は、シリコン単結晶の消耗低減等を目的
として、両面に不純物が拡散された不純物拡散層等を有
した半導体ウエハで厚み巾の中心線に対して線対称的材
質特性を有するウエハを厚み巾の中心部から切断する考
えを先に提案している（特開平１−293613号）。さら
に、前記半導体ウエハの切断工作について、工作効率の
の確保，切断端の損傷防止等を目的として、半導体ウエ
ハの周縁にカーボン，シリコン等で形成された当板を固
着して行う技術についても先に提案している（特開平３
−1536号公報）。[Prior Art] Conventionally, the applicant of the present invention is a semiconductor wafer having an impurity diffusion layer in which impurities are diffused on both sides for the purpose of reducing the consumption of a silicon single crystal, etc., and is line-symmetric with respect to the center line of the thickness width. The idea of cutting a wafer having specific material characteristics from the center of the thickness width has been previously proposed (JP-A-1-293613). Further, regarding the cutting work of the semiconductor wafer, for the purpose of securing the working efficiency and preventing the damage of the cut end, a technique of fixing a contact plate made of carbon, silicon or the like to the peripheral edge of the semiconductor wafer is also described above. Proposed in Japanese Patent Laid-Open No. Hei 3
-1536).
また、本出願人の先の提案において、半導体ウエハの周
縁に当板を固着する手としては、例えばウエハキャリア
に並列した半導体ウエハの周縁上部に当板を１枚づつ接
着剤で固着していくことが行なわれている。Further, according to the applicant's previous proposal, as a means for fixing the contact plates to the peripheral edge of the semiconductor wafer, for example, the contact plates are adhered one by one to the upper edge of the peripheral edge of the semiconductor wafer arranged in parallel with the wafer carrier. Is being done.
［発明が解決しようとする課題］ 前述した従来の当板を利用するディスクリート素子用基
板の製造方法では、当板を半導体ウエハの周縁に固着す
る際に、第５図に示すように接着剤Ｃが硬化するまでに
半導体ウエハＷに対して当板Ｐが傾斜してしまい固着強
度不足や寸法精度の誤差が生じたり、第６図に示すよう
に接着剤Ｃが半導体ウエハＷ側に流下してしまい汚損が
生じたりして、当板を半導体ウエハの周縁に固着する固
着工作の仕上りが不良となるという問題点を有してい
る。[Problems to be Solved by the Invention] In the above-described conventional method for manufacturing a discrete element substrate using a contact plate, when the contact plate is fixed to the peripheral edge of the semiconductor wafer, as shown in FIG. The plate P is inclined with respect to the semiconductor wafer W before the resin is cured, resulting in insufficient fixing strength and dimensional accuracy error, and as shown in FIG. 6, the adhesive C flows down to the semiconductor wafer W side. There is a problem in that the finish of the fixing work for fixing the contact plate to the peripheral edge of the semiconductor wafer becomes defective due to stains and the like.
さらに、半導体ウエハの切断終了端の損傷防止のみなら
ず切断中の外周部の破損をより広く補強することにより
防止する見地からは、当板が半導体ウエハの周縁の広い
範囲を補強すべく、当板で半導体ウエハの周縁の円弧の
広い範囲をカバーしようとするとカーボン，シリコン等
の加工成形品の板取りロスが大きくなるため、当板固着
する固着工作の材料コストが嵩むという問題点を有して
いる。Further, from the standpoint of not only preventing damage to the cutting end edge of the semiconductor wafer but also preventing damage to the outer peripheral portion during cutting by wider reinforcement, in order to reinforce the wide range of the peripheral edge of the semiconductor wafer, If a plate is used to cover a wide range of the circular arc on the periphery of the semiconductor wafer, the plate cutting loss of a processed product such as carbon or silicon increases, which causes a problem that the material cost of the fixing work for fixing the plate increases. ing.
本発明はこのような問題点を解決するためになされたも
のであり、その目的は、補強材固着工作の仕上りが良好
で工作の材料コストが安価となるような半導体ウエハ外
周の補強部形成方法を提供することにある。The present invention has been made to solve such a problem, and an object thereof is to provide a method for forming a reinforcing portion on the outer periphery of a semiconductor wafer, in which the finish of the reinforcing material fixing work is good and the material cost of the work is low. To provide.
［課題を解決するための手段］ 前述の目的を達成するため、本発明に係る半導体ウエハ
補強部形成方法は切断前の半導体ウエハとこの半導体ウ
エハよりも径の大きな中間板とを交互に垂直に密着並設
して並列方向から加圧した後、中間板相互間に接着剤を
流し込み、接着剤が硬化して成形された補強材を半導体
ウエハの周縁に一体化形成し、その後中間板を半導体ウ
エハより分離して半導体ウエハ個々に補強部を形成する
手段を採用する。[Means for Solving the Problems] In order to achieve the above-mentioned object, in the method for forming a semiconductor wafer reinforcing portion according to the present invention, a semiconductor wafer before cutting and an intermediate plate having a diameter larger than this semiconductor wafer are alternately vertically arranged. After closely adhering in parallel and applying pressure from the parallel direction, an adhesive is poured between the intermediate plates, and the reinforcing material molded by curing the adhesive is integrally formed on the peripheral edge of the semiconductor wafer, and then the intermediate plate is the semiconductor. A means for separating the wafer and forming a reinforcing portion on each semiconductor wafer is adopted.
［作用］ 前述の手段によると、半導体ウエハよりも径の大きな中
間板と半導体ウエハの周縁とによって形成されるウエハ
頂部の間隙内に接着剤が流し込まれ、その接着剤の硬化
により補強部が形成されることになり、別部材からなる
当板を接着剤を介して固着する場合のような傾倒等によ
る固着強度不足や寸法精度の誤差を生ずることはなくな
る。また、この接着剤については、半導体ウエハの両面
に中間板が圧接していることから、接着剤が流出しても
半導体ウエハ側（両面）に流下するのを中間板によって
阻止されるため、半導体ウエハを汚損することが防止さ
れる。このため、工作の仕上りが良好となるような当板
にに代る補強部を形成するという目的が達成される。[Operation] According to the above-described means, the adhesive is poured into the gap at the top of the wafer formed by the intermediate plate having a diameter larger than that of the semiconductor wafer and the peripheral edge of the semiconductor wafer, and the reinforcing portion is formed by curing the adhesive. As a result, inadequate fixing strength and dimensional accuracy error due to tilting and the like, which would otherwise occur when a contact plate made of a separate member is fixed via an adhesive, will not occur. Further, with respect to this adhesive, since the intermediate plate is pressed against both sides of the semiconductor wafer, the intermediate plate prevents the adhesive from flowing down to the semiconductor wafer side (both sides). Contamination of the wafer is prevented. For this reason, the purpose of forming a reinforcing portion that replaces the contact plate and that provides a good work finish is achieved.
さらに、接着剤はその流動性を利用して簡単に半導体ウ
エハの周縁の広い面積に充填被覆することができる。別
部材からなる当板を固着する場合のような板取りロスは
生じなく、このため、工作の材料コストが安価で補強部
を形成するという目的が達成される。Further, the adhesive can be easily filled and coated on a wide area of the periphery of the semiconductor wafer by utilizing its fluidity. There is no plate cutting loss as in the case of fixing the contact plate made of a separate member, and therefore the object of forming the reinforcing portion is achieved at a low material cost for working.
又、中間板は接着剤の効力が及ばない材質で作成されて
いて最終的な半導体ウエハと中間板の分離も容易であ
る。Further, the intermediate plate is made of a material that does not reach the effect of the adhesive, so that the final separation of the semiconductor wafer and the intermediate plate is easy.
［実施例］ 以下、本発明に係るディスクリート素子用基板の製造方
法の実施例を第１図〜第４図に基づいて説明する。[Embodiment] An embodiment of the method for manufacturing a substrate for discrete elements according to the present invention will be described below with reference to FIGS. 1 to 4.
この実施例では、第１図，第２図に示すように、まず半
導体ウエハＷとこの半導体ウエハＷよりも径の大きな中
間板１とを交互に当接し、これ等を逆台形の溝２′を上
面に有する基台２上に並列する。この並列の両側端に
は、中間板１が位置するようにしておく。なお、この半
導体ウエハＷは、両面は不純物が拡散された不純物拡散
層を有し厚み巾の中心線に対し線対称的材質特性を有す
るものである。また、この中間板１は、接着剤Ｃの影響
を受けないような材質（例えば、四弗化エチレン樹脂）
で形成されており、半導体ウエハＷの全面に当接する形
状に形成されている。また、この基台２は、適当な材質
で形成することができるが、好ましくは中間板１と同様
接着剤Ｃの影響を受けないような材質で形成する。In this embodiment, as shown in FIGS. 1 and 2, first, a semiconductor wafer W and an intermediate plate 1 having a diameter larger than that of the semiconductor wafer W are alternately brought into contact with each other, and these are inverted trapezoidal grooves 2 '. Are arranged side by side on a base 2 having an upper surface. The intermediate plate 1 is positioned at both ends of this parallel arrangement. The semiconductor wafer W has an impurity diffusion layer in which impurities are diffused on both sides and has a material characteristic line-symmetric with respect to the center line of the thickness width. The intermediate plate 1 is made of a material that is not affected by the adhesive C (for example, tetrafluoroethylene resin).
And is formed so as to contact the entire surface of the semiconductor wafer W. The base 2 can be made of an appropriate material, but is preferably made of a material that is not affected by the adhesive C like the intermediate plate 1.
次に、並列されている半導体ウエハW,中間板１の両側端
にさらに加圧板３を並設配置する。この加圧板３は、適
当な材質で形成することができるが、好ましくは中間板
１と同様接着剤Ｃの影響を受けないような材質で形成す
る。Next, the pressure plates 3 are further arranged side by side on both sides of the semiconductor wafer W and the intermediate plate 1 which are arranged in parallel. The pressure plate 3 can be formed of an appropriate material, but is preferably formed of a material that is not affected by the adhesive C like the intermediate plate 1.
さらに、並設した加圧板３の両側からクランプ等で並列
方向へ加圧力を加える。この加圧は、半導体ウエハW,中
間板１の並列を規制保持し、半導体ウエハＷの移動，傾
倒，ズレ等を防止すると共に、半導体ウエハW,中間板１
の当接間隙を減少させ両者を密接圧接するものである。Further, a pressing force is applied in a parallel direction from both sides of the pressure plates 3 arranged side by side with a clamp or the like. This pressure regulates and holds the parallel arrangement of the semiconductor wafer W and the intermediate plate 1 to prevent the semiconductor wafer W from moving, tilting, shifting, etc.
The contact gap is reduced to bring them into close contact with each other.
而後、例えばエポキシ系の接着原剤にタルク（滑石）を
混合し適正な粘度に調整した接着剤Ｃを中間板１相互間
から半導体ウエハＷの周縁に流込み、加熱槽に収容して
硬化に要する時間を短縮させ、接着剤Ｃを硬化成形し、
第２図に示すような三日月形の補強材４を半導体ウエハ
Ｗの周縁に固着硬化形成する。而後中間板は半導体ウエ
ハより分離され半導体ウエハＷは適当な保持具に保持し
てダイアモンドカッター等を用いて半導体ウエハＷの厚
み巾の中間から切断されるが、半導体ウエハW,補強材４
の双方を完全に切断するか、または半導体ウエハＷを完
全に切断するが補強材４は途中まで切断して切り残し切
断された半導体ウエハＷを分離せずに回収することもで
きる。After that, for example, the adhesive C, in which talc (talc) is mixed with an epoxy-based adhesive raw material and adjusted to have an appropriate viscosity, is poured into the peripheral edge of the semiconductor wafer W from between the intermediate plates 1 and accommodated in a heating tank for curing. The time required is shortened, the adhesive C is cured and molded,
A crescent-shaped reinforcing member 4 as shown in FIG. 2 is fixed and hardened on the periphery of the semiconductor wafer W. After that, the intermediate plate is separated from the semiconductor wafer, and the semiconductor wafer W is held in an appropriate holder and cut from the middle of the thickness width of the semiconductor wafer W by using a diamond cutter or the like.
Both of them may be completely cut, or the semiconductor wafer W may be completely cut, but the reinforcing material 4 may be cut halfway and left uncut, and the cut semiconductor wafer W may be recovered without separation.
なお、第３図，第４図は、半導体ウエハＷと補強材４と
の固着強度を高めるために、半導体ウエハW,中間板１に
変形加工を施したものである。即ち、第３図では、半導
体ウエハＷの周縁に周方向へ配設された溝Ｗ′を設け
て、半導体ウエハW,補強板４の接触面積を拡大してあ
る。また、第４図では、中間板１の半導体ウエハＷの周
縁付近に位置する部分に厚みの減少部分１′を設け、補
強材４を半導体ウエハＷの両面側まで延長形成させて、
半導体ウエハW,補強板４の接触面積を拡大してある。な
お、第４図の半導体ウエハW,補強材４の固着構造では、
完全に切断された半導体ウエハＷがなお広い面積で補強
材４と固着されていることになるため、前述の２枚同時
回収に有利である。又、切断方式の差により第４図にお
いて素材ウエハ２枚を同時に接着することも任意であ
る。3 and 4, the semiconductor wafer W and the intermediate plate 1 are subjected to deformation processing in order to increase the bonding strength between the semiconductor wafer W and the reinforcing member 4. That is, in FIG. 3, grooves W'arranged in the circumferential direction are provided on the peripheral edge of the semiconductor wafer W to enlarge the contact area between the semiconductor wafer W and the reinforcing plate 4. Further, in FIG. 4, a reduced thickness portion 1 ′ is provided in a portion of the intermediate plate 1 located near the peripheral edge of the semiconductor wafer W, and the reinforcing member 4 is formed to extend to both sides of the semiconductor wafer W.
The contact area between the semiconductor wafer W and the reinforcing plate 4 is enlarged. Incidentally, in the fixing structure of the semiconductor wafer W and the reinforcing member 4 in FIG.
The completely cut semiconductor wafer W is still bonded to the reinforcing member 4 in a large area, which is advantageous for the above-mentioned two-wafer simultaneous recovery. Also, it is optional to bond two material wafers at the same time in FIG. 4 depending on the cutting method.
このような実施例によると、補強材４の形成工作におい
ては、半導体ウエハＷよりも径の大きな中間板１が加圧
によって半導体ウエハを並列規制すると共に、中間板１
と半導体ウエハＷとの間に接着剤Ｃが流込まれる間隙が
画成されることから、半導体ウエハＷが移動，傾倒，ズ
レ等することなく、接着剤Ｃも正確な姿勢の構造に充填
されることになる。このため、接着剤Ｃが硬化成形され
て半導体ウエハＷの周縁に固着形成された補強材４は、
固着強度不足や寸法精度の誤差が生じることはなくな
る。According to such an embodiment, in the process of forming the reinforcing member 4, the intermediate plate 1 having a diameter larger than that of the semiconductor wafer W regulates the semiconductor wafers in parallel by pressurization, and
Since the gap into which the adhesive C flows is defined between the semiconductor wafer W and the semiconductor wafer W, the adhesive C is also filled in the structure in the correct posture without the semiconductor wafer W being moved, tilted, or displaced. Will be. For this reason, the reinforcing material 4 which is fixedly formed on the peripheral edge of the semiconductor wafer W by curing the adhesive C is
Insufficient bonding strength and dimensional accuracy error will not occur.
また、中間板１が半導体ウエハＷの全面を加圧している
ため、半導体ウエハＷが大径薄板でも、加圧の際に半導
体ウエハＷが折損するおそれはない。Further, since the intermediate plate 1 presses the entire surface of the semiconductor wafer W, even if the semiconductor wafer W is a large-diameter thin plate, there is no possibility of breaking the semiconductor wafer W during pressing.
さらに、半導体ウエハＷの両面に中間板１を圧接して半
導体ウエハＷと中間板１との間の間隙を減少させている
ことから、接着剤が流し込まれても半導体ウエハ側に流
下するのを阻止し、半導体ウエハＷの汚損を防止するこ
とができる。Further, since the intermediate plate 1 is pressed against both surfaces of the semiconductor wafer W to reduce the gap between the semiconductor wafer W and the intermediate plate 1, even if the adhesive is poured, the adhesive does not flow down to the semiconductor wafer side. Therefore, the semiconductor wafer W can be prevented from being soiled.
さらに、接着剤Ｃはその流動性を利用して簡単に半導体
ウエハＷの周縁の広い面積に充填被覆することができる
ことから、別部材からなる当板を固着する場合のような
板取りロスは生じなくなる。Further, since the adhesive C can be easily filled and coated on a wide area of the peripheral edge of the semiconductor wafer W by utilizing its fluidity, a plate removal loss as in the case of fixing a contact plate made of another member occurs. Disappear.
［発明の効果］ 以上のように本発明に係る半導体ウエハの外周の補強部
の形成方法は中間板、半導体ウエハの周縁によって画成
される正確な姿勢の構造（空間）に接着剤が充填されて
補強材が固着形成されることから、別部材からなる当板
を固着する場合のような傾倒等による固着強度不足や寸
法精度の誤差を生ずることはなくなる。また、半導体ウ
エハの両面に中間板が圧接されて接着剤が半導体ウエハ
の表面に沿って流下するのを阻止するため、半導体ウエ
ハの汚損が防止される。このため、当板に代る部材であ
る接着剤からなる補強材を用いて、その固着工作の仕上
りが良好となる効果がある。また、この効果により、補
強材固着後の半導体ウエハの切断工作を欠損なくかつ効
率的に行なうことができる効果を生ずる。[Advantages of the Invention] As described above, according to the method for forming the reinforcing portion on the outer periphery of the semiconductor wafer according to the present invention, the structure (space) in an accurate posture defined by the intermediate plate and the peripheral edge of the semiconductor wafer is filled with the adhesive. Since the reinforcing material is fixedly formed as a result, insufficient fixing strength and dimensional accuracy error due to tilting and the like, which would occur when fixing the contact plate made of another member, do not occur. Further, since the intermediate plate is pressed against both surfaces of the semiconductor wafer to prevent the adhesive from flowing down along the surface of the semiconductor wafer, the contamination of the semiconductor wafer is prevented. Therefore, by using a reinforcing material made of an adhesive which is a member replacing the contact plate, there is an effect that the finish of the fixing work becomes good. Further, due to this effect, there is an effect that the cutting work of the semiconductor wafer after the fixing of the reinforcing material can be efficiently performed without loss.
さらに、接着剤はその流動性により半導体ウエハの周縁
の広い面積に充填被覆することができることから、別部
材からなる当板を固着する場合のような板取りロスは生
じなくなる。このため、当板に代る部材である接着剤か
らなる補強材を用いて、その固着工作の材料コストが安
価となる効果がある。Furthermore, since the adhesive can fill and cover a wide area of the peripheral edge of the semiconductor wafer due to its fluidity, there is no plate removal loss that would occur when a contact plate made of another member is fixed. Therefore, by using a reinforcing material made of an adhesive which is a member replacing the contact plate, there is an effect that the material cost of the fixing work becomes low.
さらに、半導体ウエハの中間板を介しての並列，加圧を
利用して補強材を固着するため、既存工具，部材を利用
して、補強材の固着工作を安価，容易に実施することが
できる効果がある。Further, since the reinforcing material is fixed by utilizing parallel and pressure through the intermediate plate of the semiconductor wafer, the fixing work of the reinforcing material can be easily performed at low cost by using the existing tools and members. effective.
第１図は本発明に係るディスクリート素子用基板の製造
方法の実施例の一工程を示す正面図、第２図は第１図の
Ｘ−Ｘ線断面図、第３図，第４図は補強材形成の変形例
を示す断面図、第５図，第６図は従来例の問題点を示す
正面図である。 図 中 １……中間板 ４……補強材 Ｃ……接着材 Ｗ……半導体ウエハFIG. 1 is a front view showing one step of an embodiment of a method for manufacturing a discrete element substrate according to the present invention, FIG. 2 is a sectional view taken along line XX of FIG. 1, and FIGS. Sectional views showing a modified example of material formation, and FIGS. 5 and 6 are front views showing problems of the conventional example. In the figure 1 ... Intermediate plate 4 ... Reinforcement material C ... Adhesive material W ... Semiconductor wafer
Claims (1)
未拡散層を有し両面に不純物が拡散された不純物拡散層
を有する半導体ウエハを、その厚み巾の中央部より内周
刃で２分割に切断する際の外周部の補強方法であって、
複数枚の該半導体ウエハと、これより径の大きい中間板
を垂直に交互に密着並設して並列方向より加圧して、中
間板相互間に挾持されたウエハ頂部に形成される空隙に
接着剤を流し込み硬化させた後、中間板を半導体ウエハ
から分離して個々の半導体ウエハ外周部に補強部を形成
する方法。1. A semiconductor wafer having an impurity non-diffused layer in which impurities are not diffused in the central portion and an impurity diffusion layer in which impurities are diffused on both sides, is divided into two parts by an inner peripheral blade from the central portion of its thickness width. A method of reinforcing the outer peripheral portion when cutting into
A plurality of semiconductor wafers and an intermediate plate having a diameter larger than that of the semiconductor wafers are vertically and alternately arranged in close contact with each other, and pressure is applied from the parallel direction, and an adhesive is applied to a space formed at the top of the wafer sandwiched between the intermediate plates. After pouring and hardening, the intermediate plate is separated from the semiconductor wafer to form a reinforcing portion on the outer periphery of each semiconductor wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1195757A JPH0691055B2 (en) | 1989-07-27 | 1989-07-27 | Method for forming outer peripheral reinforcing portion of semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1195757A JPH0691055B2 (en) | 1989-07-27 | 1989-07-27 | Method for forming outer peripheral reinforcing portion of semiconductor wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0358807A JPH0358807A (en) | 1991-03-14 |
| JPH0691055B2 true JPH0691055B2 (en) | 1994-11-14 |
Family
ID=16346455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1195757A Expired - Fee Related JPH0691055B2 (en) | 1989-07-27 | 1989-07-27 | Method for forming outer peripheral reinforcing portion of semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0691055B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102014116139A1 (en) | 2014-11-05 | 2016-05-12 | Epcos Ag | Inductive component |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06105702B2 (en) * | 1987-10-28 | 1994-12-21 | 株式会社東芝 | Method for manufacturing semiconductor substrate |
-
1989
- 1989-07-27 JP JP1195757A patent/JPH0691055B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0358807A (en) | 1991-03-14 |
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