JPH0785549B2 - Time slot allocation method - Google Patents

Description

The present invention relates to a time slot allocation method for a bit multiplexer that accommodates a plurality of low speed lines.

〔Overview〕

The present invention provides a method for allocating time slots in a time slot allocating method for a bit multiplexer, by allocating specific bits such as frame bits at intervals without allocating them in a concentrated manner, and allocating low-speed line information bits to blanks. It is designed so that it can be performed densely.

[Conventional technology]

Conventionally, in this type of time slot allocation, if one frame length on the high-speed side is X and the speed on the high-speed side is Y, the total number of bits on the high-speed side Z is Z = X / 1 / Y (1) For example, 1 frame length is 5ms, high speed is 4
Assuming 8KB / s, the total number of bits on the high-speed side Z is Z = 5ms / 1 / 48KB / s = 240 bits. Here, when allocating to the high speed side time slot, as shown in FIG. 2, the F bit 101 is first allocated to 1 bit, and then the control bit C102 is allocated to 1 bit. Control bit data speed is 2.4KB /
If s, then the number of bits to allocate for this channel is 5
ms / 1 / 2.4KB / s = 12 bits, and when allocating this bit, it is allocated at equal intervals to the total number of bits on the high-speed side, so it is allocated at 20-bit (240/12 = 20-bit) intervals.

Next, when allocating the two low-speed channels to the high-speed side, the speed of the first low-speed line is set as shown in FIG.
If the speed of the second low-speed line is 19.2KB / s and the speed of the second low-speed line is also 19.2KB / s, the number of bits allocated to the first low-speed line is 5ms / 1 /
19.2KB / s = 96 bits, and when allocating this bit, it is allocated at equal intervals to the total number of bits on the high-speed side as with the control bits described above, so D ₁ = 240 bits / 96 =
It will be 2.5 bits and will not be an integral multiple. However, since the total number of bits may be 96 bits, D ₁ = 2 bits, 3 bits, 2 bits, 3 bits, ... next,
The allocation bit and allocation interval of the second low speed line are calculated and allocated on the time slot. Since the allocation bit and allocation interval are the same speed as the first low speed line, D ₂ =
Allocate every 2 bits, 3 bits, 2 bits, 3 bits ...

[Problems to be solved by the invention]

In such a conventional allocation method, although the total speed of the low-speed line side has a sufficient space for the high-speed speed as shown in Fig. 3, the total speed of the high-speed side is 48KB / s 19.2
KB / s × 2) = 9.6KB / s), when allocating the D ₂ bit on the second low-speed line side after allocating the first low-speed line, D ₂
Although the bit interval is 2 bits, 3 bits ..., Allocation becomes impossible because the F bit, C bit and D ₁ bit are in between. As a result, only 19.2 KB / s can be allocated to the low speed line side, although the speed of the high speed line side is 48 KB / s. As described above, the conventional time slot allocation method has a drawback that the transmission efficiency is lowered.

The present invention eliminates such drawbacks, and an object of the present invention is to provide a time slot allocation method capable of densely allocating time slots.

[Means for solving problems]

According to the present invention, the control bit is allocated at a time slot position such that the interval between the first bit of the control bit and the frame bit to be allocated in the frame at equal intervals is the same as the interval between the last bit of the control bit and the next frame bit. It is characterized in that it is distributed and allocated to time slots having a bit interval determined by the information speed, and bits constituting digital information coming from a plurality of low speed lines are allocated to the remaining time slots.

[Action]

Calculate the total number of allocated bits based on the speed of the high-speed line. Also, the total number of allocated bits is calculated based on the speed of the low speed line. Frame bits and game control signal bits are allocated separately so that the frame bits and game control signal bits are distributed so that they do not concentrate near the beginning of the time slot, and the bits related to the information coming from the low-speed line are equally spaced. Allocate. This avoids overlapping bits related to information coming from multiple low speed lines,
Can be densely assigned to time slots.

〔Example〕

 An embodiment of the present invention will be described below with reference to FIG.

The high-speed side speed is 48 KB / s, the game control signal c is 2.4 KB / s, the first low-speed side speed is 19.2 KB / s, and the second low-speed side speed is 19.2 KB / s. 1 bit is assigned to the frame bit F as the start bit. Next, 12 bits of the game control signal c are allocated with an allocation interval of 20 bits. At this time, the first bit of the game control signal c is allocated to a position where the frame bit F is substantially at the center. That is, the 10th bit before the F bit is the last bit, and the 9th bit after the F bit is
The game control signal c is allocated at 20-bit intervals, with the first bit as the first bit. Next, the bit D ₁ of the first low speed line having a speed of 19.2 KB / s is allocated. Allocation interval 2.5 bits, that is, 2 bits, 3 bits ... 96 bits at intervals D ₁
Assign With 1 bit before the F bit as the final bit centering on the F bit and 2 bits after the F bit as the first bit, 2 bits, 3 bits ... 96 bits are allocated at intervals. Next, the bit D ₂ on the second low-speed line side having a speed of 19.2 KB / s is allocated. The allocation bit and the allocation interval are the same as the D ₁ bit, the second bit before the F bit with the F bit as the center is the final bit, the first bit after the F bit is the first bit, the second bit, 3 bits ... 96 bits are allocated at intervals.

〔The invention's effect〕

As described above, according to the present invention, allocation bits are allocated so as not to be concentrated at the start position of a time slot, so that allocation can be performed efficiently, and therefore transmission efficiency can be improved.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a time slot allocation method of the present invention. FIG. 2 is an explanatory diagram showing a conventional time slot allocation method. FIG. 3 is an explanatory diagram showing a conventional time slot allocation method. 1, 101, 201 ... Frame bit, 2, 102, 202 ... Play control signal, 3, 203 ... First low speed line bit,
4, 204 ... Bit of the second resistance line.

Claims (1)

[Claims] 1. A time slot allocating method for multiplexing digital information arriving from a plurality of low speed lines on a high speed line together with frame bits and control bits for control, and allocating the digital information of the low speed line to a time slot as a frame structure for multiplexing. In the above, the control bit at the time slot position where the interval between the first bit of the control bit and the above frame bit that should be allocated at even intervals in the frame is the same as the interval between the last bit of the control bit and the next frame bit. The time slot allocation method is characterized by allocating to the time slots of the bit interval determined by the information speed of, and allocating the bits constituting the digital information coming from the plurality of low speed lines to the remaining time slots.