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JPH0787178B2 - Method for forming single crystal semiconductor thin film - Google Patents
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JPH0787178B2 - Method for forming single crystal semiconductor thin film - Google Patents

Method for forming single crystal semiconductor thin film

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Publication number
JPH0787178B2
JPH0787178B2 JP62145243A JP14524387A JPH0787178B2 JP H0787178 B2 JPH0787178 B2 JP H0787178B2 JP 62145243 A JP62145243 A JP 62145243A JP 14524387 A JP14524387 A JP 14524387A JP H0787178 B2 JPH0787178 B2 JP H0787178B2
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Japan
Prior art keywords
thin film
substrate
semiconductor thin
single crystal
film
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JPS63310109A (en
Inventor
徹 壇
Original Assignee
工業技術院長
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Publication of JPH0787178B2 publication Critical patent/JPH0787178B2/en
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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、単結晶半導体基板上に形成した絶縁膜上に
単結晶半導体薄膜を形成する単結晶半導体薄膜の形成方
法に関する。
TECHNICAL FIELD The present invention relates to a method for forming a single crystal semiconductor thin film in which a single crystal semiconductor thin film is formed on an insulating film formed on a single crystal semiconductor substrate.

〔従来の技術〕[Conventional technology]

一般に、単結晶半導体基板としての単結晶シリコン基板
上にシリコン酸化膜などの絶縁膜を形成し、この絶縁膜
上に単結晶半導体薄膜としての単結晶シリコン膜をエピ
タキシヤル成長させたSOI〔silicon on insulator〕膜
は、集積回路の高集積化,高速化,消費電力の低減化を
図るための素子材料として注目されている。
In general, an insulating film such as a silicon oxide film is formed on a single crystal silicon substrate as a single crystal semiconductor substrate, and a single crystal silicon film as a single crystal semiconductor thin film is epitaxially grown on this insulating film. The [insulator] film has been attracting attention as an element material for achieving higher integration, higher speed, and lower power consumption of integrated circuits.

そして従来、このようなSOI膜を構成する単結晶半導体
薄膜としての単結晶シリコン膜を形成する手法として、
レーザ光を用いた再結晶化法や、全面エピタキシヤル成
長法などがよく知られており、そのひとつに、シリコン
基板上の絶縁膜を部分的に除去してシリコン基板を露出
させ、露出したシリコン基板上および絶縁膜上に非晶質
シリコン膜を形成し、前記露出したシリコン基板を種と
して上方向および水平方向に前記非晶質シリコン膜を単
結晶化する固相エピタキシヤル成長法(以下SPE法とい
う)があり、単結晶化の基板温度が約600℃と低温で行
なえ、しかも成長した単結晶シリコン膜の平坦性が良好
であるため、積層構造を有する半導体立体回路素子を作
製する上で、好適である。
And conventionally, as a method of forming a single crystal silicon film as a single crystal semiconductor thin film that constitutes such an SOI film,
The recrystallization method using laser light and the full-face epitaxial growth method are well known. One of them is to partially remove the insulating film on the silicon substrate to expose the silicon substrate and expose the exposed silicon. A solid-phase epitaxial growth method (hereinafter referred to as SPE) in which an amorphous silicon film is formed on a substrate and an insulating film, and the exposed silicon substrate is used as a seed to single crystallize the amorphous silicon film in the upward and horizontal directions. Method), the substrate temperature for single crystallization can be as low as about 600 ° C, and the flatness of the grown single crystal silicon film is good. Is preferred.

ところが、前記したような通常のSPE法の場合、単結晶
化の途中で,非晶質シリコン膜中にランダムな核が発生
し、この核により水平方向への単結晶シリコンの成長が
妨げられるため、水平方向への単結晶シリコン膜の成長
距離が制限され、5μm程度にしかならない。
However, in the case of the normal SPE method as described above, random nuclei are generated in the amorphous silicon film during the single crystallization, and the nuclei hinder the growth of the single crystal silicon in the horizontal direction. The growth distance of the single crystal silicon film in the horizontal direction is limited, and is only about 5 μm.

そこで、たとえばセカンド インターナシヨナル ワー
クシヨツプ オン フユーチヤ エレクトロン デバイ
シズーSOI テクノロジイ アンド 3D インテグレー
シヨン−マーチ 19−21,1985,pp63−68〔2nd Internat
ional Workshop on Future Electron Devices−SOI Tec
hnology and 3D Integration−March 19−21,1985,pp63
−68〕の“IMPURITY EFFECTS IN LATERAL SOLLD PHASE
EPITAXY"(H.ISHIWARA et al.)において、前記した非
晶質シリコン膜にリン〔P〕やボロン〔B〕等を高濃度
にドープすることにより、水平方向への単結晶シリコン
膜の成長距離を24μmまで伸ばすことができると報告さ
れている。
So, for example, Second International Workplace Electronics, Electronics Devices SOI Technology and 3D Integration-March 19-21,1985, pp63-68 [2nd Internat
ional Workshop on Future Electron Devices-SOI Tec
hnology and 3D Integration-March 19-21,1985, pp63
−68] 's “IMPURITY EFFECTS IN LATERAL SOLLD PHASE
EPITAXY "(H.ISHIWARA et al.), The amorphous silicon film described above is doped with phosphorus [P] or boron [B] at a high concentration to increase the growth distance of the single crystal silicon film in the horizontal direction. It has been reported that can be extended to 24 μm.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかし、PやBを高濃度にドープした単結晶シリコン膜
にデバイスを作製することは困難であるため、このよう
な高濃度の単結晶シリコン膜からなるSOI膜を用いて半
導体立体回路素子を作製することができないという問題
点がある。
However, since it is difficult to fabricate a device in a single crystal silicon film in which P or B is highly doped, a semiconductor three-dimensional circuit element is fabricated using an SOI film made of such a highly concentrated single crystal silicon film. There is a problem that you cannot do it.

そこで、この発明では、不純物をドープすることなく、
単結晶半導体薄膜の水平方向への成長距離の増大を図
り、膜質で良好で,デバイス作製の可能な単結晶半導体
薄膜が得られるようにすることを技術的課題とする。
Therefore, in the present invention, without doping impurities,
A technical problem is to increase the growth distance of a single crystal semiconductor thin film in the horizontal direction so that a single crystal semiconductor thin film having good film quality and capable of device fabrication can be obtained.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はこのような技術的課題に留意して為されたもの
であつて、単結晶半導体基板上に絶縁膜を形成し、前記
絶縁膜を部分的に除去して前記基板表面を部分的に露出
させ、その部分的に露出した基板表面も含め前記絶縁膜
上に前記基板と同一材料の非晶質半導体薄膜を形成し、
前記基板を加熱保持しつつ、前記非晶質半導体薄膜の表
面全面にシリコンイオンのイオン注入を行い、前記非晶
質半導体薄膜を上方向および水平方向への固相エピタキ
シャル成長法により単結晶化する単結晶半導体薄膜の形
成方法において、 前記基板の加熱のみにより前記露出した基板上の前記非
晶質半導体薄膜を単結晶化するようにした後、前記基板
を加熱保持しつつ、前記非晶質半導体薄膜の厚み方向の
全領域に注入イオンが到達するよう、シリコンイオンの
注入エネルギとドーズ量との割合を変化させた条件に順
次切り換え、各条件下で前記非晶質半導体薄膜の表面全
面へのイオン注入が繰り返し行われることを特徴とす
る。
The present invention has been made in view of such technical problems, in which an insulating film is formed on a single crystal semiconductor substrate, and the insulating film is partially removed to partially remove the substrate surface. Exposing, forming an amorphous semiconductor thin film of the same material as the substrate on the insulating film including the partially exposed substrate surface,
While the substrate is heated and held, silicon ions are implanted into the entire surface of the amorphous semiconductor thin film, and the amorphous semiconductor thin film is single-crystallized by solid phase epitaxial growth in the upward and horizontal directions. In the method for forming a crystalline semiconductor thin film, the amorphous semiconductor thin film on the exposed substrate is single-crystallized only by heating the substrate, and then the amorphous semiconductor thin film is held while the substrate is heated and held. In order to allow the implanted ions to reach the entire region in the thickness direction, the conditions are changed sequentially such that the ratio of the implantation energy of silicon ions and the dose amount is changed. Characterized by repeated injections.

〔作用〕[Action]

したがつて、この発明によると、絶縁膜が部分的に除去
されて露出した単結晶半導体基板上および絶縁膜上に非
晶質半導体薄膜が形成され、この非晶質半導体薄膜が上
方向および水平方向への固相エピタキシャル成長法によ
り単結晶化され、単結晶半導体薄膜が形成される。
Therefore, according to the present invention, the amorphous semiconductor thin film is formed on the single crystal semiconductor substrate and the insulating film which are exposed by partially removing the insulating film. Single crystal is formed by a solid-phase epitaxial growth method in the direction to form a single crystal semiconductor thin film.

このとき、前記した文献にも記載れているように、非晶
質半導体薄膜中に発生するランダムな核の発生速度をn
〔cm-2s-1〕,水平方向へのエピタキシャル成長速度を
V〔cm/s〕としたときに、単結晶半導体薄膜の水平方向
への最大成長距離Lは、(V/n)1/3に比例することが知ら
れており、非晶質半導体薄膜の単結晶化の際に、基板を
所定温度に加熱保持しつつ,非晶質半導体薄膜の表面全
面にイオン注入を行なうと、非晶質半導体薄膜に均一に
照射損傷が与えられるが、すでに単結晶化している部分
では、照射損傷により結晶性が乱れても,アニールアウ
トにより結晶性がすぐに回復して結晶性の低下が防止さ
れ、単結晶していない非晶質の部分では、加熱により発
生したランダムな核が照射損傷により再び非晶質に戻る
ため、成長速度Vを一定に保持したまま,核の発生速度
nを低減することができ、不純物を高濃度にドープする
ことなく、単結晶半導体薄膜の水平方向への最大成長距
離の増大が図れ、膜質が良好で,デバイス作製の可能な
単結晶半導体薄膜が得られる。
At this time, as described in the above-mentioned literature, the generation rate of random nuclei generated in the amorphous semiconductor thin film is n.
[Cm −2 s −1 ], and the horizontal epitaxial growth rate is V [cm / s], the maximum horizontal growth distance L of the single crystal semiconductor thin film is (V / n) 1/3. It is known that when an amorphous semiconductor thin film is single-crystallized, ion implantation is performed on the entire surface of the amorphous semiconductor thin film while the substrate is heated and held at a predetermined temperature. Irradiation damage is uniformly applied to the thin film semiconductor thin film, but even if the crystallinity is disturbed by irradiation damage in the portion that has already become a single crystal, the crystallinity is immediately restored by annealing out and the deterioration of crystallinity is prevented. In the non-single-crystal amorphous portion, random nuclei generated by heating return to amorphous again due to irradiation damage, so that the nucleation rate n is reduced while keeping the growth rate V constant. It is possible to conduct single crystal semiconductors without high-concentration doping of impurities. Increase in maximum growth distance in the horizontal direction of the thin film Hakare, film quality is good, the single-crystal semiconductor thin film device fabrication is obtained.

〔実施例〕〔Example〕

つぎに、この発明を、その1実施例を示した図面ととも
に詳細に説明する。
Next, the present invention will be described in detail with reference to the drawings showing one embodiment thereof.

まず、第2図(a)に示すように、(100)の面方位お
持つ単結晶半導体基板としての単結晶シリコン基板
(1)の表面を、RCA洗浄,すなわち有機洗浄後にさら
に酸により洗浄し、同図(b)に示すように、基板
(1)の表面を熱酸化して約500Åの膜厚のシリコン酸
化膜からなる絶縁膜(2)を形成し、その後同図(c)
に示すように、通常のリソグラフイ技術により絶縁膜
(2)の一部を〈001〉軸に平行にエツチングし、絶縁
膜(2)を部分的に除去して窓(3)を形成し、基板
(1)を露出させる。
First, as shown in FIG. 2 (a), the surface of a single crystal silicon substrate (1) as a single crystal semiconductor substrate having a plane orientation of (100) is further cleaned with an acid after RCA cleaning, that is, organic cleaning. As shown in FIG. 2 (b), the surface of the substrate (1) is thermally oxidized to form an insulating film (2) made of a silicon oxide film having a film thickness of about 500 Å, and then, shown in FIG.
As shown in Fig. 3, a part of the insulating film (2) is etched in parallel with the <001> axis by a normal lithographic technique, and the insulating film (2) is partially removed to form a window (3). The substrate (1) is exposed.

つぎに、基板(1),絶縁膜(2)の表面を再びRCA洗
浄し、第3図に示すような非晶質シリコン形成用の減圧
CVD装置のサセプタ(Sc)に基板(1)をセツトし、第
2図(d)に示すように、露出した基板(1)上および
絶縁膜(2)上に非晶質半導体薄膜としての非晶質シリ
コン薄膜(4)を形成する。
Next, the surfaces of the substrate (1) and the insulating film (2) are cleaned by RCA again to reduce the pressure for forming amorphous silicon as shown in FIG.
The substrate (1) is set on the susceptor (Sc) of the CVD device, and as shown in FIG. 2 (d), a non-crystalline semiconductor thin film is formed on the exposed substrate (1) and insulating film (2). A crystalline silicon thin film (4) is formed.

ところで、第3図において、(Tu)は石英反応管、(S
h)は反応管(Tu)内のサセプタ(Sc)を保持するホル
ダ、(P)は反応管(Tu)の排気用ロータリポンプ、
(G)は真空度計、(B)は反応管(Tu)に設けた電極
(E)と,タングステンワイヤ(W)を介したサセプタ
(Sc)との間に直流バイアスを供給する直流電源、
(T)は熱電対(t)を介してサセプタ(Sc)の温度を
測定し赤外線ランプ(Lm)の通電制御を行なつて基板
(1)の温度を制御する温度制御手段、(RF)は反応管
(Tu)に巻装した高周波加熱コイル(C)に高周波を印
加して導入ガスのプラズマを発生する高周波電源、(G
S)はガス導入部(g)を介して反応管(Tu)内にSi
H4,PH3,Arの各ガスを供給する反応ガス供給手段であ
る。
By the way, in FIG. 3, (Tu) is a quartz reaction tube, and (Su)
h) is a holder for holding the susceptor (Sc) in the reaction tube (Tu), (P) is a rotary pump for exhausting the reaction tube (Tu),
(G) is a vacuum gauge, (B) is a DC power supply that supplies a DC bias between the electrode (E) provided in the reaction tube (Tu) and the susceptor (Sc) via the tungsten wire (W),
(T) is a temperature control means for measuring the temperature of the susceptor (Sc) via the thermocouple (t) and controlling the energization of the infrared lamp (Lm) to control the temperature of the substrate (1). A high-frequency power supply that applies high-frequency waves to a high-frequency heating coil (C) wound around a reaction tube (Tu) to generate plasma of introduced gas, (G
S) is Si in the reaction tube (Tu) through the gas introduction part (g).
It is a reaction gas supply means that supplies each gas of H 4 , PH 3 , and Ar.

そして、このような減圧CVD装置を用い、基板(1)の
温度を550℃に保持しつつ,Ar+プラズマにより基板
(1),絶縁膜(2)の表面を清浄化し、SiH4の熱分解
により膜厚約2000Åの非晶質シリコン薄膜(4)を形成
したのち、第4図に示すようなイオン注入装置の反応室
内に基板(1)ごと移し替え、ヒータ(h)を備えたホ
ルダ(H)に基板(1)をセツトし、ヒータ(h)によ
り基板(1)を約600℃に加熱保持し、非晶質シリコン
薄膜(4)の表面全面に、イオン発生・加速手段(Ia)
からのSi+を注入し、固相エピタキシャル成長法により
非晶質シリコン薄膜(4)を単結晶化する。
Then, using such a low pressure CVD apparatus, while maintaining the temperature of the substrate (1) at 550 ° C., the surfaces of the substrate (1) and the insulating film (2) are cleaned by Ar + plasma to thermally decompose SiH 4 . After forming an amorphous silicon thin film (4) with a film thickness of about 2000 Å by the above, the substrate (1) is transferred into the reaction chamber of the ion implantation apparatus as shown in FIG. The substrate (1) is set on (H), and the substrate (1) is heated and held at about 600 ° C. by the heater (h), and the ion generating / accelerating means (Ia) is formed on the entire surface of the amorphous silicon thin film (4).
Si + is injected and the amorphous silicon thin film (4) is single-crystallized by the solid phase epitaxial growth method.

すなわち、当初イオン注入は行なわずに,ヒータ(h)
の加熱により基板(1)を約600℃に保持すると、第2
図(e)に示すように、窓(3)の基板(1)を種とし
て,非晶質シリコン薄膜(4)が上方向への固相エピタ
キシャル成長により単結晶化し、約60分でシリコン薄膜
(4)の上面まで達し、窓(3)の上側に単結晶シリコ
ン層(5)が成長する。
That is, without performing ion implantation at first, the heater (h)
If the substrate (1) is kept at about 600 ° C by heating the
As shown in FIG. 6E, using the substrate (1) of the window (3) as a seed, the amorphous silicon thin film (4) is single-crystallized by upward solid phase epitaxial growth, and the silicon thin film (4) is formed in about 60 minutes. 4) reaches the upper surface and a single crystal silicon layer (5) grows on the upper side of the window (3).

つぎに、基板(1)の温度を約600℃に保持し続け、Si+
のエネルギ〔KeV〕とドーズ量〔×1015cm-2〕との割合
を、160/1.0,80/0.36,40/0.18の各条件に順次切り換
え、各条件下でSi+の注入を繰り返すと、第1図に示す
ように、水平方向への固相エピタキシャル成長により、
単結晶半導体薄膜としての単結晶シリコン薄膜(6)が
形成される。
Next, continuing to maintain the temperature of the substrate (1) to about 600 ° C., Si +
The energy [KeV] and dose [× 10 15 cm -2 ] ratio of 160 / 1.0, 80 / 0.36, 40 / 0.18 were sequentially switched, and Si + implantation was repeated under each condition. , As shown in FIG. 1, by solid phase epitaxial growth in the horizontal direction,
A single crystal silicon thin film (6) as a single crystal semiconductor thin film is formed.

このようにシリコン薄膜(4)の表面全面へのイオン注
入の条件を変化させて繰り返し行うことによって、シリ
コン薄膜(4)の厚み方向の限られた領域にのみイオン
が到達するのではなく、該薄膜(4)の厚み方向の全領
域に注入イオンを到達せしめることができる。そしてこ
のようにシリコン薄膜(4)の表面全面へのイオン注入
の条件を変化させて繰り返し行うことによって、シリコ
ン薄膜(4)に均一に照射損傷が与えられるが、すでに
単結晶化している部分では、照射損傷により結晶性が乱
れても,アニールアウトにより結晶性がすぐに回復して
結晶性の低下が防止され、単結晶化していない非晶質の
部分では、加熱により発生したランダムな核(7)が,
照射損傷により再び非晶質に戻り、エピタキシャル成長
速度を一定に保持したまま,核(7)の発生速度を低減
でき、単結晶シリコン薄膜(6)の水平方向への最大成
長距離Lを増大することができ、約10時間の工程で最大
成長距離Lとして約8μmが達成できた。
By repeating the ion implantation conditions on the entire surface of the silicon thin film (4) in this manner, the ions do not reach only a limited region in the thickness direction of the silicon thin film (4), but The implanted ions can reach the entire region of the thin film (4) in the thickness direction. By repeatedly performing ion implantation on the entire surface of the silicon thin film (4) by changing the conditions as described above, irradiation damage is uniformly given to the silicon thin film (4). , Even if the crystallinity is disturbed by irradiation damage, the crystallinity is immediately recovered by annealing out and the deterioration of the crystallinity is prevented. In the non-single-crystallized amorphous part, random nuclei generated by heating ( 7)
To return to an amorphous state again by irradiation damage, reduce the generation rate of nuclei (7) while keeping the epitaxial growth rate constant, and increase the maximum growth distance L of the single crystal silicon thin film (6) in the horizontal direction. The maximum growth distance L of about 8 μm was achieved in the process of about 10 hours.

ところで、高温下におけるシリコン基板へのイオン注入
に関する文献として、ジャーナル オブ アプライド
フイジクス ボリウム40,ナンバ2フエブラリ 1969 P.
842〜854〔JOURNAL OF APPLIED PHYSICS VOLUME40,NUMB
ER2FEBRUARY 1969 P.842〜854〕がある。
By the way, as a literature on ion implantation into silicon substrates at high temperature, the Journal of Applied
Physics Volium 40, Number 2 Fueburari 1969 P.
842〜854 (JOURNAL OF APPLIED PHYSICS VOLUME40, NUMB
ER2FEBRUARY 1969 P.842 ~ 854].

〔発明の効果〕〔The invention's effect〕

本発明は以上の説明から明らかなように、単結晶半導体
基板上に絶縁膜を形成し、前記絶縁膜を部分的に除去し
て前記基板表面を部分的に露出させ、その部分的に露出
した基板表面も含め前記絶縁膜上に前記基板と同一材料
の非晶質半導体薄膜を形成し、前記基板を加熱保持しつ
つ、前記非晶質半導体薄膜の表面全面にシリコンイオン
のイオン注入を行い、前記非晶質半導体薄膜を上方向お
よび水平方向への固相エピタキシャル成長法により単結
晶化する単結晶半導体薄膜の形成方法において、前記基
板の加熱のみにより前記露出した基板上の前記非晶質半
導体薄膜を単結晶化するようにした後、前記基板を加熱
保持しつつ、前記非晶質半導体薄膜の厚み方向の全領域
に注入イオンが到達するよう、シリコンイオンの注入エ
ネルギとドーズ量との割合を変化させた条件に順次切り
換え、各条件下で前記非晶質半導体薄膜の表面全面への
イオン注入を繰り返し行うので、不純物をドープするこ
となく、単結晶半導体薄膜の水平方向への固相エピタキ
シャル成長距離の増大を図ることができ、しかも結晶性
の低下を防止でき、膜質が良好で,デバイス作製の可能
な単結晶半導体薄膜が得られ、半導体立体回路素子の作
製に極めて有効である。
As is apparent from the above description, the present invention forms an insulating film on a single crystal semiconductor substrate, partially removes the insulating film to partially expose the substrate surface, and then partially exposes the substrate surface. An amorphous semiconductor thin film of the same material as the substrate is formed on the insulating film including the substrate surface, and while the substrate is heated and held, ion implantation of silicon ions is performed on the entire surface of the amorphous semiconductor thin film, A method for forming a single crystal semiconductor thin film, wherein the amorphous semiconductor thin film is single-crystallized by solid-phase epitaxial growth in an upward direction and a horizontal direction, wherein the amorphous semiconductor thin film on the exposed substrate is heated only by heating the substrate. After the single crystal is crystallized, the implantation energy and dose of silicon ions are adjusted so that the implanted ions reach the entire region in the thickness direction of the amorphous semiconductor thin film while heating and holding the substrate. Of the single crystal semiconductor thin film in the horizontal direction without impurity doping because the ion implantation is repeatedly performed on the entire surface of the amorphous semiconductor thin film under each condition. It is possible to obtain a single crystal semiconductor thin film capable of increasing the phase epitaxial growth distance, preventing deterioration of crystallinity, having a good film quality, and capable of producing a device, which is extremely effective for producing a semiconductor three-dimensional circuit element.

【図面の簡単な説明】[Brief description of drawings]

図面は、この発明の単結晶半導体薄膜の形成方法の1実
施例を示し、第1図は単結晶半導体薄膜の形成の最終工
程の断面図、第2図(a)〜(e)はそれぞれ単結晶半
導体薄膜の形成途中における断面図、第3図および第4
図はそれぞれ単結晶半導体薄膜の形成に使用する減圧CV
D装置およびイオン注入装置の概略構成図である。 (1)……単結晶シリコン基板、(2)……絶縁膜、
(4)……非晶質シリコン薄膜、(6)……単結晶シリ
コン薄膜。
The drawings show one embodiment of the method for forming a single crystal semiconductor thin film of the present invention. FIG. 1 is a sectional view of the final step of forming the single crystal semiconductor thin film, and FIGS. Sectional views during formation of the crystalline semiconductor thin film, FIG. 3 and FIG.
The figure shows the depressurized CV used for forming single crystal semiconductor thin films.
It is a schematic block diagram of a D apparatus and an ion implantation apparatus. (1) …… Single crystal silicon substrate, (2) …… Insulating film,
(4) …… Amorphous silicon thin film, (6) …… Single crystal silicon thin film.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】単結晶半導体基板上に絶縁膜を形成し、前
記絶縁膜を部分的に除去して前記基板表面を部分的に露
出させ、その部分的に露出した基板表面も含め前記絶縁
膜上に前記基板と同一材料の非晶質半導体薄膜を形成
し、前記基板を加熱保持しつつ、前記非晶質半導体薄膜
の表面全面にシリコンイオンのイオン注入を行い、前記
非晶質半導体薄膜を上方向および水平方向への固相エピ
タキシャル成長法により単結晶化する単結晶半導体薄膜
の形成方法において、 前記基板の加熱のみにより前記露出した基板上の前記非
晶質半導体薄膜を単結晶化するようにした後、前記基板
を加熱保持しつつ、前記非晶質半導体薄膜の厚み方向の
全領域に注入イオンが到達するよう、シリコンイオンの
注入エネルギとドーズ量との割合を変化させた条件に順
次切り換え、各条件下で前記非晶質半導体薄膜の表面全
面へのイオン注入が繰り返し行われることを特徴とした
単結晶半導体薄膜の形成方法。
1. An insulating film is formed on a single crystal semiconductor substrate, the insulating film is partially removed to partially expose the substrate surface, and the partially exposed substrate surface is also included in the insulating film. An amorphous semiconductor thin film of the same material as that of the substrate is formed on the substrate, and while the substrate is heated and held, ion implantation of silicon ions is performed on the entire surface of the amorphous semiconductor thin film to form the amorphous semiconductor thin film. In a method for forming a single crystal semiconductor thin film which is single crystallized by solid phase epitaxial growth in the upward and horizontal directions, the amorphous semiconductor thin film on the exposed substrate is single crystallized only by heating the substrate. Then, while the substrate is heated and held, the ratio of the implantation energy and the dose amount of silicon ions is changed so that the implanted ions reach the entire region in the thickness direction of the amorphous semiconductor thin film. A method for forming a single crystal semiconductor thin film, which is characterized by sequentially switching and repeatedly performing ion implantation on the entire surface of the amorphous semiconductor thin film under each condition.
JP62145243A 1987-06-12 1987-06-12 Method for forming single crystal semiconductor thin film Expired - Lifetime JPH0787178B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62145243A JPH0787178B2 (en) 1987-06-12 1987-06-12 Method for forming single crystal semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62145243A JPH0787178B2 (en) 1987-06-12 1987-06-12 Method for forming single crystal semiconductor thin film

Publications (2)

Publication Number Publication Date
JPS63310109A JPS63310109A (en) 1988-12-19
JPH0787178B2 true JPH0787178B2 (en) 1995-09-20

Family

ID=15380630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62145243A Expired - Lifetime JPH0787178B2 (en) 1987-06-12 1987-06-12 Method for forming single crystal semiconductor thin film

Country Status (1)

Country Link
JP (1) JPH0787178B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3240719B2 (en) * 1992-12-10 2001-12-25 ソニー株式会社 Semiconductor thin film crystal growth method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041032B2 (en) * 1982-03-23 1985-09-13 日本電信電話株式会社 Single crystal formation method on amorphous film

Also Published As

Publication number Publication date
JPS63310109A (en) 1988-12-19

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