JP2855992B2 - Automatic generation of test input sequence - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for automatically generating a test input sequence. In particular, after setting an input value to an undefined input bit string and performing a failure simulation, backtracking is performed if no failure is found. The present invention relates to a method for automatically generating a test input sequence having means for improving a detection rate.

[0002]

2. Description of the Related Art Conventionally, a single fault is extracted, an input value detected for the fault is set in an input bit string, and it is confirmed that the single fault is detected. After a random input value was set in the system, a concurrent failure simulation was performed to obtain a detection rate. For the concurrent failure simulation, see Kinoshita and Fujiwara, "Diagnosis of Digital Circuit Failure (Part 1)", Engineering Books, 1983.

[0003]

In the above-described conventional automatic generation method of the test input sequence, the input value is determined for one fault. Therefore, undefined input bits not related to the fault have random values. Had been given. For this reason, there is a problem that the probability of occurrence of a pattern that is difficult to find is high with respect to other faults.

[0004]

According to a first aspect of the present invention, there is provided an input setting unit for randomly setting an input value to an input bit string by several bits, and a concurrent failure simulation is performed based on the input value set in the input setting unit. A simulation unit to perform, an end determination unit that determines the end if no failure is found as a result of the simulation by the simulation unit, and changes an input value set up to now when the end determination unit determines that the end is not to be ended. An input setting updating unit, an input bit fixing unit that makes it impossible to change an input bit string set so far when the fault is found, and an instruction to the input setting unit to add an input to another unset input bit string. An input addition instruction unit is provided.

According to a second aspect of the present invention, a concurrent failure simulation is performed for each operation unit by the simulation unit, and a normal output result of the simulation is different from an output result at the time of the failure list operation, and a value at the time of the failure list operation is calculated. Is 'undefined', a D frontier recognizing unit that recognizes that there is an 'undefined' input in the operation unit, and receives a D frontier existence notification notified from the D frontier recognizing unit, and receives the D frontier presence notification in the direction of the input bit string to the operation unit. A node setting request unit for requesting to set a value to be set, and a setting request issued from the node setting request unit is propagated to all preceding operation units connected to the 'undefined' input of the operation unit. A multiple back propagation unit, and a request value propagated by the multiple back propagation unit and reaching the input bit sequence is set in the input bit sequence. Provided with the required setting unit.

[0006]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

FIG. 1 is a block diagram of an embodiment of the first invention. An input setting unit 1 for randomly setting an input value to an input bit string several bits at a time, and an input value set in the input setting unit 1. The simulation unit 2 that performs a concurrent failure simulation from the input value, and if no failure is found as a result of the simulation performed by the simulation unit 2, the termination determination unit 3 that determines the termination and the termination determination unit 3 determines that the termination is not performed. Input setting updating unit 4 that changes the input value set up to now (hereinafter referred to as backtracking).
And an input bit fixing unit 5 that makes it impossible to change the input bit string set so far when a failure is found, and an input addition instruction that instructs the input setting unit 1 to add an input to another unset input bit string. The input unit 6 is configured by an input bit string 7 whose value is set by the input setting unit 1, whose set value is fixed by the input bit fixing unit 5, and whose set value is updated by the input setting update unit 4.

An operation example of the present invention will be described with reference to FIG. 1 and a flowchart of FIG.

1. The input setting unit 1 determines whether or not input setting is possible (101). Since setting is possible at the start, the input setting unit 1 randomly determines an input value in the input bit string 7 (102), sets and notifies the simulation unit 2 of the input value. (103). 2. When the input setting unit 1 has already set the input to all of the input bit strings 7 and cannot set the input (10
1) Registering the current input bit sequence as a test input sequence, initializing the input bit sequence 7 (104), randomly determining the input value in the input bit sequence 7 (102), setting and notifying the simulation unit 2 Yes (103).

[0010] 3. After being notified, the simulation unit 2 performs a concurrent failure simulation using the input bit string 7 as an input.

4. After the simulation is performed, the end determination unit 3 notifies the input bit fixing unit 5 if there is a detection failure. If there is no detection failure and the designated detection rate has not been reached, the input setting updating unit 4 is notified to perform backtracking. If the specified detection rate has been reached, the execution ends.

5. The input bit fixing unit 5 fixes the input set value of the input bit currently set in the input bit string 7 when notified from the end determination unit, so that the update by the input setting update unit 4 becomes impossible. After that, the input addition instructing unit 6 is notified.

6. The input addition instructing unit 6 includes the input setting unit 1
To set the addition to input bits that have not yet been set.

7. When notified by the end determination unit, the input setting update unit 4 changes the input set value of the input bit currently set in the input bit string 7, and
Notify.

FIG. 3 is a block diagram of one embodiment of the second invention. An input setting unit 1 for setting an input value to an input bit string several bits at a time by a random or notified request value;
A simulation unit 2 for performing a concurrent failure simulation based on the input value set in the input setting unit 1, a termination determination unit 3 for determining termination if no failure is found as a result of simulation by the simulation unit 2, and a termination determination The input setting updating unit 4 changes the input value set so far (hereinafter referred to as backtracking) when it is determined that the processing does not end in the unit 3, and the input bit string set so far cannot be changed when a failure is found , An input addition instructing unit 6 for instructing the input setting unit 1 to add an input to another unset input bit string, and an input bit fixing unit whose value is set by the input setting unit 1. 5, the input bit string 7 whose setting value is fixed and the setting value is updated by the input setting updating unit 4;
When the output value of the failure list of the operation unit is “undefined”, the D frontier recognizing unit 8 that recognizes that the operation unit has an “undefined” input, and the D frontier existence notification notified from the D frontier recognizing unit 8 In the direction of the input bit string (fan-in side), a node setting request unit 9 for requesting to set a value to be set in the operation unit, and a setting request issued from the node setting request unit 9 to the operation unit. 'Indefinite'
A multiplex backward propagation unit 10 that propagates to all preceding operation units connected to the input, and a request setting unit 11 that sets a request value that is propagated by the multiplex backward propagation unit 10 and reaches an input bit sequence in the input bit sequence. Be composed.

An operation example of the present invention will be described with reference to FIG. 3 and a flowchart of FIG.

1. The input setting unit 31 determines whether input setting is possible (101), and since it can be set at the start, checks whether there is a setting value requested by the request setting unit 11 (hereinafter referred to as a request value) (105). . Since there is no required value at the start, an input value is randomly determined in the input bit string 7 (102),
It is set and notified to the simulation unit 32 (103). 2. The input setting unit 31 can set an input to the input bit string 7 (101), and if there is a request value from the request setting unit 11 (105), the request value is determined as an input value (106) and set. The simulation unit 32 is notified (103). 3. If the input setting unit 31 has already set the input to all of the input bit strings 7 and cannot set the input (1
01), the current input bit sequence is registered as a test input sequence, and after initializing the input bit sequence (104), if there is a request value from the request setting unit 11 (105), the request value is determined as an input value ( 106) If there is no required value (105), an input value is randomly determined in the input bit string 7 (102), set and notified to the simulation unit 32 (103).

4. After being notified, the simulation unit 32 performs a concurrent failure simulation using the input bit string 7 as an input. At this time, the D frontier recognizing unit 8 is operated after the operation for each operation unit is completed.

5. The D frontier recognizing unit 8 checks whether or not a failure list has been generated in the operation unit after the completion of the concurrent failure simulation operation for each operation unit, and whether the operation result of the failure list is “indeterminate”, and satisfies the condition. If so, the node setting request unit 9 is notified.

6. After the simulation is performed, the end determination unit 3 notifies the input bit fixing unit 5 if there is a detection failure. If there is no detection failure and the designated detection rate has not been reached, the input setting updating unit 4 is notified to perform backtracking. If the specified detection rate has been reached, the execution ends.

7. When notified from the end determination unit 3, the input bit fixing unit 5 fixes the input set value of the input bit currently set in the input bit string 7, and sets the input setting update unit 4.
So that updates by After that, the input addition instructing unit 6 is notified.

8. The input addition instructing unit 6 includes the input setting unit 3
Instructs to set an addition to an input bit that is not already set to 1.

9. When notified by the end determination unit, the input setting update unit 4 changes the input set value of the input bit currently set in the input bit string 7, and
Notify 2.

10. The node setting requesting unit 9 calculates what kind of input is the operation unit notified from the D frontier recognizing unit 8 and calculates whether the failure list output is not “undefined” and becomes an output in which a failure is found, and calculates an input value for that. The request is notified to the multiplex backward propagation unit 10 so as to be set in the operation unit.

[11] If the operation unit notified from the node setting request unit 9 is not the input bit string 7, the multiplex backward propagation unit 10 sets the input value to be set to the fan-in side for all inputs for which the notified operation unit setting request is issued. Request (called a request value). Thereafter, an input value (new required value) for outputting a required value for the fan-in side operation unit is calculated and requested to the fan-in side.

12. If there is a request value reaching the input bit string 7 in the multiplex backward propagation section 10, the request setting section 11 is notified.

13. If there is a request value notified from the multiplex backward propagation unit 10, the request setting unit 11
When the value is added to the input bit string 7, the input setting unit 31 is notified to set the requested value to the requested bit position.

[0028]

As described above, the first aspect of the present invention determines input values for many faults, and thus has the effect of generating a high-quality pattern with a large number of faults to be found. Furthermore, the second invention has an effect that a high-quality pattern can be generated in a short time because many failures are set and input values at which each failure is found are determined and set. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the first invention.

FIG. 2 is an operation flowchart of the input setting unit 1 of the embodiment.

FIG. 3 is a block diagram showing one embodiment of the second invention.

FIG. 4 is an operation flowchart of the input setting unit 31 of the embodiment.

[Explanation of symbols]

 1, 31 input setting unit 2, 32 simulation unit 3 end determination unit 4 input setting updating unit 5 input bit fixing unit 6 input addition instructing unit 7 input bit sequence 8 D frontier recognition unit 9 node setting requesting unit 10 multiplex backward propagation unit 11 request Setting section

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G01R 31/28 G06F 11/25 G06F 17/50

Claims (2)

(57) [Claims] 1. An input setting unit for randomly setting an input value to an input bit string by several bits, a simulation unit for performing a concurrent failure simulation based on the input value set in the input setting unit, and a simulation by the simulation unit. An end determination unit that determines the end if no failure is found as a result, an input setting update unit that changes an input value set so far when the end determination unit determines that the failure is not completed, An input bit fixing unit that makes it impossible to change the input bit string set so far, and an input addition instruction unit that instructs the input setting unit to add an input to another unset input bit string. Automatic generation of test input sequence to be performed. 2. A concurrent failure simulation is performed for each operation unit by the simulation unit, and a normal output result of the simulation is different from an output result at the time of failure list operation, and a value at the time of the failure list operation is “undefined”.
Recognizes that there is an 'undefined' input in the operation unit
A frontier recognizing unit, a node setting requesting unit that receives a D frontier presence notification notified from the D frontier recognizing unit, and requests to set a value to be set in the operation unit in the direction of an input bit string; A multiple back propagation unit that propagates the setting request issued from the above to all preceding operation units connected to the 'undefined' input of the operation unit, and a request that has been further propagated by the multiple back propagation unit and has reached the input bit string. 2. The method according to claim 1, further comprising a request setting unit for setting a value in the input bit string.