JP2863593B2 - Semiconductor integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Regarding a semiconductor integrated circuit capable of performing an efficient burn-in test, a pull-up / pull-down circuit is added in a process of manufacturing the semiconductor integrated circuit so that an externally applied signal is not increased. Another object of the present invention is to provide a semiconductor integrated circuit capable of easily performing a burn-in test in a short time by connecting an internal circuit formed by semiconductor elements to an external terminal via an input circuit, an output circuit, and an input / output circuit. The input circuit, the output circuit, and the input / output circuit each include a semiconductor integrated circuit in which a pull-up circuit and a pull-down circuit are symmetrically connected, and control for controlling on / off of the pull-up circuit and the pull-down circuit. Provide a signal source.

[Industrial applications]

The present invention relates to a semiconductor integrated circuit capable of performing an efficient burn-in test.

In the case of a burn-in test of a semiconductor integrated circuit, in order to diversify signals applied to input / output terminals, various types of circuits for changing signal levels of the terminals are required. In order to improve efficiency, it has been demanded to simplify such a circuit and to enable various tests.

[Conventional technology]

Japanese Patent Application Laid-Open Nos. 63-61972 and 63-2 for performing burn-in tests on highly integrated and highly functional semiconductor integrated circuits.
The configuration described in Japanese Patent No. 60145 is known. That is, in a process of manufacturing a semiconductor integrated circuit, a bias voltage is applied to each terminal for a power supply and a terminal for a signal in an ambient temperature reaching 150 ° C. in order to remove an initial defect, thereby causing a bad environment for a semiconductor element. It is known to perform an inspection that can quickly detect a deteriorated object by causing a state change. FIG. 5 is an example showing a configuration of a semiconductor integrated circuit having a circuit for efficiently performing such a test. In FIG. 5, 1 is an internal logic circuit, 2 is a signal terminal for an input circuit, 3 is a signal terminal for an output circuit, 4 is a signal terminal for an input / output circuit, and 5, 6, and 7 are pull-up circuits formed of PMOS transistors. , 8 is a control signal terminal for a pull-up circuit, 9 is a DC power supply terminal for a pull-up circuit, 10, 11, and 12 are inverters, 13 is a tri-state element, 14 is an AND circuit, S1, S2
Indicates an input / output circuit control signal. Now, “H” is output from the internal logic circuit 1 as the input / output circuit control signal S1, and the “H” signal from the pull-up circuit control signal terminal 8 and the AND circuit 14 are output.
By performing the logical operation, an input / output circuit control signal S2 is obtained. Since the signal S2 controls the tristate element 13 to turn on, the state signal of the internal logic circuit 1 is output to the terminal 4. If the control signal S1 is "L", the tristate element 13 becomes "high impedance", and an external signal is applied to the terminal 4 as an input terminal to the internal logic circuit 1 for processing.

During the burn-in test, + V _DD is _supplied to the terminal 9 and a low-level “L” signal is _supplied to the terminal 8. Then pull-up circuit 5,
7 turns on. The control signal S2 becomes “L”, and the tristate element 13 becomes “high impedance”. Therefore, even if no external signal is applied to the terminals 2 and 4, the “L” signal from the terminal 8 is made “H” by the inverters 10 and 12 and applied to the internal logic circuit 1. Therefore, the applied signal is processed in the internal logic circuit 1 and output to the terminal 3. Next, when a low-level "L" signal is applied to the terminal 8, the pull-up circuits 5, 6, and 7 are turned on. At the time of the burn-in test, the pull-up circuits 5, 6, and 7 operate as load resistors of the inverters 10 to 12.

[Problems to be solved by the invention]

It is a conventional method to apply a waveform from the outside as a signal applied to the internal logic circuit at the time of the burn-in test. However, a signal source for the waveform from the outside and a connection means therefor are required. Processing cannot be performed only on a chip forming a semiconductor integrated circuit, and it is necessary to add a large number of devices on a substrate called a burn-in board. Therefore, the cost required for the burn-in test was high.

An object of the present invention is to improve the above-mentioned drawbacks, and to add a pull-up / pull-down circuit in the process of manufacturing a semiconductor integrated circuit, enabling a burn-in test to be easily and quickly performed without increasing externally applied signals. And a semiconductor integrated circuit.

[Means for solving the problem]

FIG. 1 is a diagram showing the principle configuration of the present invention. In FIG. 1, reference numeral 20 denotes an internal circuit formed of a semiconductor device,
23 is the external terminal of the chip, 24 is the input circuit, 25 is the output circuit,
26 denotes an input / output circuit, 24-1, 25-1, 26-1 denote pull-up circuits, 24-2, 25-2, 26-2 denote pull-down circuits, and 27 denotes a signal source of a control signal.

As shown in FIG. 1, pull-up circuits 24-1, 25-1, 26-
The control terminal 1 and the control terminals of the pull-down circuits 24-2, 25-2, 26-2 are connected to the control signal source 27 via wirings 27a to 27d.

In the semiconductor integrated circuit according to the present invention, the internal circuit 20 formed by a semiconductor element includes an input circuit 24, an output circuit 25, and an input / output circuit 26.
Are connected to external terminals 21 to 23 through the input circuit 24,
The output circuit 25 and the input / output circuit 26 have a pull-up circuit 24-1, 25-1, 26-1 and a pull-down circuit 24-2, 25-, respectively.
2, 26-2 are symmetrically connected semiconductor integrated circuits, wherein a control signal source 27 for controlling on / off of the pull-up circuit and the pull-down circuit is provided.

[Action]

Each pull-up circuit 24-1 ‥‥ and pull-down circuit 24-2
オ ン is normally controlled simultaneously by the signal from the control signal source 27. Therefore, the signal line potential is arbitrarily controlled by the operation of the pull-up circuit / pull-down circuit symmetrically connected to the signal line for the internal circuit 20. When operating the internal circuit 20 normally, the pull-up circuit and the pull-down circuit are simultaneously turned off. In the case of a burn-in test, it may be turned on or off individually.
Further, at the time of the burn-in test, a control signal whose level switches periodically as indicated by A and B in FIG.
-1,25-1,26-1 and pull-down circuit 24-2,25-2,26-
2, the pull-up circuits 24-1 and 25-
1, 26-1 and the pull-down circuits 24-2, 25-2, 26-2 are alternately turned on / off, so that the state of the internal circuit 20 can be changed and a complicated burn-in test can be performed efficiently. .

〔Example〕

As an embodiment of the present invention, a pull-up circuit
The case where the FET and the pull-down circuit are configured by N-channel FETs and a pulse waveform is applied to each FET from a control signal source will be described. Representative examples of the input circuit 24 and the like including the pull-up circuit 24-1 and the pull-down circuit 24-2 shown in FIG. 1 are shown in FIG. 2 as 2A, 2B, 2C and 2D. As shown in FIG. 2, when the control signals A and B and the signal (A · B) which is the operation result of the logical product thereof are applied to the respective circuits 2A, 2B, 2C and 2D, signals of various potentials are generated. It is output from each of the circuits 2A, 2B, 2C and 2D. Signals of these various potentials can be applied to signal lines connected to the internal circuit 20 shown in FIG. Setting both the control signals A and B to "L" causes a short circuit between the high potential side and the low potential side of the power supply connected to the pull-up circuit 24-1 and the pull-down circuit 24-2. Prohibiting and setting both to “H” means that the internal circuit is operating normally, not during the burn-in test.
Exclude it. Therefore, the case where the control signals A and B are "H" and "L" is a condition for the operation of the present invention.

2, the potential of the signal line to the internal circuit 20 as an output changes in the same phase as the control signal A in a frame 2A surrounded by a broken line. In the frame of 2B, the potential of the signal line to the circuit 20 also changes in the opposite phase to the control signal A. In the frame 2C, the potential is fixed to “L”, and in the frame 2D, the potential is fixed to “H”.

Next, FIG. 3 shows a pull-up circuit as an embodiment of the present invention.
FIG. 5 is a diagram illustrating that a pull-down circuit is alternately turned on and off. FIGS. 3A and 3B show control signals A and B shown in FIG. 2. FIGS. 3 and 3 show control signals A and B applied to the circuit in the frame shown in FIG. The output line potential of the circuit shown to the right of the middle is shown. FIG. 3 shows, from the left, a normal operation of the internal circuit, a burn-in DC test, and a burn-in AC test. That is, when operating normally, A is "H", B is "H",
, And have appropriate potentials. In the case of the burn-in DC test, A is "L" and B is "H", so the circuit is the same as the frame in FIG. 2B, and the output changes in the opposite phase to A. Is the same as the frame of the 2D circuit, the output is fixed at “H”. Is the same as that of 2A, so that the output changes in phase with A.

Therefore, the input / output circuit 31 and the input circuit 32 shown in FIG.
And the output circuit 33. In FIG. 4, arrows indicate the direction of the signal.

The input / output circuit 31 shown in FIG. 4 includes an input-side pull-up circuit and a pull-down circuit. Control signals A and B applied to these pull-up circuit and pull-down circuit generate signals that change in phase opposite to control signal A.
This signal goes to the left in FIG. 4, is inverted by the inverter, becomes in-phase with the control signal A, and is applied to the internal circuit.

In FIG. 4, an input signal of a terminal to which a signal is applied is input to an internal circuit via an input circuit 32 and an inverter.

In FIG. 4, the signal output from the internal circuit and the output signal from the pull-up circuit and the pull-down circuit of the output circuit 33 are superimposed on the terminal where the signal appears. Output signals from the pull-up circuit and the pull-down circuit of the output circuit 33 change in phase with the control signal A.

As described above, since the number of input signals at the time of the burn-in test can be reduced, the control signal obtained in the chip can be used as it is, or a control signal can be directly input from the outside. A signal obtained by a logical operation is simultaneously supplied to a pull-up circuit and a pull-down circuit, and a signal whose level on / off changes periodically can be supplied.

〔The invention's effect〕

Thus, according to the present invention, since the pull-up circuit and the pull-down circuit are symmetrically connected and used, the input signal at the time of the burn-in test can be reduced by appropriately controlling the ON / OFF of the circuit element. . Therefore, the test of the semiconductor integrated circuit can be easily performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing the principle configuration of the present invention, FIG. 2 is a diagram showing a circuit of an embodiment of the present invention, FIG. 3 is a diagram showing a circuit of another embodiment of the present invention, FIG. FIG. 5 is a diagram showing a semiconductor integrated circuit when a burn-in test is performed. 20 internal circuit 21-23 external terminal 24 input circuit 24-1 pull-up circuit 24-2 pull-down circuit 25 output circuit 26 input / output circuit 27 control signal source

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G01R 31/28-31/3193 H01L 21/66 H01L 21/822 H01L 27/04

Claims (1)

(57) [Claims] An internal circuit formed of a semiconductor element is connected to an external terminal via an input circuit, an output circuit, and an input / output circuit, and the input circuit, the output circuit, and the input / output circuit have a pull-up circuit and an input / output circuit, respectively. A semiconductor integrated circuit to which a pull-down circuit is symmetrically connected, the semiconductor integrated circuit having a control signal source for controlling on / off of the pull-up circuit and the pull-down circuit.