JPS5855693B2 - Pulse generation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse generation circuit that outputs pulses in the same direction that are synchronized with the rise and fall of an input signal, respectively.

Conventionally, in order to obtain pulses that are synchronized with the rise and fall of an input signal, the input signal is passed through a differentiation circuit using a capacitor, etc. to obtain pulses with minute pulse widths that are synchronized with the rise and fall of the input signal, and then a double-wave rectifier is used to obtain pulses with the same pulse width. It was common to extract it as a directional pulse.

However, this conventional method requires a large capacity and is not suitable for semiconductor integration.

The present invention provides a pulse generation circuit suitable for semiconductor integration, which eliminates the drawbacks of the conventional circuit.

FIG. 1 shows an embodiment of the pulse generating circuit of the present invention.

Differentially connected transistors 1 and 2, DC level shifting transistors 3 and 4, and resistors 5 and 6 of approximately equal value.
The connection is made when either transistor 1 or 2 is conductive,
The other side is a flip-flop connection that is stable in the cutoff state.

Transistors 7 and 8 are differential amplifiers that provide triggers to the flip-flop circuit constituted by transistors 1 and 2, and an input signal source 9 is applied between their bases.

Therefore, the flip-flop circuit consists of transistors 7 and 8.
For example, if transistor 1 is conductive and transistor 2 is cut off and stable, the state is controlled by the collector current of transistor 8 by input signal source 9.
becomes conductive, and the collector current of transistor 8 flows through resistor 6, causing the base voltage of transistor 1 to drop. When the base voltage of transistor 1 becomes lower than the base voltage of transistor 2, transistor 1 is cut off.
Transistor 2 becomes conductive and the state of the flip-flop circuit is reversed.

In addition, since the collector currents of transistors 7 and 8 that invert the flip-flop circuit are controlled by the signal from the input signal source 9, the current source 10's current When you select the desired option, the signals of each part will become as shown in Figure 2.

Figure 2 A is the base voltage of transistor 7, the solid line B is the collector current of transistor 7, the broken line B is the converter current of transistor 8, the solid line C is the collector current of transistor 1, and the broken line C is the collector current of transistor 2. ,D
The solid line D is the collector voltage of transistor 7, and the broken line D is the collector voltage of transistor 8.

When the flip-flop circuit is inverted after the input signal passes through the average voltage, the collector voltages of transistors 7 and 8 become signals whose phase is delayed with respect to the input signal, as shown in the second diagram.

Therefore, the waveform of the output terminal 14 rectified using the transistors 11 and 13 can be a pulse synchronized with the rise and fall of the input signal as shown in E.

In addition, since the midpoint of the rise of the pulse amplitude is approximately synchronized with the average level of the input signal, if the operating point of the subsequent signal processing circuit is set approximately at the midpoint of the pulse amplitude, the input signal will be at the average level of the input signal. Can detect points that intersect.

This shows that when the human input signal is an FM signal, it is possible to output pulses related only to the input signal frequency regardless of amplitude fluctuations of the input signal.

As described above, the pulse generating circuit of the present invention is constructed without using capacitance or inductance elements, and is suitable for semiconductor integration.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the pulse generation circuit of the present invention,
FIG. 2 is an explanatory diagram of the operation of the same embodiment. 1. 2, 3, 4, 7, 8, 12, 13...transistor, 9...input signal source, 10, 11...
... Constant current source, 14 ... Output terminal.

Claims (1)

[Claims] 1. Connecting first and second load resistors to the collectors of the first and second transistors that are differentially connected, applying the collector output signal of the first transistor to the base of the second transistor, and applying the collector output signal of the first transistor to the base of the second transistor. A flip-flop circuit is configured by applying a collector output signal of the second transistor to the base of the first transistor, and a third and a third transistor are applied to the collectors of the first and second transistors constituting the flip-flop circuit, respectively. the collectors of four transistors are connected, the third and fourth transistors are differentially connected with a common emitter current source, an input signal is provided between the bases of the third and fourth transistors, and the common emitter setting the current value of the current source so that the flip-flop circuit is inverted after the input signal passes through an average potential;
A pulse generating circuit characterized in that two different output signals of the flip-flop circuit are supplied to a rectifier circuit to obtain pulses synchronized with rising and falling edges of an input signal.