JPS5929913B2 - Control circuit for vending machines - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic control circuit for a vending machine in which calculation of input amount, change calculation, control mechanism, etc. in a vending machine are configured by electronic circuits.

Most conventional automatic vending machine money counting and sales control mechanisms are mechanical, and the mechanical system has the following drawbacks.

In other words, the maximum set price is 200 yen, only a single price can be set, the mechanism is larger with the same function, automatic refund function, coin jam detection function, wide range control of sales signals depending on change status, etc. are mechanical. In other words, it is difficult or impossible to realize.

Even from a functional point of view, these drawbacks do not meet the demands of recent vending machine users, and it seems that there is a limit to how mechanical systems can meet future demands.

The present invention uses an electronic control circuit in place of the conventional mechanical money counting and vending control mechanism, thereby not only solving the drawbacks of the conventional mechanical money counting and vending control mechanism, but also providing a vending machine with new features. This constitutes a control electronic control circuit.

Therefore, an object of the present invention is to easily enable multiple price setting and to provide an automatic refund mechanism that automatically refunds the entire amount of money inserted when a coin is inserted that cannot be sold.

According to the present invention, the above object is to provide a price setting means that can set a plurality of prices, and a setting that allows selling according to the presence or absence of change by comparing each of the plurality of prices set in the means with the input amount. In a control circuit for a vending machine, the control circuit has means for sending a sell enable signal for each price, and the input amount is equal to or higher than all set prices, and the sell enable signal is generated for each set price. This is accomplished by providing means for generating an automatic refund signal for automatically returning the deposited amount when the deposit is not completed.

Embodiments of the present invention will be described below with reference to the drawings.

In addition, in the example, YIO is used as currency. ¥50.
Consider a case using various Y100 coins.

FIG. 1 shows a block diagram illustrating the operation of a device according to the invention.

In the figure, 1 is the encoder, 2 is the adder/subtractor, 3 is the shift register for total payout, 4 is the Y50 number register, 5 is the ¥100 number register, 6 is the change amount and Y2
≧50 comparator to compare with O, 7 is a P that adds Y2O to the product setting price P1, +90 addition circuit, 8 is a P that adds Y5O to the product setting price P, +50 addition circuit, 9
is a P2+90 addition circuit that adds Y2O to the product setting price P2, and 10 is a P2+5 addition circuit that adds Y2O to the product setting price P2.
0 addition circuit; 11 is a comparator for product setting price B1 that compares the input amount with Pl, P, +50, and B1+90; 12 is a comparator for product setting price B2 that compares the input amount with B2 and B2+50 and B2+90; P1 price setting circuit for setting the product setting price P, 14 is P for setting the product setting price P2
2 price setting circuit; 15 is a bend control circuit for P1 which controls the sale of a product with a set price P1 based on the output of the comparator 11 for B1; 16 is a bend control circuit for controlling the sale of a product with a set price P2 based on the output of the comparator 12 for B2; 17 is a coin payout control circuit, 18 is a coin jam detection circuit, 19 is a refund latch circuit, 20 is an automatic refund circuit, 21 is a select latch circuit, 22 is a CR
EM control circuit (described later), 23 is a two-phase lock pulse generation circuit, and 24 is a bit pulse generation circuit.

Also, A1 is a change YIO no change signal, A2 is a change Y2O no change signal, B is a coin payout signal, B2 is a Y50 coin payout signal, ■END1 is a P1 product sales ready signal, ■EN
D2 is the B2 product sales ready signal, PO8 is the coin payout confirmation signal, PO is the manual refund input, 5EL1 is the product selection input with the product set price P1, 5EL2 is the product set price P
2, t1 to t indicate the selection input of the product, Bit Nojirus, ESC/ACC, and ESC-RTRN indicate the ¥100 coin collection signal and refund signal in the escrow.

Terminals 1 to 2 and T correspond to those in FIG.

In the example, the amount is 1" in decimal notation YIO
It is expressed as a 6-bit pure binary number.

yio the coin used here. If Y2O, Yloo, yio is “ooooooi” and Y5O is oo
oioi'' and Y1O0 are respectively represented by the binary code 001010''.

Therefore, the maximum selling price when using 6 bits is 63
The maximum selling price can be increased by increasing the number of bits.

The operation of the electronic control circuit for a coin knock in a vending machine according to the present invention will be explained in detail based on the block diagram shown in FIG.

Each time YIO, Y2O, Yloo coins are inserted, the inserted coins are converted by the encoder 1 into a binary code representing the amount as described above, applied to the adder/subtractor 2, and stored in the shift register 3 for total payout. The total amount of input is added to the amount of input so far, and the total amount of input is stored in the shift register 3 for total payout.

The total payout shift register 3 is shifted by two-phase clock pulses.

At this time, the coins of Y1O0 are temporarily held in a space called escrow, and the coins of YIO and Y2O are automatically stored in their respective change cylinders.

Also ¥50. Each time a coin of 100 yen is inserted, the human pulse is sent to the 50 yen coin number register 4 and the 100 yen coin number register 5, and the respective inserted numbers are stored.

If a coin is jammed when inserting a coin, the coin jam detection circuit 18 detects the coin jam;
Coin return electromagnet (Coin) that returns inserted coins as is.
Return Electromagnet.

It has a function of sending the signal to the control circuit of CREM (hereinafter referred to as CREM) and preventing the insertion of coins.

Here, a coin jam is a state in which coins are jammed and a coin input signal is continuously output.

The product price is expressed in a 6-bit pure binary binary code in which 1'' in the decimal system represents Y1O.

In the present invention, by providing a P1 price setting circuit 13 and a P2 price setting circuit 14 for setting two product prices P1tP2 in one vending machine coin knock electronic control circuit, one vending machine coin knock electronic control circuit is provided. The electronic control circuit makes it possible to sell products with two different prices, and by installing a plurality of these vending machine coin knock electronic control circuits in one vending machine, a multi-price vending machine can be obtained. .

In this case P1. The value of P2 is P1tP in conventional equipment.
There are regulations that say that either one of 2 must be large, but in the present invention, P, >B2,
Any setting of P,=P2, Pl<B2 can be made.

Among the 6-bit pure binary binary codes set in the P1 price setting circuit 13 and the P2 price setting circuit 14, the binary code of P1 is P, +50, and the addition circuit 8 and P, +90.
In addition circuit 7, the binary code of B2 is applied to P2+50 addition circuit 10 and P2+90 addition circuit 9.

In addition, a bit pulse of t1+t3, ie, "000101" representing Y2O is applied from the bit pulse generating circuit 24 to the P1+50 adding circuit 8 and the P2+50 adding circuit 10, and addition of P1+50 and P2+50 is performed.

In addition to the P1+90 adder circuit 7 and the P2+90 adder circuit 9, 11+1. "OO1001" representing the bit pulse of Y2O is added, and addition of P1+90 and P2+90 is performed.

The bit pulse generation circuit 24 generates a two-phase clock pulse φ1.
．． It is composed of a shift register shifted by φ2, and generates bit pulses from t1 to t7 in a clock pulse period, of which the bit pulses from t1 to t6 are used to represent the amount of money.

The product setting price P1, P1+50, P, +90, the total input amount X stored in the total payout shift register 3 are input to the product setting price P1 comparator 11,
The product setting prices P2, P2+50, P2+90, and the total input amount X are respectively added to the product setting price P2 comparator 12, and the comparison result is the product setting price P1.
From the comparator 11, X=P1, x>pl, X>P1
+90, X=P1+50, X-P2 from comparator 12 for product setting price P2, X>P2+90, X=P2+5
You can get an output of 0.

The output from the comparator 11 for product setting price P1 is P,
The output from the product setting price P2 comparator 12 is applied to the P2 bend control circuit 16, respectively.

In addition, a change YIO missing signal A1 and a change Y2O missing signal A2 are added to the bend control circuits 15 and 16 for Pl and P2.

In the embodiment, the bend control circuits 15, 1 for Pl and P2
6 from Pl, P2 product sales enable signal VEND1. VEN
D2 is issued under the following conditions.

1) When X=P1orP2, ii) Pl<X≦P1+ 90 or P2<X
If ≦P2+90 and ¥10 change is available, ND X=P1+50 or X=P2+50
If there is Y50 change, in this way, with the conventional device, even if there is Y2O change, ¥
If there was no change of 10, sales that required change were not performed, but in the device of the embodiment, the product set price P1. The number P1+50, which is the sum of P2 and Y5O,
Y1 by comparing P2+50 with the total input amount X
Even if there is no change for O, there is change of ¥50, and the sale can be made when the change amount is Y2O.

When the customer selects either the product with the P1 price or the P2 price, an operation input 5EL1 is sent to the select latch circuit 21;
Or 5EL2 is sent and select latch circuit 2
1 determines whether to select the product with the product setting price P1 or the product with the product setting price P2, and select 5EL1 or 5.
A signal ESC-ACC for collecting Y1O0 coins temporarily stored in the escrow is sent to the escrow in response to an external sales signal T generated almost simultaneously with EL2.

Next, the output signal of the select latch circuit 21 is sent to the P1 price setting circuit 13 when 5EL1 is selected, and to the P2 price setting circuit 14 when 5EL2 is selected, depending on whether 5EL1 or 5EL2 is selected. .

The P0 price setting circuit 13 and the P2 price setting circuit 14 receive the output signal of the select latch circuit 21 and send a binary code representing the product setting price to the adder/subtractor 2.

In the adder/subtractor 2, the set price sent from the P1 price setting circuit 13 or the P2 price setting circuit 14 is subtracted from the input total amount X stored in the total payout shift register 3 at this time.

That is, subtraction of X-Pl or X-P2 is performed, and the subtraction result K is stored in the total payout shift register 3 as the change amount.

This stored content K indicates the amount of change.

That is, the total payout shift register 3 functions as a change register.

The stored contents of the total payout shift register 3 are sent to a comparator 6 to determine whether the change amount K is larger than Y2O.

K≧50 Comparator 6 receives t1+ as Y5O signal
The bit pulse of t3 is P1+50 addition circuit 8 and P2
It is added in the same way as the +50 adder circuit 10.

K≧50 The output signal of the comparator is sent to the coin payout control circuit 17.

The coin payout control circuit 17 also receives as input a signal A2 indicating ¥50 no change, an output signal representing the amount of change K and Y50 stored in the total payout shift register 3, the number of coins inserted into the number register 4, and coin payout confirmation. Signal PO8 is added.

Coin payout signal B in coin payout control circuit 17
1. Change payout using the Y50 coin payout signal B2 is performed as follows.

i) If K<Y2O...Pay out ¥10 x n pieces n<5) ii) If K>Y5O and there is Y50 change...
・Pay out ¥50 x 1 piece, ¥10 x n pieces n<5)i
ii) If K>Y5O and there is no change for ¥50...
Payout in ¥10 x n pieces 10>n>O) In the example, when a coin is inserted, the change is Y9
Since only products with a value of 0 or less can be sold, the amount of change must be Y90 or less.

This means that the output signals from the P1 comparator 11 and the P2 comparator 12 are X>P1+90, X>P290,
This can be done by controlling the VENDo and VEND2 signals from the P1 bend control circuit 15 and the P2 bend control circuit 16 using 0.

Each time a coin is paid out, the coin payout control circuit 17 receives a coin payout confirmation signal PO8 and sends a binary code representing the payout amount to the adder/subtractor 2, and pays out the change amount K stored in the total payout shift register 3. Have the child subtract the change.

Then, when the change amount K stored in the total payout shift register 3 reaches 0'', the payout of change is stopped.

However, if the amount of change is larger than Y2O, the output signal of the K>50 comparator 6 causes the ¥50 change to be paid out first and the remainder to be paid out in YIO.

When performing a manual refund, a manual refund manual PO is added to the refund latch circuit 19, and if there is no selection signal within a certain period of time, a full refund will be made.

Y1O0 will be paid out from the escrow that was temporarily held,
Subtraction is performed from the total input amount X by the adder/subtractor 2 and the shift register 3 for total payout until the contents of the Y100 coin count register 5, which stores the input number of Y1O0 coins, becomes 0''.

Similarly, the adder/subtractor 2 and the total payout shift register 3 subtract from the input amount X until the number of input coins stored in the ¥50 coin count register 4 becomes 0''.

In this case, the output signals of the Y50 number register 4 and the ¥100 number register 5 are converted into binary codes representing the respective amounts via the encoder 1 as shown in the block diagram of FIG. 2 performs subtraction.

¥50. After the ¥100 is refunded, Y1O is refunded until the remaining memory contents of the total payout shift register 3 become "0".

The refund ends when the stored content of the total payout shift register 3 becomes 0''.

In the present invention, if the input amount X is larger than the maximum product setting price and not all sales output is generated, the automatic refund control circuit 20 determines and automatically sends a signal to the refund latch circuit 19 for a full refund. have them do it.

At this time, the refund latch circuit 19 sends out the ESC-RTRN signal, and the Y50 number register 4 and the ¥10
Sends a signal to the 0 sheet count register 5.

Further, if a coin is jammed, a sale signal is issued, or a refund is being made, the CREM control circuit 22 outputs a signal CREM to prevent coin insertion.

The operation of the control circuit of the present invention based on the block diagram of FIG. 1 as described above will be more clearly illustrated by the explanation of the embodiment of the block diagram of FIG. 1 shown in FIGS. 2 and 3.

FIGS. 2 and 3 are circuits showing an embodiment for performing the operation of the block diagram of the present invention shown in FIG. 1. FIG.

The present invention will be explained in detail based on FIGS. 1, 2, and 3.

In FIGS. 2 and 3, the signals from [Yes] to ■ are signals within the electronic control circuit for the coin knock of the vending machine according to the present invention, and the other signals are from devices of the vending machine other than this electronic control circuit. Either it is sent to the electronic control circuit, or it is sent from the electronic control unit to other vending machine devices.

The circuit illustrating the embodiment of the encoder 1 in FIG.
In the figure, AND circuits 25 to 27, 37, OR circuit 28
31, 38, NAND circuits 32 to 35, an inverter circuit 36, a 4L cycle timer 39, and a wired OR circuit WO4.

Initially, the symbol ■ indicating that the electronic control circuit for the coin knock of the vending machine according to the present invention is in operation is 0'', so the AND ranges 25 to 27 are determined by the inverter range 41.
Since 1" is added, coin input ¥10.Y50.
If Y100 is present, AND circuit 2
Output ``1 u'' occurs at 5-27, and its output e+ 111
is applied to the OR circuits 28-30, and the OR circuits 28-30 produce an output "1" which is the same as the output of the AND circuits 25-27.

In addition, the NAND circuit 32 has a bit pulse of tl, NAND
+2 bit pulse in D circuit 33, NAND circuit 34
A +3 bit pulse is applied to the NAND circuit 35, and a +4 bit pulse is applied to the NAND circuit 35 from the shift register SR1.

The shift register SR1 is shown as the bit pulse generation circuit 24 in the block diagram of FIG. 1, and is a two-phase dynamic shift register, which generates two-phase clock pulses φ1. The bit pulses are shifted by φ2 to generate bit pulses from t1 to t7.

The outputs of the OR circuits 29-31 are applied to the NAND circuits 32-35 in addition to the bit pulses t1-t4.

By doing this, if there is a YIO coin input, this input will be converted to NAN via the OR circuits 28 and 31.
Since it is applied to the D circuit 32, the output of the NAND circuit 32 is synchronized with the bit pulse of tl, so it is expressed as 111110'' in a 6-bit binary number, and it is inverted by the inverter circuit 36 via the wired OR circuit WO1 and becomes '000.
001'' and 1'' is expressed as YIO, it is possible to obtain a binary code indicating YIO in pure binary system.

Similarly, Y5O coin input is NAND circuit 32.3
4 and synchronized with the bit pulses from t1 to t3, the output of the inverter circuit 36 is '000101', that is, Y
A binary code indicating 5O appears.

Also, the coin input of Y1O0 is added to the NAND circuit 33.35, +2. In synchronization with the +4 bit pulse, the output of the inverter circuit 36 is 'ooioio'', that is, Y1O.
A binary code indicating 0 appears.

The output of the inverter circuit 36 is applied to an AND circuit 37, but a signal from a cycle timer 39 is also applied to the AND circuit 37.

The outputs of the OR circuits 28 to 30 are output to the cycle timer 39.
It is applied via the R circuit 38.

That is, the cycle timer 39 functions to send an output "1" to the AND circuit 37 for a certain period of time when any one of yio, Y5O, and Y1O0 coins is input.

The fixed time is generally one cycle time of bit pulses from t1 to t7.

Therefore, the output of the AND circuit 37 is only for one cycle time from t1 to t7, that is, the pulse representing the coin input of YIO, Y2O, and Yloo is output from the output terminal of the circuit 37 of M only once. No double calculation will occur.

A pulse representing the input amount from the AND circuit 37 is sent to the adder/subtractor 2 as shown in the block diagram of FIG.

The adder/subtractor 2 and total payout shift register 3 shown in the block diagram of FIG. 1 are made up of the parts shown in FIG. 2, including an OR circuit 44, an adder/subtractor ADD, a shift register SR2, and an OR circuit 46. .

The adder/subtractor ADD is a pure binary adder/subtractor (
Regarding the internal detailed circuit, if necessary, for example,
August 15, 2015, “Calculator Technology Textbook” published by U Geo Gijutsu Co.
Please refer to Figures 5 and 8 on page 176 of "Basic Edition."

), and for the output from shift register SR2,
This type adds or subtracts the binary code signals given through the OR circuit 44 and stores the result in the shift register SR2, but it may also be a type that performs subtraction by taking the complement. Well-known adders and subtracters can be used in any case.

By doing this, when there is a coin input in the adder/subtractor ADD, the impark circuit 43 outputs "0".
'' is added, the mode becomes addition mode, and the pulse representing the input amount from the AND circuit 37 is sent to the adder/subtracter ADD.
and stored in shift register SR2.

Shift register SR2 is a two-phase dynamic shift register shifted by two-phase clock pulses.

Pl, P2 price setting circuit 1 in the block diagram of Fig. 1
3 and 14 are PRICE1 in FIG.

Each terminal of PRICE2 and NAND circuit 83~94°98.99, wired OR circuit WO2~WO1,2,
It is implemented by inverter circuits 96,97.

Among the terminals of PRICE1 and PRICE2, the terminals connected to the NAND circuit 83.89 are connected to the NAND circuit 83.89.
89 is connected so that the bit pulse of tl is applied, so it has a weight of N 1 +1, and the terminals connected to the NAND circuits 84 and 90 in the same manner are 2.
The terminals connected to the NAND circuits 85 and 91 have a weight of 4 degrees, and the terminals connected to the NAND circuits 85 and 91 have a weight of
The terminal connected to 92 has a weight of '8'' and is connected to NAN
The terminals connected to the D circuits 87 and 93 have a weight of '16'', and the terminals connected to the NAND circuits 88 and 94 have a weight of I+32 ffl.
By giving a signal to any of the terminals of CEl, NA
The outputs of ND circuits 83 to 88 are wired OR circuit W02
~Since it is connected to the impark circuit 96 via WO6, the output of the inverter circuit 96 is connected to the NAND circuits 83 to 8.
8, and a 6-bit binary code representing the product setting price P1 can be obtained as the output of the inverter circuit 96.

Similarly, the product setting price P2 can also be set by applying a signal to any of the terminals of PRICE2.

Product setting price P1 obtained in this way. Of P2, Pl is connected to P, +50 addition circuit 7, P1+90 addition circuit 8, and P2 is connected to P2+
The signals are sent to a P2+90 adder circuit 9 and a P2+90 adder circuit 10, respectively.

In FIG. 2, the portion consisting of the full adder FA1, the AND circuit 49, and the flip-flop circuit FF1 is the P1+90 adder circuit 7, and the portion consisting of the full adder FA2, the AND circuit 50, and the flip-flop circuit FF2 is the P2+90 adder circuit 9. Yes, there is a partial force tap □+50 addition circuit 8 consisting of a full adder FA3, an AND circuit 51, and a flip-flop circuit FF3, and a full adder FA4. The portion consisting of the AND circuit 52 and the flip-flop circuit FF4 is the P2+50 addition circuit 10.

Full adders FA1 and FA2 include a two-phase shift register S.
Of the bit pulses t to t7 produced by R1, t
The bit pulses of l and t4 are connected to be applied as the output of the OR circuit 81, so that the binary number "001001" representing 90 is added to the full adders FA1 and FA2, and the bit pulses from the full adders FA1 and FA2 are applied. is P1+90
Alternatively, an output of P2+90 can be obtained.

Further, in the full adders FA3 and FA4, Y
By applying the binary number "000101" representing 2O, we can obtain P1+50 and P2+50 as its output.

The comparator 11 for P1 in the black diagram of FIG. 1 is the comparator COMP2 to COMP5 in FIG.
' The comparator 12 for P2 is the comparator COM.
This part is composed of P6 to COMP9.

A 6-bit binary code representing the total amount of inserted coins X>Pl
The signal ■ is obtained.

The total amount of coins inserted into the comparator COMP3 is set to 2
From the 6-bit binary code expressed in decimal notation and the full adder FA1 mentioned earlier, P1+90 is expressed in pure binary 6
A bit binary code is applied, and as a result of the comparison, a signal (2) with X>P1+90 is obtained.

The same input as comparator COMP2 is applied to comparator COMP4, and the comparison result is X=P
1 signal ■ is obtained.

The total amount of coins inserted into the comparator COMP5 is set to 2
A 6-bit binary code expressed in decimal notation and a 6-bit binary code in which P1+50 is expressed as 1 in pure binary notation from the aforementioned full adder FA3 are applied, and the comparison result is X= A signal (■) of P1+50 is obtained.

For the product setting price P2, in the same way as for the product setting price P1, the signal ■ of X>P2 is sent from the comparator COMP6, and the signal ■ of X>P2+90 is sent from the comparator COMP7.
A signal (2) with X=P2 is obtained from the comparator COMP8, and a signal (2) with X=P2+50 is obtained from the comparator COMP9.

As described later, sales and change disbursements are controlled using the comparison results obtained by comparing the input amount with several amounts based on the product's set price.

The output signals of the comparators COMP2 to COMP shown in FIG. 2: ■X>Pl, ■X>P□+90. ■X=P1.
■X=P1+50. ■X>P2. ■X>P2+90. ■
X=P2゜■X=P2+50. is N as shown in Figure 3.
AN Lang Road 100.101. AND circuits 102, 106,
108°OR circuit 105, 107. Inverter circuit 10
9°110, NOR circuit 118. P1 bend control circuit consisting of flip-flop circuit FF1□ or NA
NDAND circuit 1112, AND circuit 113°116.
119, OR circuit 114.117, inverter circuit 11
5, 110, a NOR circuit 118, and a flip-flop circuit FF13.

Considering a product with set price P□, X=P1
At this time, the signal (2) with X=P1 is applied to the OR circuit 105, and the output of the OR circuit 105 becomes one input of the AND circuit 106.

The other input of the AND circuit 106 is the output of the OR circuit 82, that is, the signal ``P1=0'' is added, so when the product setting price P0 is not 0, ``1'' is added, so the signal ``X=P1'' is added. If this occurs, the OR circuit 10
7 is added to one of the two input terminals of the AND circuit 108.

The other input terminal of the AND circuit 108 is the NOR circuit 118
is connected to the output terminal of

The two input terminals of the NOR circuit 118 are wired AN
Signals from D circuit WA3 and flip-flop circuit FF1□ are sent.

The flip-flop circuit FF1□ is used when a customer selects a product using a push button, etc., as described below.
Since it is in a reset state until L2 and the SEL signal e indicating that the product has been sold or the refund signal ■ which occurs a little later than that occurs, the inputs from the flip-flop circuits FF and 1 to the NOR circuit 118 are 0''. It is.

The wired AND circuit WA3 has as inputs the output of the flip-flop circuit FF1° inverted by the inverter circuit 149, the output of the flip-flop circuit FF,8 inverted by the inverter circuit 147, and the NAND circuit 1.
56 outputs are added.

When there is no refund manual PO, flip-flop circuit FF
15 is not set, the output of the inverter circuit 149 is 1'', and when the sales signal T is p1, the flip-flop circuit FF18 is not set, so the output of the inverter circuit 14γ is 1''.

The output of the flip-flop circuit FF17 and a signal 5ING are applied to the NAND circuit 156 as inputs.

5ING has two product price setting circuits in the embodiment, so when only one product price setting circuit is used, the price setting number selection signal 5ING is n□n.
, if two product pricing circuits are used, add '1'' and so on.

Regardless of the state of the 5ING signal, when there is no sales signal T, the output of the NAND circuit 156 is 61''.

Therefore, when there is no manual power PO to refund the sales signal T1, the output of the wired AND circuit WA3 is 1'', and this output is inverted by the inverter circuit 160 to the NOR circuit 118.
Add ′θ″ as input.

Therefore, if there is no sales signal T1 refund manual PO, NO
The output of the R circuit 118 is "1", and when the output of the OR circuit 107 becomes "1", the flip-flop circuit FF1
□ is set to generate a signal ■END1 indicating that the product with the P1 price can be selected, allowing the customer to select the product with the P1 price.

The product with the product setting price P2 is exactly the same as the product with the product setting price P1, and the OR circuit 95
This is performed based on the signal 2=0, and a signal VEND2 can be obtained from the flip-flop circuit FF13.

Based on this VENDl and ■END2, a display is displayed on the vending machine indicating that the customer can select a product with a set price of P1 or P2, and when the customer selects either, a signal of 5EL1 or 5EL2 is sent as a sales signal. It is sent together with T to the automatic vending machine coin knock electronic control circuit device according to the present invention.

That is, the sales signal T is a signal that the product has been sold.

Furthermore, when a coin is inserted that causes the signal ■ of X>Pl, the signal of X>Pl (i-! is added to the AND circuit 102, and as the other input of the The signal ■ is inverted by the NOT circuit 109, and the Y50 no change signal A2 is sent to the NOT circuit 1.
10 and the signal of X=P1+50 as N
In addition to the AND circuit 100, its output is added to the NAND circuit 101 together with the yio no change signal A1 to obtain N.
By adding the output of the AND circuit 101,
>Pl and X≦P1+90 and if there is YIO change, the AND circuit 102 generates an output ""1", and by adding that output to the OR circuit 105, the above-mentioned X=P□
The VENDl signal is obtained in the same manner as in the case of .

Also, when X = P1 + 50, there was no change for yio and it was ¥50.
If there is change, the NAND circuit 100 has 1'"
Since "1" is added to "1", the output is "0", and the output nOu is added to the NAND circuit 101 along with "1" indicating ¥10 without change, so the NAND circuit 10
The output of 1 is '1'', and X=P1+50 satisfies X>Pl and X≦P1+90, so AND circuit 1
Since the inputs of 02 are all 1'', the VENDl signal can be obtained in the same way as in the case of X>Pl described above.

Regarding the product setting price P2, X>P2. X=P2+50
In this case, the output of ■END2 can be obtained by thinking in exactly the same way as for the product setting price P1.

When the sales signal T is generated, the following occurs in the device of the embodiment.

The sales signal T is added as an input to an OR circuit 154, and O
The output of R circuit 154 is applied to AND circuit 155.

The AND circuit 155 also receives as input the output of a NOR circuit 159 which receives the outputs of the flip-flop circuits FF16 and FF1°.

Flip-flop circuit FF1. When the sales signal T is generated, the output of is +101? , and the output of the flip-flop circuit FF1□ is the flip-flop circuit FF1□.
When the output of 18 is "0", it remains "0" (7), so the output of the NOR circuit 159 is "1", and therefore, the output "1" is generated in the OR circuit 154, so that the flip-flop circuit FF1□ is set.

This output is delayed by 100m5 by the delay circuit Delay and is applied to the AND circuit 158 as the output of the OR circuit 151.

Since "1" is added to the AND circuit 158 from the aforementioned NOR circuit 159 as another input, the OR circuit 157
The flip-flop circuit FF18 is set by the generation of "1P" as the output.

The receipt signal ESC- of the Y1O0 coin held in the escrow is generated by the output of the flip-flop circuit FF18.
Generate ACC.

Furthermore, the output “1” of the flip-flop circuit FF18 is AN
to the D circuit 131 together with the signal of 5EL1, or
It is applied to the D circuit 132 together with the signal of 5EL2.

Since the signal 5EL1°SEI is generated almost simultaneously with the sales signal T, the flip-flop circuit FF18
When the output "1" occurs, it is already 5EL1 or 5E.
Either L2 is added to AND circuit 131 or 132.

Therefore, at the same time that the output "1" of the flip-flop circuit FF□8 is generated, the output "01" is generated from the AND circuit 131 or 132.
'' occurs, and the output of the AND circuit 131 is the output of the AND circuit 141.
The inverter circuit 161 and the wired OR circuit W014 are directly connected to one of the two input terminals of the
v It is applied via the WO 15, the inverter circuit 143, and the cycle timer 163.

By applying the signal to the AND circuit 141 via the cycle timer 163, the output of the AND circuit 141 is generated only once at a bit pulse type interval of 1 to t.

Similarly, the output of the AND circuit 132 is output from the AND circuit 142.
Connect the NOT circuit 162 directly to one of the two input terminals, and the wired OR circuit WO□5, NO to the other terminal.
Since the bit pulses are applied via the T circuit 143 and the cycle timer 163, the output of the AND circuit 142 is the bit pulse t1 to t.
Occurs only once every 7.

Assuming that the output of the AND circuit 141 is the 5EL1 signal ■, and the output of the AND circuit 142 is the 5EL2 signal ■, the 5EL1 signal ■ is applied to the NAND circuit 98 in FIG.

The NAND circuit 98 also has an inverter circuit 9 as an input.
Since the binary code representing the product setting price P1 is derived from 6, the 5EL1 signal ■ is added, and the binary code representing the product setting price P1 is wired OR.
Circuit WO□2. Inverter circuit 79. It is applied to the adder/subtractor ADD via the OR circuit 44.

That is, since the 5EL1 signal (2) is generated only once in the interval from t1 to t7, the output of the OR circuit 44 is a binary code representing the product setting price P1 only once.

The adder/subtracter ADD has an inverter circuit 43 as another input.
When there is no coin input signal ■, "1" is added, so the subtraction mode is entered, and the adder/subtractor ADD subtracts the product setting price P1 from the total input amount X, and the change amount K is stored in the shift register SR2. Ru.

The same is true for the product setting price P2, and 5E
The L2 signal ■ is applied to the NAND circuit 99, and the rest is carried out in the same way as for the product setting price P1.

These change amounts are calculated using the cycle timer 16 in FIG.
3, and when the output of the cycle timer 163 disappears, the output of the inverter 140 becomes 1''.

Since the AND circuit 133 is supplied with the output of the inverter 140, the SEL signal ■ which is already at N191, and the signal ■ which becomes "1" when the contents of the shift register SR2 are not 0, the cycle timer 163 If the contents of the shift register SR2 (i.e., the amount of change) are not O when the output disappears, the AND circuit 133 outputs an output of O.
A coin payout signal B1 is issued via the R circuit 134 to start the change payout operation.

Next, the mechanism for dispensing change will be explained.

The stored contents of the shift register SR2 representing the change amount K obtained by subtracting the product setting price P1 or P2 from the input amount X are sent to the comparator COMP1, where ≧50 comparator 6 is shown in FIG. 1, and compared with Y2O.

The comparator COMPl:r) output is added to the AND circuit 17, but the AND circuit 77 has another input of ¥5
The 0 no change signal A2 inverted by the inverter circuit 78 and the SEL signal e which is the output signal of the flip-flop circuit FF□8 are added.

Therefore, if there is a change coin of Y2O and a product with a change amount of Y50 or more is sold, the output of the AND circuit 77 will be 1.
'' occurs, and the Y50 change payout signal B2 is generated as an output of the OR circuit 76, and Y2O change is paid out using this and the aforementioned coin payout signal B1.

The output of the OR circuit 76 is added to the AND circuit 74,
The D circuit 74 receives a change payout confirmation signal PO as another input.
8 is added, and when Y5O change is paid out, an output "'1" is generated in the AND circuit 74, and this output is O
It is added to the R circuit 29 and converted into a binary code representing Y2O in the same way as when inserting a coin, and then sent to the adder/subtractor ADD.
However, at this time, the output of the inverter circuit 43, which is the other input of the adder/subtractor ADD, is added to the AND circuits 25 to 25.
Since the output of 27 is 0'', it is 1'', and therefore the adder/subtractor ADD is in the subtraction mode, so that Y2O is subtracted from the change amount.

When the change amount K becomes smaller than Y2O, the output of the AND circuit 77 becomes 0'', so that ``1'' is added to the AND circuit 73 via the OR circuit 76 and the inverter circuit 75.

The same change payout confirmation signal PO8 as the AND circuit 74 is added to the AND circuit 73;
Like the D circuit 74, every time change is dispensed, the output signal tlljl is sent to the OR circuit 28 to subtract Y1O from the change amount K.

To pay out the change for YIO, if the change amount K stored in the shift register SR2 still remains after subtracting the change for Y2O, the OR circuit 46 sends the change to the shift register SR.
Since the signal ■ indicating that the memory contents remain in 2 continues to be generated, the AND circuit 133 and the OR circuit 134 continue to output the coin payout signal B1, and this and the ¥50 coin payout signal B2 have disappeared. This is done depending on the conditions.

These are known techniques, and generally signal B is applied to the change dispenser motor, and signal B1 is applied to Y5O.

Provided to YIO switching solenoid.

Because Y50 change payout has priority over ¥10 change payout,
It becomes possible to pay out the minimum number of change.

Next, consider the case of refund.

First, we will discuss the case of manual refund.

The coin input signal ■ generated from the OR circuit 40 is the OR circuit 1
20 and the output of the OR circuit 120 is added to the AND circuit 12.
Added to 1.

The AND circuit 121 also has a NOR circuit 122 as an input.
The output of is added.

The sales signal T and SEL signal O are connected to the NOR circuit 122.
Since the R circuit 148 and the output of the inverter circuit 150 obtained via the inverter circuit 150 are added, when there is no sales signal T, the output of the NOR circuit 122 is u.
1 +1, so when there is a coin input signal ■, the output of the AND circuit 121 becomes .degree.1", and the flip-flop circuit FF14 is set.

The output of flip-flop circuit FF14 is manual refund P.
It is added to the AND circuit 123 along with O.

Therefore, when refund manual PO occurs, it is output to AND circuit 123? +111 is generated, and A is passed through the NOR circuit 124.
It is added to the ND circuit 125.

Since the AND circuit 125 has the input of the NOR circuit 126 to which the same input as the aforementioned NOR circuit 122 is added as another input, the output 21 of the OR circuit 124
is added, the output of the AND circuit 125 becomes "1".
'', and the flip-flop circuit FF15 is set.

Flip-flop circuit FF1. The output of is the delay circuit Del
ay2 is applied to the AND circuit 146 via the OR circuit 145.

Since the output of the above-mentioned NOR circuit 148 is added to the AND circuit 146 as an input, when the SEL signal e is not generated, 1'' is generated, so the AND circuit 14
Output n 1 to 6? 1 occurs, and the flip-flop circuit F
F16 is set and a refund signal ■ can be obtained.

By doing this, if the sales signal ■ occurs before adding the refund manual PO, the flip-flop circuit FF
14 is reset, so no refund signal is obtained, and even after the refund manual PO is applied, if the sales signal ■ or SEL signal is interrupted during the delay time of the delay circuit Delay2, the flip-flop circuit FF15 is reset. The sales signal T and the SEL signal e are given priority.

In addition, an automatic refund signal 1Tpo, which will be described later, is added to the terminal of the manual refund manual PO.

Automatic refunds will be made in the following cases:

That is, the output of the aforementioned flip-flop circuit FF1□ is connected to the wired AND circuit WA1 via the inverter circuit 127.
In addition, the output of the flip-flop circuit FF13 is connected to the wired AND circuit W via the inverter circuit 128.
In addition to A1, the output of wired AND circuit WA1 is
Add to D circuit 129.

In addition, the signal ■ of x>pl and the signal ■ of X-Pl are added to the OR circuit 103, the signal [present] of X>R2 and the signal ■ of The output of circuit 104 is added to wired AND circuit WA2, and the output of wired AND circuit WA2 is added to AND circuit 1.
Add to 29.

By doing this, wired AND circuit WA2
When inputting an amount greater than or equal to the maximum product price setting value, an output ``1'' occurs, and the output of the wired AND circuit WA is a flip-flop circuit flaF R1.
2. When the output of F R13 is not occurring, u I I
I is generated, and the AND circuit 129 generates an automatic refund signal ATP.
O is obtained.

That is, in this embodiment, even if coins are inserted to the maximum limit, the sales output ■END1. ■If END2 does not occur, a refund will be automatically made.

This automatic refund signal ATPO is added to the manual refund manual PO described above, and the refund signal (■) can be obtained in the same way.

The refund according to the present invention is performed in the following manner using the refund signal (2) obtained in this manner.

In the present invention, as shown in the block diagram of FIG.
0. For the insertion of 100 yen coins, a 50 yen coin count register 4 and a 100 yen coin count register 5 are provided to count the number of coins inserted.

In this embodiment, the Y50 sheet number register is R1 in FIG.
The ¥100 sheet number register is indicated by R2.

Registers R1 and R2 sequentially set the flip-flop circuit each time an input is applied.
1 can count the insertion of up to 15 Y2O coins, that is, 750 yen, and the register R2 can count the insertion of up to 8 coins (800 yen).

Y5 from the AND circuit 26 is input to the Y50 sheet number register R1.
The 0 coin input signal is being sent, and the Y50 coin input signal is also being sent to the AN along with the output of the cycle timer 39.
The output of the AND circuit 53 is applied to the OR circuit 54.

Cycle timer 3 every time there is a Y2O coin input signal
Since a signal is applied to the AND circuit 53 only during the bit pulse period from 9 to t1 to t7, the number of Y50 coins inserted is stored in the Y50 number register R1 by the output pulse signal of the OR circuit 54.

Similarly, the ¥100 coin input signal from the AND circuit 27 is added to the ¥100 coin number register R2.

Furthermore, the ¥100 coin input signal is input to the cycle timer 39.
Since the output of the AND circuit 64 is applied to the OR circuit 67, the output pulse of the OR circuit changes the ¥100 coin input signal to ¥10.
It is stored in the 0-sheet count register R2.

At the same time as the refund signal (2) is generated, a refund signal ESC/RTRN for the Y1O0 coins held in the escrow is issued, and the Y1O0 coins held in the escrow are refunded.

The Y50 number register R1 includes an OR circuit 58, an AND circuit 59, an inverter circuit 60, and a flip-flop circuit FF.
A circuit consisting of 6 is attached, and the flip-flop circuit FF6 is set at the same time as the Y50 coin input is added to the Y50 coin number register, and when the stored content of the Y50 coin number register becomes 0'', the flip-flop circuit FF6 is set.
is reset so that the stored contents of the Y50 sheet number register R1 can be determined based on the output of the flip-flop circuit FF6.

Similarly, the OR circuit 69 and A are connected to the ¥100 number register R2.
A circuit consisting of an ND circuit 70, an inverter circuit 72, and a flip-flop circuit FF7 is attached, and the contents of the ¥100 number register can be determined based on the output of the flip-flop circuit FF7.

When the refund signal ■ is generated, the refund signal ■ is applied to the AND circuit 66, and by adding the clock pulse φ3 as another input to the AND circuit 66, the AND circuit 66 can obtain an output synchronized with the clock pulse φ3.

OR circuit 7 whose inputs are the output of AND circuit 66, ¥100 number register R2, and flip-flop circuit FF7.
Since the output of 1 is added to the AND circuit 65, when the output of the flip-flop circuit FF7 is °1, that is, while the number of inserted coins of Y1O0 is stored in the ¥100 number register R2, the output of the flip-flop circuit FF7 is applied to the AND circuit 65. Output “1”
A pulse is given to the Y100 sheet number register R2 as the output of the OR circuit 67, and the memory of the Y100 sheet number register R2 is sequentially moved toward the output end.

When a signal is output from the output terminal of the ¥100 sheet count register R2, that signal is added to the AND circuit 68 along with the output of the AND circuit 65, and a signal is output from the output terminal of the ¥100 sheet count register R2 to subtract the number of sheets stored in Y1O0. The output “1” generated from the AND rotation 68 is output to the OR circuit 30.
In addition to this, the input amount
Subtract Y1O0 from .

In this way, by sequentially subtracting the number of sheets stored in the ¥100 sheet number register R2, the stored contents of the \100 sheet number register R2 are emptied.

Since the memory contents of the ¥100 number register R2 become empty, the output of the OR circuit 71 becomes 0'', and the NOR circuit 6
"0" is added to one input of the inverter circuit 56, and "1" is added to the AND circuit 63 as the output of the inverter circuit 56.

The AND circuit 63 also receives as inputs a signal from the output terminal of the Y50 sheet number register, a refund signal (2), and a signal from the OR circuit 46.

When Y2O is turned on, the flip-flop circuit FF is set, so the output of the NOR circuit 61 and therefore the output of the AND circuit 62 ◎ does not occur immediately, but it is output via the AND circuit 57 and the OR circuit 54. Since the stored contents of the 50 sheet number register R1 are moved to the output end at the same time as the Y100 sheet number register R2, the Y50 sheet number register R1 produces an output after a short period of time, depending on the stored contents. .

This output, on the one hand, resets the flip-flop F6'f via the inverter 60 to prevent further movement of the memory contents via the AND circuit 57.
The NOR circuit 61 generates an output, and the output ◎ is generated only through the AND circuit 62.

The output of the Y50 number register R1 is given to the AND circuit 63 on the other hand, and as a result, the AND circuit 63 outputs "1".
is generated, its output is applied to the OR circuit 76, and the above-mentioned Y
As in the case of paying out 50 change, the Y50 payout signal B2 and the output ◎ of the AND circuit 62 described above are combined with the OR circuit 1 in FIG.
Coin payout signal B obtained through 34, Y2O coins are paid out from (!;
8 to shift register SR2 for total payout
Subtract Y5O from the memory contents of .

The change payout confirmation signal PO8 is applied to an AND circuit 55, and to the AND circuit 55, a signal from the output end of the Y50 coin count register R1 and an output from the inverter circuit 56 are also added as inputs.

The memory contents of ¥100 number register R2 are empty, and Y5
If there is a stored content in the 0 coins register R1, an output "1" is generated in the AND circuit 55 every time the change payout confirmation signal PO8 is received, and this output is sent to the Y50 coins register R1 via the OR circuit 54. Y50 The stored contents of the sheet number register R1 are moved by one toward the output end.

This process is repeated until the stored contents of the 50-sheet registration disk R1 become empty.

When the stored contents of the Y50 coin number register R1 become empty, the output "1" of the AND circuit 63 disappears, and the payout of Y50 coins ends.

When the stored contents of the Y50 sheet number register and the ¥100 sheet number register become empty, if the stored contents remain in the shift register SR2 and the output [F] is generated from the OR circuit 46, the AND circuit 62 still outputs ◎. Therefore, the coin payout signal B1 continues to be output via the OR circuit 134, and based on this and the condition that the ¥50 coin expansion signal B2 disappears, Y is issued in the same way as when paying out change.
Make the IO coin payout.

Then, as in the case of YIO mentioned above, the change payout confirmation signal PO8 causes the total payout shift register S
After subtracting from R2, the output of OR circuit 46 is "0"
YIO coins are paid out until YIO is reached, that is, until the storage contents of shift register SR2 become empty.

In this way, in the present invention, by providing the Y50 number register R1 and the ¥100 number register R2, it is possible to refund the same amount of coins 1 in four combinations.

In the embodiment, in order to deal with coin jams, when there is a coin input signal (2), the signal is input to the AND circuit 15
One of the two input terminals of 1 is connected directly to the delay circuit D.
By adding it through elay3, if the coin force is still occurring even after the delay time, AND circuit 1 is applied.
51 produces an output "1", and by applying this output to the OR circuit 153, the output "1" of the OR circuit 153 can prevent subsequent coin insertion.

However; the delay time of the delay circuit Delay3 is sufficiently long compared to the input signal time of the coin, and here the delay time is 3.
A value of Q Q m5ec is used.

According to this method, it is possible to prevent coin insertion after a delay time in the case of a coin jam in which a coin input signal is generated even when the power is interrupted and then turned on again.

In the embodiment, there are other cases in which the CREM is turned off (coin insertion inhibited state) as follows.

In other words, the output "1" is output to the wired AND circuit WA2 mentioned above.
If this occurs.

That is, when the input amount is equal to or exceeds the maximum product setting price, there is no need to input any more coins, and therefore, further coin input is prevented.

Further, when the sales signal T is sent and when the manual refund manual PO1 automatic refund signal ATPO is sent, coin insertion is prevented.

This can be done by adding the output of the wired AND circuit WA2 and the outputs of the sales signal T1 flip-flop circuits FF15, FF, 7 to the OR circuit 152, and adding the resulting outputs of the OR circuit as inputs to the OR circuit 153.
This can be implemented by performing CREM control using the output of the R circuit 153.

When operations such as selling, dispensing change, and refunding are completed, the operation (hereinafter referred to as "clear") for transitioning the electronic control circuit for the vending machine coin knock to a state in preparation for the next sale is as follows. It is done.

That is, the coin payout signal B is applied to a NAND circuit 137 via an inverter circuit 136.

The NAND circuit 137 also receives the refund signal ■ and SE as inputs.
It consists of three people: adding the L signal e to the OR circuit 135 and applying the output of the OR circuit directly and via the delay circuit Delay1.

Therefore, when the coin payout signal B1 is not present and the refund signal (2) or the SEL signal (e) is generated, the output of the NAND circuit 137 becomes 0'' after the delay time of the delay circuit Delayl.

The delay time of the delay circuit Delay1 is sufficiently long compared to other operating times of the embodiment device, and a value of 2 seconds is used here.

The output of the NAND circuit 137 is the wired OR circuit WO7.
Added to 3.

In addition to this, the wired OR circuit WO13 is supplied with a signal EXT clear signal indicating that it is not cleared from the outside and the output of the NAND circuit 130 as inputs.

The EXT clear signal is an internal automatic clear signal ACL.
When you try to get , it is used for yogi, and it is always 1''.

The NAND circuit 130 has a wired OR with the SEL signal e.
The outputs of circuits W0,4 and WO,5 are added,
A wired-OR circuit changes its output to 0 when any of its inputs becomes 0, so EXT,
Either NAND circuit 130 or 137 outputs "0"
”, a change in the output of the wired OR circuits W0,3 is applied to the inverter circuit 138, and the output of the inverter circuit 138 causes the flip-flop circuits FF1.
The output of flip-flop circuit FF7. When the output of the inverter circuit 139 is II 1 jl, an automatic clear signal ACL■ is obtained as an output to the inverter circuit 139.

The ACL signal (2) is applied to the comparators COMP1-COMP and causes the comparators COMP1-COMP9 to be reset.

As described above, the operation of the electronic control circuit for vending machine sales control of the present invention shown in FIG. 1 can be achieved by the embodiments shown in FIGS. By further increasing the two product price setting circuits shown in the diagram and matching other circuits, it is possible to sell products with two or more different prices using one electronic control circuit for vending machine sales control. is also possible.

As described above, according to the present invention, for all set prices, it is determined whether the input amount is equal to or higher than the set price and a sellable signal is generated, and an automatic refund signal is generated. If an invalid coin is inserted, the amount inserted can be automatically refunded, and multiple prices can be arbitrarily set without distinction of high or low, and the circuit should be set according to the high or low price. There are no restrictions or complications in determining the price, and therefore it is extremely easy to set bulk prices.

In addition, some conventional devices automatically refund if the set price determined to set the highest price is unsaleable, but with the present invention, the refund is automatically refunded only when all the set prices are unsellable. For example, even if the smallest unit of money does not have change, if it is a high-value coin with change, it is possible to sell at a set price that allows change to be paid using this high-value coin. This is particularly useful when determining whether a product can be sold (even if the set price determined as the highest price is unsaleable, it may be possible to sell at another set price, so in this case, is effective in increasing sales opportunities by allowing sales at the set price without automatic refunds).

It goes without saying that the above-described operations of the present invention can be applied not only to coins but also to those using, for example, 1000 yen and 500 yen banknotes and 100 yen coins.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a vending machine electronic control circuit of the present invention, and FIGS. 2 and 3 are circuit diagrams of embodiments of the present invention. 1...Encoder, 2...Adder/subtractor,
3...Shift register for total payout, 4...¥50 number register, 5...
¥100 number register, 6...K≧50 comparator, 7...P1+90 adder, 8...
...P, +50 adder, 9...B2+90 adder, 10...B2+50 adder, 11...
... Comparator for P1, 12 ... Comparator for B2, 13 ... P1 price setting circuit, 14.
...P2 price setting circuit, 15...Bend control circuit for P1, 16...Bend control circuit for B2, 17...Coin payout control circuit, 18.・
... Coin jam detection circuit, 19 ... Refund latch circuit, 20 ... Automatic refund circuit, 21 ...
...Select latch circuit, 22...CRE
M control circuit, 23...2-phase lock pulse generation circuit, 24...Bit pulse generation circuit, 25~
27, 37.49-53, 55, 57, 59, 62-6
6, 68. 70.73, 74, 77.102, 106, 108°1
13.116, 119, 121.123, 125°12
9.131～133,141.142,146゜151
．． 155, 158...AND circuit, 28-31
．． 38, 40, 44, 46, 54, 58°67.69.
71.76.80~82,95°103~105.10
7.114.117,120°124.134,135
, 145, 152-154°157...OR circuit, 32-35.83-94°98-101.111.
112,130,137°156・・・・・・NAND
AND circuit, 61,118°122.126,148,
159...NOR circuit, 36.41.43,5
6,60,72,75,78゜79.96,97,10
9,110,115°127.128,136,138
〜140,143゜147.149,150,160〜
162...Inverter circuit, 39,163...
...Cycle timer, Delay 1~Dela
y 4-=delay circuit, FF1 to FF4. FF1. ~FF
, 8...Flip-flop circuit, COMP, ~
COMP, ... comparator, wo-wol,
...Wired OR circuit, WA, ~WA3...
...Wired OR circuit, SR1, SR2...
・2-phase dynamic shift register, R1, R2...
...Register, FA, ~FA4...Full adder, PRICEl, 2...Product setting price, PO
8... Coin payout confirmation signal, ATPO...
... Tearing refund signal, PO... Refund input, A1.
...￥10 No change signal, A2...Y5
0 no change signal, B, coin payout signal, B2...
・・Y50 coin payout signal, T・・・・Sale signal, ■END1, 2・・・・Sellable signal, ESC・
RT RN・・・・・・Coin refund signal in escrow, E
SC/ACC・・・Escrow coin collection signal,
EXT・CL・・・External clear signal, 5ING・
... Price setting number selection signal, ■ ... Coin input signal, ■ ... Refund signal, ■ ... Shift register SR2 memory content presence signal, ■ ...・・・・・・
X>P1 signal, ■...X>P, +90 signal, ■
...X2P1 signal, ■...Auto clear signal ACL, ■...X>B2 signal, ■...
...X>P2+90 signal, ■...X2P2 signal, ■:...Pl-0 signal, ■...B2-
0 signal, ■...Select signal SEL, ■...
...Select signal 5EL1, ■...Select signal 5EL2, [Yes]...Electronic control circuit operation signal for coin mech, ◎...YIO coin payout signal, ■... ...X=P1+50 signal, ■...
...X=P2+50 signal, 5EL1, 5EL2...
...Select input signal, CREM...Coin insertion prevention signal, t1-t7...Bit pulse, φ
1. φ2. φ3...Clock pulse.

Claims (1)

[Claims] 1. A price setting means capable of setting a plurality of prices, and comparing each of the plurality of prices set in the means with the input amount and sending out a sales enable signal for each set price at which the product can be sold depending on the presence or absence of change. In the control circuit for a vending machine, the input amount is greater than or equal to all set prices, and the sale enable signal is not generated for any set price. 1. A control circuit for a vending machine, comprising means for forming an automatic refund signal for automatically returning the input amount when both of the above are established at the same time.