JPH0436458B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a field effect transistor, and particularly to a method for manufacturing a field effect transistor having a recessed structure.

Among field effect transistors, shot barrier gate field effect transistors (MESFETs), which use compound semiconductors such as GaAs, use semiconductors in the gate electrode part to reduce source series parasitic resistance or drain series parasitic resistance and improve drain breakdown voltage. A so-called recess structure in which the operating layer is dug is widely used.

Figure 1 a and b are MESFETs with conventional recessed structure.
A plan view and A- for explaining the manufacturing method of
It is an A′ cross-sectional view.

The operating layer 2 of the MESFET 100 and the operating layer 3 of the two-terminal monitor element 200 are provided on a semi-insulating GaAs substrate 1, and the source electrode 4, drain electrode 5, and
Two electrodes 6, 7 of the monitor element are provided. Covering the entire surface with a mask material 8 such as photoresist,
Openings 9 and 10 are formed in the gate region of the MESFET, the two electrodes 6 and 7 of the monitor element, and the region sandwiched between the two electrodes 6 and 7.

Next, the two electrodes 6 of the two-terminal monitor element 200
While applying a constant voltage V _M between the electrodes 6 and 7 and measuring the current I _M flowing between the two electrodes 6 and 7, the active layers 2 and 3 are etched to a predetermined depth by wet chemical etching. , recesses 11 and 12 are formed. A MESFET with a recessed structure is manufactured using this method.

However, in such a manufacturing method, the active layer 3 of the monitor element 200 and the metal of the electrode 6 or electrode 7, which are electrically connected during etching, are immersed in an etching solution that is an electrolytic solution to form a chemical cell. The etching speed of the GaAs active layer 3 is different from that in pure chemical etching. Therefore,
The etching rate of the active layer is different between the MESFET 100 in which the opening 9 of the mask material 8 is provided only in the GaAs active layer 2 and the monitor element 200, which has the drawback that the monitor element cannot perform its function sufficiently. Moreover, the etching rate ratio of the active layer of the MESFET and the monitor element is not constant, and even if the etching amount is adjusted so that the current I _M is constant, the etching rate after forming the gate electrode is
The saturated drain current I _DSS of MESFETs has a large variation, which has the disadvantage of lowering the yield of MESFETs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a field effect transistor that eliminates the above-mentioned drawbacks, has good controllability using a monitor element, and can be manufactured at a high yield.

According to the present invention, there is a step of forming a semiconductor active layer on a semi-insulating or semiconducting substrate, and forming two electrodes, a source electrode and a drain electrode of a field effect transistor and a two-terminal monitor element, on the active layer. a region forming the gate electrode of the field effect transistor, a portion of at least one of the source electrode and the drain electrode, a portion of the two electrodes of the two-terminal monitor element, and a region forming the gate electrode of the field effect transistor; A step of forming a mask that has an opening in the active layer region sandwiched between the electrodes and covers everything else, and a wet chemical etching method while monitoring the current-voltage characteristics between the two electrodes of the two-terminal monitor element. There is obtained a method of manufacturing a field effect transistor characterized in that it includes the step of digging the active layer to a predetermined depth.

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 2a and 2b are a plan view and a sectional view taken along line B-B' for explaining an embodiment of the present invention.

N-type GaAs operating layer 2 on semi-insulating GaAs substrate 21
2 and 23 are formed. The operating layers 22 and 23 are, for example,
Accelerate Si ions with energy 60KeV and dose 3
Formed by selective ion implantation under conditions of ×10 ¹² cm ^-2 . Next, a laminated metal film made of AuGe alloy and Ni is selectively deposited by a lift-off method using, for example, a photoresist film, and heat-treated to form the MESFET10.
0 source electrode 24, drain electrode 25, and electrodes 26 and 27 of the two-terminal monitor element 200 are formed. Next, the entire surface is covered with a photoresist film 28,
A portion of at least one of the source electrode 24 and drain electrode 25 of the MESFET 100 (both in this example), a portion where the gate electrode is installed, and two electrodes 26 and 27 of the monitor element 200.
Openings 29, 30, 3 are formed in a portion of GaAs sandwiched between these two electrodes 26, 27, respectively.
1 and 32 are provided.

Next, the GaAs is etched using a mixed solution of H ₂ O ₂ , H ₃ PO ₄ , and H ₂ O to form recesses 33 and 34, and the wafer is occasionally pulled up from the mixed solution to remove the electrodes 26 and 27 of the monitor element 200. Measure the current-voltage characteristics between This operation is repeated, and when the current-voltage characteristics reach a desired value, etching is stopped.
For example, when the measurement voltage V _M is 2.5V, the operating layer 23
Etching is stopped when the measured current per 1 mm width reaches 200 mA.

Next, although not shown, as a gate metal,
For example, a gate electrode is formed by a lift-off method in which Ti, Pt, and Au are sequentially vacuum-deposited and the photoresist film 28 is removed, and then bonding pads for each electrode of the MESFET are formed. In this way, recess structures can be created with better reproducibility and control than before.
MESFET can be manufactured.

In the above embodiment, the mask material 28 is applied to both the source electrode 24 and the drain electrode 25 of the MESFET 100.
However, since the source electrode 24 and the drain electrode 25 are electrically connected via the active layer 21, the mask is applied to only one of the source electrode 24 and the drain electrode 25. A similar effect can be obtained by providing an opening in the material. Also,
Although GaAs was used in the above embodiment, it goes without saying that the present invention can be applied to semiconductors other than GaAs.

As explained in detail above, according to the present invention,
The effect is significant because a field effect transistor with a recessed structure can be manufactured with good reproducibility and controllability.

[Brief explanation of drawings]

Figure 1 a and b are MESFETs with conventional recessed structure.
A plan view and a cross-sectional view for explaining the manufacturing method of
FIGS. 2a and 2b are a plan view and a sectional view for explaining an embodiment of the present invention. 1... Semi-insulating GaAs substrate, 2, 3... Active layer, 4... Source electrode, 5... Drain electrode,
6, 7... Monitor element electrode, 8... Mask material,
9, 10...opening, 11,12...recess 11,
12, 21...Semi-insulating GaAs substrate, 22, 23
...Active layer, 24... Source electrode, 25... Drain electrode, 26, 27... Monitor element electrode, 2
8...Photoresist film, 29, 30, 31, 32
...Opening, 33, 34...Recess, 100...
MESFET, 200...Two-terminal monitor element.

Claims (1)

[Claims] 1. A step of forming a semiconductor active layer on a semi-insulating or semiconducting substrate; a step of forming two electrodes, a source electrode and a drain electrode of a field effect transistor and a two-terminal monitor element, on the active layer; sandwiched between a region forming the gate electrode of the field effect transistor, a portion of at least one of the source electrode and the drain electrode, a portion of the two electrodes of the two-terminal monitor element, and the two electrodes of the monitor element. The active layer is formed by forming a mask having an opening in the active layer region and covering everything else, and using a wet chemical etching method while monitoring the current-voltage characteristics between the two electrodes of the two-terminal monitor element. A method for manufacturing a field effect transistor, comprising the step of digging to a predetermined depth.