JPH0568707B2 - - Google Patents

Description

Detailed Description of the Invention The present invention provides an insulated gate semiconductor device (hereinafter referred to as IGF) corresponding to one display pixel in a solid-state display device (panel) configured in a matrix, and the IGF If the
By applying an electric pulse to this failed IGF and sublimating and removing the electrode material at the defective part of the gate electrode (hereinafter referred to as trimming), it is made into a good product.
The aim is to improve the manufacturing yield of the entire panel.

The present invention provides a trimmable IGF that includes a first conductive electrode, a first semiconductor, a first insulator, a second semiconductor, a second conductive electrode, and a second conductive electrode on a transparent insulating substrate. This device uses an IGF in which a channel forming region is formed by a third semiconductor formed on the side surface of the first insulator on the side of a stacked body made of six layers of insulators. This IGF
The present invention relates to providing a solid state display device in which the source or drain of the pixel is connected to each picture element.

The present invention relates to the gate of such an IGF, and the gate electrode tends to sublimate and be partially removed. In addition, when the pulse is insufficient, the gate electrode material and the gate insulator undergo an oxidation reaction, and the channel forming region is removed. The feature is that it prevents the semiconductor from continuing to shoot. For this reason, the gate electrode is mainly composed of chromium, which is a sublimable material, and is made of an oxide conductor mainly composed of tin oxide or indium oxide, or a semiconductor mainly composed of silicon, and the gate insulator is made of nitride, that is, a semiconductor mainly composed of silicon. It is made of silicon nitride or carbide, that is, a silicon carbide insulator. And the gate electrode is 30~
It has a thickness of 1000 Å and is thin enough to be sufficiently vaporized by the energy of the pulse. Another feature is that it is a material that does not have high thermal conductivity like Al, Ag, etc.

The object of the present invention is to provide a composite semiconductor device having such a matrix structure on a substrate and use it as a display device such as a liquid crystal display type or an electrochromic display type which is a solid state display device.

When providing a flat solid state display device, a liquid crystal solid state display device is known in which a pair of electrodes are provided on parallel light-transmitting substrates, such as glass or plastic plates, and liquid crystal is injected between the electrodes.

This liquid crystal display also uses a capacitor (hereinafter referred to as C) as its equivalent circuit.
). For this purpose, IGF and C are arranged in a 2×2 matrix, for example, as shown in FIG.

In FIG. 1, each address of the matrix constitutes one picture element by a pair of IGFs 10 and a display section C70.

For example, these are connected to the bit line as (Y direction leads) 51, 52, and on the other hand, the gate electrodes are connected as branches (X direction leads) 53, 54.
(word line).

Then, for example, 51 and 53 are set as "1", and 5
When 2 and 54 are set to "0", the IGF 10 is turned on and the IGFs at other addresses are turned off. By selecting and turning on arbitrary bit lines and word lines one by one, the display section represented by the electrically equivalent element C70 can be selectively turned on.

In the present invention, when the number of active picture elements in a solid-state display device is, for example, 640×525, it is absolutely impossible to operate the IGF of all the picture elements normally in consideration of the product yield. Therefore, if the gate of one of the IGFs of the pair of IGFs of the present invention is damaged (shot), an electric pulse is applied to the damaged IGF to remove a part of the electrode in the shot area. Each picture element is provided with a so-called redundancy process that makes it a good product by removing the redundancy. In addition, the gate electrode of this IGF uses a sublimable metal that is easily vaporized by a pulse, and is especially a sublimable metal and has a low thermal conductivity (if it is large, the heat generated by the pulse will spread laterally of the electrode, causing the material itself to heat up). It uses a metal whose main component is chromium (which cannot be vaporized).
Also, even if this gate electrode is trimmed, the sheet resistance of the leads in the X direction will be 0.1Ω/□ or less.
It consists of a coating mainly composed of aluminum with a thickness of 0.5 to 3μ, and is characterized by being able to be used without any problems.

In this way, by combining the present invention based on its design specifications, it was possible to create a solid-state display device for flat televisions that can replace cathode ray tubes.

FIG. 2 shows a longitudinal cross-sectional view of a laminated IGF for carrying out the present invention and its manufacturing process.

This figure shows an example of fabrication using IGF for driving display picture elements and fabricating one of these stacked bodies, but the same is true when a plurality of them are fabricated on the same substrate.

In the drawing, a first conductive film 2 is provided on an insulating substrate 1, such as a quartz glass or borosilicate glass substrate, or an organic film, as a lower electrode or one electrode of a picture element. In this embodiment, a light-transmitting conductive film whose main component is tin oxide doped with fluorine is formed to a thickness of 0.3 μm. This was subjected to selective etching using the first mask. Furthermore, on this top surface, P or N
A first non-single crystal semiconductor 3 (hereinafter simply referred to as S1) having a conductivity type of 100 to 3000 Å, a first insulator 4 (hereinafter simply referred to as S2) (0.3 to 3μ), and the same conductivity as the first semiconductor. A third semiconductor 5 (hereinafter simply referred to as S3) (0.1 to 0.5 μm) having a mold was laminated (stacked, ie, referred to as S). Through this lamination, NIN,
It has a PIP structure (I is an insulator).

On this top surface, ITO (indium tin oxide),
_{The second} conductive film 6 (hereinafter _S5
), here we use a metal (500 to 3000 Å) whose main component is chromium in close contact with the semiconductor, and then add aluminum on the top surface with a thickness of 0.5 to 2μ, for example 1μ.
It was used in a stacked manner. Furthermore, a second insulator 7 (hereinafter simply referred to as S5) which is effective as an interlayer insulator is provided on the upper layer.
were laminated to a thickness of 0.5 to 5 μm, for example 1 μm. This insulator is a silicon oxide film, silicon nitride film, or PIQ film made by LP CVD method, PCVD method, photo CVD method, etc.
and other organic resins.

The N and P layers of the first and third semiconductors are N ⁺ N or P ⁺ P, and the first and second electrodes are N ⁺ NINN ⁺ , P ⁺ PIPP ⁺ (I is an insulator), P or N, and the first and second electrodes. It was effective to lower the contact resistance.

In this way, the first conductor 12, the first semiconductor 13, the first insulator 14, and the third semiconductor 1
5. A laminate 60 consisting of the second conductor 16 and the second insulator 17 was formed using a mask.

Here, plasma gas phase etching is performed using, for example, HF gas or a mixed gas of CF ₄ + O ₂ at 0.1 to 0.5 torr.
The etching speed was 500 Å/min at 30 W.

After this, these laminates S113, S214, S31
5. An intrinsic, P ^- or N ^- type non-single crystal semiconductor was laminated as a third semiconductor 24 to cover the conductor 16 and the insulator 17 and constitute a channel forming region. This third semiconductor 24 is deposited on the substrate by silane glow discharge method (PCVD method), photo CVD method, LT CVD method, etc.
Using the HOMO CVD method (also called HOMO CVD method), temperatures ranging from room temperature to 500℃, such as 200℃ in the PCVD method,
Amorphous or semi-amorphous with hydrogen or fluorine added under conditions of 0.1torr, 30W, 13.56MHz
Alternatively, a non-single crystal silicon semiconductor with a polycrystalline structure is used. The present invention focuses on amorphous or semi-amorphous semiconductors.

Furthermore, in the same reactor, a silicon nitride film 25 is coated with silane (disilane is also acceptable) on the top surface by photo-CVD without exposing the third semiconductor surface to the atmosphere.
and ammonia by a gas phase reaction using mercury excitation method, and the thickness was 300 to 2000 Å.

This insulating layer may be immersed in a nitrogen or ammonia atmosphere activated by electromagnetic energy at a frequency of 13.56 MHz to 2.45 GHz at 100 to 400° C. to form silicon nitride in a solid phase vapor phase reaction.

In addition, DMS (H ₂ Si (CH ₃ ) ₂ ), MMS (H ₃ Si
A silicon carbide insulating film may be formed by photo-CVD using methylsilane such as (CH ₃ )).

Thus, in the vicinity of the S214 side as shown in FIG. 2B, a nitride or carbide insulator was formed as the channel forming region 9 and the gate insulator 25 thereon. The third semiconductor 24 forms a diode junction with S1 and S3.

In FIG. 2B, a third conductive film 18 was formed to cover this stacked body to a thickness of 200 to 2000 Å, for example, 500 Å.

The conductive film 18 was a light-transmitting conductive film such as ITO (indium tin oxide), tin oxide, or indium oxide, or a heat-resistant and sublimable conductive film containing Si, Mo, and Cr as main components.

In particular, this was achieved by using a single or double layer film with ITO (30 to 1000 Å) or a metal containing chromium as the main component (30 to 1000 Å).

Furthermore, aluminum was laminated to a thickness of 0.5 to 3 .mu.m, for example 1.5 .mu.m, by vacuum evaporation method on the upper surface, and the sheet resistance was set to 0.1 Ω/□ or less.

Thereafter, a resist was formed on the upper surface, and the aluminum for the word line (X direction) 51 shown in FIG. 3 was etched using a third mask. Furthermore, gate electrodes 19 and 19' were formed by etching using a fourth mask.
Thus, Figure 2C was obtained.

In the present invention, the lead 5 shown in FIG.
The reason for etching 1 and then etching a metal mainly composed of chromium is that the aluminum etching method wraps around the gate insulator under the gate electrode from the side of the gate electrode, degrading the gate insulating film. This is to prevent this.

As is clear from FIG. 2C, the source or drain is formed by S113, S424 having the channel forming region 9, the drain or source is formed by S315, the gate insulator 25 is formed on the side surface of the channel forming region, and the gate electrode 19 is formed on the outer surface thereof. We were able to create a laminated type IGF10 with .

Now, when trying to investigate the operating characteristics of a certain IGF among a group of IGFs configured in a matrix, the defective IGF is generally found in 1 to 20 of a group of 640 x 525 panels.
ke exists. This failure mode is, for example, one in which one of the gate electrodes and the source or drain are shorted. Or, there is a case where a shot occurs between the gate electrode 19 and the conductive electrode 12 constituting the picture element. In such a case, since the electrode 36 of the element is one electrode of the capacitor,
The accumulated charge for a certain period of time during the driving operation must be maintained for normal operation. Moreover, if shot occurs, this charge retention is impossible.

In such a faulty IGF, the current between the X-direction lead and Y-direction lead for driving the IGF is 10nA or more (each IGF has a channel length of 1μ and a channel width of 2mm).
It flows away.

Of course, in the present invention, since the lead in the X direction uses aluminum as the main wiring, the sheet resistance is also 0.1Ω/□ or less, and the thickness is 0.5μ or more. But on the other hand, this lead branched out
The gate electrode of IGF is formed of only ITO, ITO and a metal whose main component is chromium, or only a metal whose main component is chromium, and has a thin thickness (for example, 100 to 800
A) sublimable conductor is used.

In other words, when the gate electrode is made of a metal with such sublimation property and its thickness is thin, the pulse voltage is applied between the leads in the X direction and the leads in the Y direction at a high voltage that does not damage the gate insulator of good quality. It is possible to add This pulsed electricity is not "dulled" by the resistance of the lead wires, but instead enters the gate electrode with a steep waveform and leaks out. Alternatively, only the shot defective portion generates heat, making it possible to partially sublimate and remove the electrode above it.

In addition, the gate insulator was made of silicon nitride, which is not an oxide, or silicon carbide, which is a nitride, rather than an oxide, to prevent the metal and the gate insulator from oxidizing, creating a poor conductor and causing shorts to persist. .

That is, when the gate electrode is made of a metal that easily reacts with an insulating material such as aluminum, it is not preferable to use a metal (such as gold) that easily diffuses into the insulating film because lower oxides are likely to be formed therein.

If one of the IGFs in the pair configuration is faulty, its gate electrode is simply trimmed by applying a pulse voltage and removed. Alternatively, by applying the two methods of removing the gate electrode from the lead by laser trimming to all the defective IGFs in the 640 x 525 matrix picture elements, it became possible to drive them as good products.

FIG. 3 shows a plan view of a portion of the solid-state display device of the present invention shown in FIG.

Figure 3A is (1,1), (1,2) of Figure 1,
(2,1), especially (1,
2) is a plan view of the IGF at address 2). Furthermore, FIG. 3B is a longitudinal sectional view taken along line BB' in FIG. 3A. Further, FIG. 2C corresponds to the longitudinal cross-sectional view taken along line A-A' in FIG. 3A. An electrode 3 extending from the lower electrode 12 of this IGF (provided on the lower side in FIG. 3)
6 is connected to a liquid crystal (capacitor) 70 that constitutes a picture element. On the other hand, although the ground electrode of the liquid crystal 70 is not shown, it is provided above the liquid crystal 70 with the liquid crystal 70 interposed therebetween.

In FIG. 3, a gate electrode 19 provided along the stacked body 60 is connected to a lead 53 in the X direction provided perpendicularly to the stacked body 60. In FIG. The second conductive film 51 provided inside the stacked body 60 was configured as a lead wiring in the Y direction. In this way, it was possible to have a matrix configuration in the X and Y directions and a 1Tr/pixel structure.

Furthermore, as is clear from FIG. 3, this display could be manufactured by photoetching five times (three times for the element alone). Previously 7
However, with the configuration of the present invention, this number can be reduced by two times. Further, the area required for the IGF of the display of the present invention is 1% or less of the total area.

The display area was 91% and the lead area was 8%. When the present invention manufactures a large 20-inch display, the minimum line width of the mask is 25μ using current mask manufacturing technology. However, the present invention requires
Although 25μ is used as the leads in the X and Y directions, the channel length of this IGF is 1μ or less, which has the great advantage of not being subject to mask precision limitations. Since the IGF has a short channel length, the area required for the IGF on the substrate can be reduced, and the accuracy of photolithography does not limit the upper limit of the operating frequency.

Furthermore, since these picture elements operate at high frequencies, the frequency characteristics of IGF are extremely important.
The IGF of the present invention was able to have a cutoff frequency of 10 MHz or more (17.5 MHz) (N-channel IGF) at V _DD = 5 V and V _GG = 5 V. V _h =0.2~
2V was made possible by controlling the concentration of impurities added to S425.

In this way, by trimming only the defective parts of the IGF using the electric panel and selectively sublimating and vaporizing only the defective parts of the gate electrode, the yield of the entire panel can be improved from the previous state of only 3% (defective picture elements are We were able to improve the yield to over 40% (5 pieces or less are considered good).

Furthermore, after these trimming processes have been performed, only the picture element portions are filled with liquid crystal 70 using this IGF overcoat polyimide resin.

In the present invention, the distance between the two electrodes that have been subjected to alignment treatment for the liquid crystal 70 is 1 to 10 μm, for example, GH type liquid crystal is injected into the gap, and in addition, red,
This display can be displayed in color by embedding green and yellow filters. Then, the three elements of red, green, and yellow may be arranged alternately.

In the present invention, it is effective to use a semiconductor as the second laminate and use the periphery of this side as a channel forming region. However, although such a structure has the advantage that there is no step of forming a third semiconductor, in such a case, the surface of this semiconductor is exposed to an etching atmosphere, so that the interface state density is lower than that of the method using the third semiconductor described above. It has the disadvantage that it is larger than the other IGFs, and variations occur between each IGF.

The non-single crystal semiconductor in the present invention is silicon, germanium or silicon carbide (SixCl−x0.8<x<1)
was used.

[Brief explanation of the drawing]

FIG. 1 shows an equivalent circuit of a solid-state display device of the present invention having a matrix structure in which an insulated gate type semiconductor device and a capacitor are used as picture elements. FIGS. 2A, 2B, and 2C are longitudinal sectional views showing the steps of manufacturing a stacked insulated gate type semiconductor device of the present invention. 3A and 3B are longitudinal sectional views of a solid-state display device showing a flat display in which the stacked insulated gate semiconductor device of the present invention, a capacitor, and a display portion are integrated.

Claims (1)

[Claims] 1. Electric pulses are applied to a defective semiconductor device in a plurality of insulated gate field effect semiconductor devices provided in a matrix configuration of a solid-state display device from an X-direction lead and a Y-direction lead. ,
A method for manufacturing a solid-state display device, characterized by selectively removing a part of a gate electrode and converting it into a non-defective product. 2. In claim 1, an insulated gate semiconductor device includes a first electrode having a transparent conductive film on a transparent insulating substrate, a first semiconductor on the electrode,
It has a stacked body in which a first insulator, a second semiconductor, a second conductive film, and an interlayer insulator are stacked in substantially the same shape, and the first and second semiconductors constitute a drain and a source. , a channel forming region is formed by a third semiconductor adjacent to a side of the laminate, and a gate insulating film and a gate electrode are provided on the semiconductor on the side of the laminate. A method for manufacturing a solid-state display device characterized by: 3 In claim 1 or 2, the number of gate electrodes of a defective semiconductor device is 300 to 1000.
1. A method for manufacturing a solid-state display device, wherein the gate insulating film has a thickness of 1.5 Å, and the gate insulating film is made of an insulating film of nitride or carbide.