JPH0239111B2 - TASOHAISENBANNOSEIZOHOHO - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to printed wiring boards, and more particularly to improvements in multilayer printed wiring boards.

Conventional technology Conventional multilayer printed wiring boards are made by stacking an inner layer board with wiring patterns on both sides and a copper-clad laminate board with prepreg interposed between them, then drilling holes after the stacking process is completed. It is manufactured by applying chemical copper plating and electrolytic copper plating, then applying etching resist, and etching the unnecessary copper foil.

Problems to be Solved by the Invention In conventional multilayer printed wiring boards, copper is wasted because a copper layer is formed by electroplating and then etched to form a circuit. For this reason, we tried a method in which a plating resist was applied to areas other than those where the outer layer circuit was to be formed, and the through holes and the outer layer circuit were simultaneously formed by electroless plating.

The most important thing in manufacturing multilayer wiring boards is the reliability of through holes. Among these, the reliability of conduction between the inner layer copper foil in the through hole and the through hole plated copper is important.

One of the factors that affects the reliability of through-holes is the problem of smear removal processing. Holes for through-holes are drilled in the wiring board using a drill, but the heat generated at the time of drilling 7 melts the insulating resin and the resin adheres to the cut surface of the inner layer copper foil 8 (called smearing).
However, if this smear 8 remains, it impairs the conductivity between the inner layer copper foil 4 and the through-hole copper, and when a heating/cooling cycle is applied, a disconnection accident is likely to occur. For this reason, Sumiya 8
The removal process is in progress.

The smear 8 process is performed by immersing the hole in a smear treatment solution, but at this time, the inner layer copper foil 4 is also dissolved and etched, causing an etched back 9 phenomenon in which the hole 7 retreats from the surface to the inside, resulting in through-hole plating. It becomes an obstacle when forming. Therefore, etched back 9
There is a need for conditions in which the amount of smear 8 is small and the smear 8 can be completely removed.

Means for Solving the Problems According to the present invention, a plating resist is applied to an insulating board coated with an adhesive, and electroless plating is performed to form an inner layer circuit to manufacture an inner layer circuit board. An insulating layer and an adhesive layer are sequentially laminated on the surface of this inner layer circuit board. After this, holes for through holes are drilled, and after this hole is drilled, a smear treatment is performed using a smear treatment solution of CrO ₃ aqueous solution, a seeder is attached to the inside of the hole, a plating resist for the outer layer pattern is applied, and CrO ₃ , Smear removal treatment and adhesive roughening are performed simultaneously using a smear treatment liquid consisting of H ₂ SO ₄ and NaF, and through-holes and outer layer circuits are formed by electroless copper plating to produce multilayer wiring boards. It is.

Example A 30 μm thick plating resist layer 3 is formed by screen printing a plating resist ink on a predetermined location of a 1.1 mm thick glass substrate epoxy resin plate in which an insulating substrate 1 containing a plating catalyst is coated with an adhesive 2 containing a plating catalyst. The inner layer substrate 10 is then immersed in an electroless plating solution to form an inner layer double-sided copper foil 4 having a thickness of 30 μm.

An insulating layer 6 with a thickness of 150 μm was formed on the surface of this inner layer substrate 10 using a plating catalyst-containing epoxy resin ink using a screen printing method, and dried and cured at 160° C. for 70 minutes.
Further, a plating catalyst-containing adhesive 12 is applied to a thickness of 30 μm using a curtain coater method, and cured by heating at 160° C. for 90 minutes.

After this, through-holes are drilled 7 using a drill, and smear removal treatment is performed at 40°C for 15 minutes with an aqueous solution containing 900 g of CrO ₃ .

Next, a plating resist layer 13 for forming an outer layer circuit is formed, and then 40 g of CrO ₃ /,
Smear removal treatment again using a smear treatment solution containing 350 ml of H ₂ SO ₄ and 28 g of NaF (40°C, 20 minutes)
After cleaning, immerse it in electroless plating solution to 30 μm.
A four-layer multilayer wiring board 20 is manufactured by plating thick through holes and forming an outer layer copper foil circuit 14.

The concentration of this additional smear treatment solution is CrO ₃ ~ 30
60g/, 250-450ml of H ₂ SO ₄ and 20-450ml of NaF
A range of 40g/ is desirable.

For the CrO ₃ solution used as the initial smear treatment solution, a concentration range of 800 to 1100 g/g is suitable for characteristics such as smear removal, etched back shape, copper foil adhesive strength, and soldering heat resistance. If the concentration is outside this range, any of the above characteristics will be unfavorable.

A hot oil test (260° C., 10 seconds) was conducted using this multilayer printed wiring board 20, and as a result, the number of cycles in which the through-hole resistance exceeded 10% was 55.
Moreover, the connectivity between the inner layer copper and the through-hole plated copper was good.

Effects of the Invention As described above, the present invention is characterized by treating with a CrO ₃ treatment solution as a smear treatment solution, and then performing a smear removal treatment using a mixed solution of CrO ₃ , H ₂ SO ₄ and NaF. Improved connection reliability between foil and through-hole plating.

[Brief explanation of drawings]

FIG. 1 is a sectional view of the present invention, FIG. 2 is a sectional view of an inner layer circuit board, FIG. 3 is a sectional view with smear remaining, and FIG. 4 is a sectional view with smear removed. In the drawings, 1: insulating plate, 2: adhesive, 4:
Inner layer circuit, 8: Smear, 10: Inner layer circuit board, 2
0: Multilayer wiring board.

Claims (1)

[Claims] 1 A pattern is formed using a plating resist on an insulating board coated with an adhesive, and an inner layer circuit is formed by electroless copper plating to form an inner layer circuit board.On top of this inner layer circuit board, an insulating layer and an adhesive layer are formed. After sequentially laminating the circuit boards, a hole is drilled through the circuit board, a plating resist for the outer layer circuit is applied using a CrO ₃ processing solution as a smearing solution, and then a CrO ₃ , H ₂ SO ₄ and NaF solution is applied. A method for manufacturing a multilayer wiring board, characterized by performing smearing and electroless plating to form through holes and outer layer circuits.