JPH0666415B2 - Semiconductor integrated circuit for FM / AM tuner - Google Patents

Description

The present invention relates to a semiconductor integrated circuit in which circuit blocks having different signal frequencies and signal levels such as FM / AM tuners are formed on the same semiconductor substrate.

(B) Conventional technology Electronic equipment such as TV tuners and FM / AM tuners are
Because the audio signal is extracted from the signal, the frequency of the signal handled by each circuit block divided by function is often different. For example, with an FM tuner only for Japan, the RF signal is 76 to 90 MHz, the intermediate frequency signal is 10.7 MHz,
Then, it handles audio signals of 20 to 20000 Hz and a wide range of signals of 20 Hz to 90 MHz.

An example of the FM / AM tuner is shown in FIG. In the figure, (1) is an FM front end circuit that receives an FM broadcast and frequency-converts it to an intermediate frequency by mixing the received frequency signal with the oscillation frequency signal of the local oscillation circuit (2) in the mixing circuit (3), (4) is an FM / IF amplifier circuit that amplifies and limits the amplitude of the intermediate frequency signal (IF signal) and detects it to obtain an FM stereo composite signal. (5) is, for example, Japanese Patent Publication
No. 62-21461, a noise canceling circuit having a function as described above, (6) is a multiplex circuit for demodulating into L channel and R channel signals in the case of stereo broadcasting, and (7) selects AM broadcasting. An AM tuner circuit that outputs an audio signal. For example, in the case of FM broadcast reception, the RF signal input from the antenna (8) and high-frequency amplified by the RF amplification circuit (9) and the oscillation frequency signal output by the local oscillation circuit (2) of the FM front end circuit (1) are input. By mixing in the mixing circuit (3) of the FM front end circuit (1)
Output the IF signal from the FM front end circuit (1)
The composite signal is output from the FM / IF amplifier circuit (4) by detecting the signal with the detector circuit of the FM / IF amplifier circuit (4), and the output terminal (1
0) to output L channel and R channel audio signals, respectively. An FM tuner circuit having such a structure is described, for example, on page 152 of “'88 Sanyo Semiconductor Data Book Portable Audio Bipolar Integrated Circuit Edition”, issued on Dec. 10, 1987.

By the way, in recent years, electronic devices have been required to be smaller and have higher performance, and accordingly, the circuit of FIG. 7 is being integrated into one chip as much as possible. However, in the example of the FM tuner, since the FM front end circuit (1) handles a high frequency signal of several tens of MHz, interference with other circuits due to unnecessary radiation is likely to occur. Further, since the weak level signal from the antenna (8) is handled, the circuit operation is likely to become unstable due to the interference with other circuit blocks, and in a remarkable case, it oscillates. Therefore, it was extremely difficult to integrate the FM front end circuit (1) into one chip.

Further, in recent years, electronic devices have become more and more diversified and diversified, and it is desired to shorten the pattern design time. Further, there are various demands for deleting, replacing, and adding a specific circuit block to a semiconductor integrated circuit whose design has been completed. However, since the specific circuit blocks are not always accommodated in the same occupied area, they have to be redesigned for each requirement, and there is a drawback that the requirements cannot be met immediately.

(C) Problem to be Solved by the Invention As described above, conventionally, it is extremely difficult to integrate the FM front end circuit (1) because circuit interference easily occurs. Also, the development period of pattern design is long,
It had a drawback that it could not meet various demands immediately.

(D) Means for Solving the Problems The present invention has been made in view of the above drawbacks. The FM front end circuit (1) is provided at the corner of the semiconductor chip (11). ) Surround the AM tuner circuit (7) and noise cancel circuit (5) with the FM / IF at a position diagonal to the FM front end circuit (1).
Insert the amplifier circuit (4) and the noise cancel circuit (5)
By arranging on the opposite side of the FM front end circuit (1), the pattern layout with the least circuit interference is provided.

(E) Operation According to the present invention, the FM front end circuit (1) and FM / IF
Since the amplifier circuit (4) is arranged on the diagonal line of the semiconductor chip (11), the two can be separated most in terms of distance. Further, since the noise canceling circuit (5) is sandwiched between the FM front end circuit (1) and the multiplex decoder circuit (6), the multiplex decoder circuit (6) is arranged on the opposite side to the FM front end circuit (1). The decoder circuit (6) can also be separated in distance. Therefore, all circuits can be laid out on the semiconductor chip (11) so that mutual interference is minimized.

(F) Example Hereinafter, the present invention will be described in detail with reference to the drawings.

The mat which makes the pattern design easier first
It will be described with reference to the drawings. In the figure, the semiconductor chip (1
In the center of 1), a divided region (12) is formed so as to cross the straight line, and the element forming region of the semiconductor chip (11) is divided into two regions of substantially the same size in the vertical direction. Divided area (1
2) is a necessary unavoidable region for extending the ground line (13) and the power supply line (14) as will be described later, and is a region where no circuit element is formed. , Each of the divided two areas is the first
And the second area ( 15 ) ( 16 ). Then, a division line ( 17 ) is provided, which is formed by adjoining and extending a pair of the ground line (13) and the power supply line (14) in a direction orthogonal to the divided region (12), and the division line ( 17 ). By arranging a plurality of them in parallel, the surface of the semiconductor chip (11) is divided into a large number of mats (18) of substantially the same size. The size of the mat (18) is set to an occupied area in which an arbitrary number of elements can be laid out, and its width is empirically set so that 5 to 6 NPN transistors can be arranged in one row.

On both sides of the mat (18), the ground line (13) and the power supply line (14) forming the partition line ( 17 ) are extended in pairs, so that they are regularly arranged, for example, facing each other in a comb shape. By extending the mat line, the ground line (13) is on one side of the mat (18) and the power line (1) is on the other side.
4) are extended so that they are in contact with each other, and operating power is supplied to the circuit elements formed on the mat (18).

The ground line (13) and the power supply line (14) extending the partition line ( 17 ) are grouped according to each circuit block and whether or not they have a common impedance, and are arranged on the division area (12). And are individually connected to the corresponding ground electrode pad (19) and power supply electrode pad (20). As a result, a plurality of ground lines (13) and power supply lines (14) extend over the divided region (12), and each one is formed relatively wide to reduce wiring impedance. (12) naturally requires a relatively large occupied area.

Ground line (13) and power supply line (14) extending the division line ( 17 ), ground line (13) and power supply line (14) extending above the division area (12), and in each mat (18) The connection wiring between the circuit elements in is basically performed by the first wiring layer by using a comb-shaped layout. The second and subsequent layers are mainly used to form the signal transmission wiring between the mats (18) and the shield electrode (21) across the partition line ( 17 ) and the divided region (12).

Incidentally, the divided area (12) sometimes extends in parallel with each division line ( 17 ). This is due to the positional restrictions of the Vcc electrode pad (20) and the ground electrode pad (19) with respect to the pin arrangement requirement of the package, and the mat (18) or the circuit function block when there is a relationship in which it is particularly desired to separate them. Between). In FIG. 2, the area between the mats D and E is the former reason, and the area between the mats M and N is the latter reason. Then, the divided areas (12a) extending in parallel with each other.
The Vcc line (14) and the ground line (13) are routed from the Vcc electrode pad (20) and the ground pad (19) provided near the terminal end of the semiconductor chip (11), respectively, and then the divided region (crossing the center of the semiconductor chip (11) ( 12) Draw on top and connect to the circuit elements in each mat (18).

When the functional circuit blocks are housed in the semiconductor chip (11) in which the element formation region is divided into a large number of mats (18) in this way, the circuit blocks are housed as follows.

First, since the mat (18) is designed to have a size that can accommodate an arbitrary fixed number of elements, the circuit block is divided into the fixed number of elements. For example, the size of the mat (18)
If 100 circuit elements are to be stored and the circuit block has about 270 circuit elements, three mats (18) are prepared and each 100 circuit element is used as a guide. Of course, take into consideration capacitors that occupy a large area. Then, according to the above classification, each mat (1
8) Each circuit element is stored in the mat (18) NPN
-The connection wiring between circuit elements such as PNP transistors, diodes, resistors, and capacitors should be completed in the first wiring layer. After repeating the pattern design of all the mats (18) by repeating this, the three mats (18) are arranged adjacent to each other, and the electrical connection between the mats (18) is made by the wiring of the second and subsequent layers. By making the connections, functional circuit blocks are constructed. Then, after all the circuit blocks are stored in the mat (18), all the mats (18) are combined and the circuit layers are electrically connected to each other by the second and subsequent wiring layers to complete the whole IC. design.

According to such a configuration, by storing a plurality of circuit blocks having different functions in an integer number of mats (18), it is possible to design each circuit block and divide the circuit block into a certain number of elements. You will be able to design each mat (18). Therefore, parallel design is possible for each circuit block or mat (18), and the design period can be greatly shortened. In addition, since the circuit can be changed for each circuit block and for each mat (18), it is not necessary to change the design of the entire IC, and the parts other than the changed parts can be used while maintaining the reliability of the previous model.

Next, a semiconductor integrated circuit in which the FM / AM tuner circuit as shown in FIG. 7 is integrated will be described. First, the function of each circuit block will be briefly described.

The FM front end circuit (1) receives an RF signal of several tens of MHz tuned by the antenna (8) and a tuning circuit described later, and inputs the RF signal and the local oscillation frequency signal output by the local oscillation circuit (2). 1 by mixing in the mixing circuit (3)
It has the function of frequency conversion to an intermediate frequency (IF) signal of 0.7MHz. This circuit handles a high-frequency signal of several tens of MHz and must accurately process a signal from a micro level of a few microvolts (μV) to a relatively large amplitude level, and therefore a circuit that avoids interference with other circuit blocks. Is. Especially, since the local oscillator circuit (2) must perform a very unstable operation of high frequency oscillation,
This is the circuit that requires the most attention. Since this circuit is composed of about 250 circuit elements, an area for three mats (18) is required.

The FM / IF amplifier circuit (4) is a circuit that amplifies and limits the amplitude of the intermediate frequency signal with a limiter amplifier circuit, and further has a function of demodulating it into an FM composite signal by detecting it with a detection circuit. In addition, a mute circuit for removing unpleasant noise between stations during selection, an S meter (Signal Meter) circuit as a tuning instruction circuit, and the like are configured as auxiliary circuits. Such a circuit handles a frequency signal that is relatively close to the frequency handled by the FM front-end circuit (1), which is 10.7MHz, and handles a signal of a large amplitude level by amplifying it with a very high gain of 80-100db. IF amplifier circuit (4)
When the leakage current from the FM front end circuit (1) reaches the FM front end circuit (1), the RF signals are drowned out due to mutual signal interference, and especially when the input level is extremely low, the circuit becomes unstable, and when it is remarkable, it oscillates. Therefore, the combination of the FM front end circuit (1) and the FM / IF amplifier circuit (4), especially the local oscillator circuit (2) and the limiter amplifier circuit is a combination in which mutual separation must be made strong.
Since this circuit is composed of about 430 elements in total,
Requires 5 mats (18).

As shown in FIG. 3, the multiplex circuit (6) is a direct current amplifier circuit (30) for amplifying the FM composite signal, a sum signal (L + R) and a difference signal (LR) in the composite signal.
, A decoder circuit (31) for separating left and right stereo signals (L and R) using a 38KHz switching signal created in response to a 19KHz stereo pilot signal included in the composite signal, the presence or absence of the stereo composite signal Lamp driver circuit (33) that drives the stereo pilot lamp (32) according to the phase comparator (34) that synchronizes the internal oscillator circuit with the stereo pilot signal.
And a low pass filter (35), a voltage controlled oscillator circuit (36) and a frequency divider (37). This circuit is
Since the switching operation of the transistor is used to generate the 38 KHz switching signal, it is easy to generate switching noise along with the operation. For example frequency divider (37)
It is the operation of IIL (Integrated Injection Logic) that composes. Therefore, if possible, it is a circuit that should be kept away from the FM front end circuit (1) and the FM / IF amplifier circuit (4). Since this circuit is composed of about 390 circuit elements as a whole, four mats (18) are required.

The noise canceling circuit (5) is controlled to be opened and closed by a delay circuit that delays the composite signal, a gate control circuit that detects a pulse noise included in the composite signal and generates a control signal for gate cutoff, and a gate control circuit. It has a function of removing pulse noise when it is superimposed on the composite signal.
This circuit does not generate switching noise even if it handles high-frequency signals, and requires three mats (18) since it is composed of about 270 elements.

The AM tuner circuit (7) is composed of a high frequency amplifier circuit (RF), a local oscillator circuit (OSC), a mixing circuit (MIX), an automatic gain control circuit (AGC) and a detection circuit (DET), and receives AM broadcasting. Function to output audio (AF) signals. Generally, FM broadcast reception and AM broadcast reception are completely switched by an external control signal, and the number of intermediate cycles is 450 KHz.
Since the frequency is considerably lower than that of FM broadcasting, it can be considered that there is no signal interference between the AM tuner circuit (7) and the FM front end circuit (1) or FM / IF amplifier circuit (4). This circuit is about
Since it has 350 elements, it requires 4 mats (18).

Then, the circuit blocks are placed in the mats (18) required by them and arranged adjacent to each other, and this time, they are arranged in consideration of mutual interference between the circuit blocks. That is, the FM front end circuit circuit (1) is used for mats K to M, the AM tuner circuit (7) is used for mats A to D, the FM / IF amplifier circuit (4) is used for mats E to I, and noise cancellation is performed. The circuit (5) is housed in the mat N to mat P, the multiplex decoder circuit (6) is housed in the mat Q to mat T, and the other (optional) circuits are housed in the mat J, respectively, and the whole of the semiconductor chip (11) is housed. Arrange them so that they fit within the rectangular shape. The functional configuration of the entire IC is realized by processing the connection wiring between each circuit block.

Therefore, the arrangement of each circuit block is as shown in FIG.
That is, the FM front end circuit (1) is located at the corner of the semiconductor chip (11), the AM tuner circuit (7) and the partition line ( 17 ) and a noise canceling circuit (5) on the other side of the FM front end circuit (1) sandwiching the split region (12a), and a FM front end circuit (5) sandwiching the central split region (12). The FM / IF amplifier circuit (4) is located at a diagonal position of the semiconductor chip (11) with respect to 1), and the multiplex decoder circuit is located at a position between the FM canceling circuit (5) with respect to the FM front end circuit (1). Arrange (6) respectively.

According to such a configuration, the FM front end circuit (1) can be arranged in a corner portion and the periphery thereof can be surrounded by the AM tuner circuit (7) and the noise cancel circuit (5) that do not cause circuit interference. In addition, the combination of the FM front-end circuit (1) and the FM / IF amplifier circuit (4) that you want to separate the most can be separated in the semiconductor chip (11) to the maximum extent, and a multiplex decoder circuit that is a switching noise source. (6) can also be provided as far as possible from the FM front end circuit (1). Therefore, the FM front-end circuit (1) can be separated most from the interference signal of the FM / IF amplifier circuit (4) and the switching noise of the multiplex circuit (6), and all circuit blocks can be efficiently used. You can pay.

As mentioned above, the FM front end circuit (1) and the local oscillation circuit (2) are the circuits that require the most attention.
The FM front end circuit (1) is mainly composed of the local oscillator circuit (2) and the mixing circuit (3), and also amplifies the IF output signal of the mixing circuit (3) to produce an FM / IF amplification circuit (4). Amplification circuit (IF / Amp) for outputting to, and automatic gain control circuit (AG for automatically controlling the received signal level
Other circuits associated with the main circuit, such as F), are often incorporated. Therefore, the FM front-end circuit (1) is provided with various interference prevention measures.

First, by covering the entire FM front end circuit (1) with a shield electrode (21) to which a ground potential is applied, unnecessary radiation from the local oscillator circuit (2) is prevented and the FM front end circuit (1) is transmitted. Shields the interference signal of. At that time, if the ground line (13) and the power supply line (14) are formed in the first wiring layer and the shield electrode (21) is formed in the second wiring layer, there is a partition line ( 17 ). , The degree of freedom in designing the connection wiring between the mats (18) in the FM front end circuit (1) is severe. Therefore, FM front end circuit (1)
By removing the partition line ( 17 ), the entire structure can be a two-layer wiring structure. However, the total occupied area is not changed.

Secondly, the local oscillation circuit (2) portion is provided with a dedicated shield electrode (21) to prevent signal interference through the shield electrode (21).

Thirdly, the local oscillation circuit (2) is provided with a dedicated ground electrode pad (19a) to prevent mutual interference due to the wiring having a common impedance.

Fourth, by arranging the local oscillator circuit (2) at the most corner, interference with the local oscillator circuit (2) is minimized.

Fifth, by providing a sucking electrode for sucking a leak current to the substrate, mutual interference by the leak electrodes is prevented.

Sixth, by enclosing the FM front end circuit (1) with a dummy island, the invasion of leak current is suppressed.

FIG. 4 shows a cross-sectional view of the FM front end circuit (1) part which has been subjected to the above means.

In FIG. 4, (41) is a P-type semiconductor substrate and (42) is N.
Type epitaxial layer, (43) N ⁺ type indentation region, (44) P ⁺ type isolation region connected to the substrate (41), (45) island for device formation, (46) dummy island, (47) )
(48) is a P or N type diffusion region for forming circuit elements, (4
9) is an oxide film covering the epitaxial layer (42), (50) is an inter-element connection wiring by the first wiring layer, (13) is a ground line, (51) is a drain electrode, and (52) is an interlayer insulating film. ,
(21) is a shield electrode by the second layer wiring. The shield electrode (21) is supplied with the ground potential GND by the ground line (13) formed by the first wiring layer, and is divided into a plurality of parts by the local oscillation circuit (2) and some others. The drain electrode (51) is provided in the immediate vicinity of the element, which is considered to be at the limit of leakage generation, and is in ohmic contact with the isolation region (44) to drain the leak current and is connected to the ground line (13). In addition, the shield electrode (21) through the through hole
And leaks a leak current to the ground line (13) through the shield electrode (21). Dummy Island (46)
Is a floating state where the power supply potential Vcc is applied or no potential is applied, and the FM front end circuit (1)
In addition to surrounding the whole, it is formed so as to surround only the local oscillation circuit (2).

In this way, the FM front end circuit (1) is provided with a large number of measures against interference, and it is also possible to take measures against interference by using the divided area (12). FIG. 5 shows that a large number of dummy islands (53) are formed along this line by utilizing the occupied area of the divided region (12). The dummy island (53) surrounds the FM front end circuit (1) and the local oscillator circuit (2).
It is equivalent to the dummy island (26) that surrounds the area, and is arranged in all of the divided regions (12a) parallel to the central separation region (12) and the dividing line ( 17 ). In this way, the resistance component due to the N-type layer of the dummy island (53) intervenes,
Since the potential barrier of the PN junction increases the resistance component, it is possible to suppress the interference between the circuit blocks more than the distance.

Fig. 6 also incorporates the above FM front end circuit (1).
It is an FM / AM receiver configured using an IC. In the figure, ( 54 ) is the RF signal tuned by selecting the receiving frequency.
FM front-end circuit (1) mixed circuit (3) or AM
A tuning circuit for outputting to the mixing circuit of the tuner circuit (7),
( 55 ) ( 56 ) consists of a surface acoustic wave filter (57), which extracts only the FM / IF signal from the output signal of the mixing circuit (3).
1, 2nd filter circuit, ( 58 ) is FM / local oscillation circuit (2)
The passive circuit element of the local oscillation circuit (2) that determines the oscillation frequency of (59) is the crystal oscillator that determines the oscillation frequency of the voltage controlled oscillation circuit (VCO) of the multiplex decoder circuit (6), and ( 60 ) is A filter circuit for passing only the AM / IF signal, ( 61 ) is a passive circuit element of the local oscillation circuit of the AM tuner circuit (7), and (62) is an output terminal of the L and R channels. In addition, the entire circuit is realized by externally attaching capacitors and resistors having a value that is difficult to integrate in terms of element constants.

According to the above-mentioned configuration, basically, it is possible to install an FM / AM tuner by externally attaching only a tuning circuit ( 54 ) in addition to externally attaching a large-capacity capacitor, resistor, varistor, or other passive circuit element that is difficult to integrate. Since it can be realized, an inexpensive tuner can be constructed by reducing the number of parts.

(G) Effect of the Invention As described above, according to the present invention, it is possible to maximize the distance between circuit blocks that are likely to cause circuit interference with each other and efficiently store all the circuit blocks, thus minimizing circuit interference. By limiting to the limit, there is an advantage that the FM front end circuit (1) can be built in and an IC can be provided.

Also, since the entire IC is laid out by using the mat (18) as a base and combining the mat (18), it is possible to design in parallel for each circuit block or each mat (18), greatly reducing the pattern design period. Can be achieved. Also, the circuit can be changed for each circuit block or for each mat (18),
It is not necessary to change the design of the entire IC, and it can be used while maintaining the reliability of the previous model except for the changed parts. Therefore, there is an advantage that the IC with built-in FM front end circuit (1) can be designed in a short period of time.

Furthermore, the use of the divided area (12) has an advantage that mutual interference can be minimized.

And since the IC can also accommodate the active circuit element of the FM front end circuit (1), the number of external parts can be reduced,
Therefore, there is an advantage that an inexpensive and high-performance FM / AM radio receiver can be constructed.

[Brief description of drawings]

1 and 2 are plan views for explaining the present invention, and FIG.
The figure is a circuit diagram showing a multiplex decoder circuit (6),
FIG. 4 is a sectional view of an essential part of the FM front end circuit (1), FIG. 5 is a plan view for explaining the present invention, FIG. 6 is a circuit diagram showing a radio receiver of the present invention, and FIG. FIG. 3 is a circuit diagram showing an FM / AM tuner circuit. (1) is an FM front end circuit, (2) is a local oscillator circuit, (4) is an FM / IF amplifier circuit, (5) is a noise cancel circuit, (6) is a multiplex decoder circuit, and (7).
Is an AM tuner circuit, (12) (12a) is a divided area, (13)
Is a ground line, ( 17 ) is a partition line, (18) is a mat, (19) is a ground electrode pad, and ( 54 ) is a tuning circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04B 1/08 E 7240-5K

Claims (3)

[Claims] 1. A frequency conversion from an RF signal to an IF signal is performed by mixing a reception frequency signal and an oscillation frequency signal of a local oscillator circuit.
FM front-end circuit block, FM / IF amplifier circuit block for amplifying and limiting the amplitude of the IF signal to demodulate it into a stereo composite signal, and multiplex for generating left and right stereo signals of L channel and R channel from the stereo composite signal The semiconductor circuit includes a decoder circuit block, an AM tuner circuit block that receives an AM broadcast and outputs an audio signal, and the FM front-end circuit block or a circuit block that hardly causes signal interference. The AM tuner circuit block and the AM tuner circuit block are arranged in a rectangular area of a corner of the chip, and the FM front end circuit block is surrounded by two sides of the rectangular area that face the side edges of the semiconductor chip that forms the corner. Arrange circuit blocks that are less likely to cause signal interference. The FM / IF amplifier circuit block is arranged so as to be arranged on a diagonal line with the M front-end circuit block, and the multiplex circuit is sandwiched between either the AM tuner circuit block or the circuit block in which signal interference is unlikely to occur. FM characterized by arranging blocks
/ AM tuner semiconductor integrated circuit. 2. A dividing region for substantially dividing the semiconductor chip into a first region and a second region, and a dividing region positioned in the center of the semiconductor layer of the semiconductor chip, and the first region and the second region. A semiconductor element arrangement region (mat) formed in the semiconductor layer, which is formed of a plurality of shapes of substantially the same size, and a plurality of electronic circuit blocks in which the size of the circuit is substantially different The semiconductor element of the linear electronic circuit is a linear semiconductor integrated circuit formed in the arrangement area (mat), and all the semiconductor elements of the electronic circuit block classified by the function have the arrangement area (mat). As a unit, the reception frequency signal and the oscillation frequency of the local oscillation circuit are formed substantially in a plurality of arrangement areas (mats) obtained by dividing the total number of semiconductor elements of this electronic circuit block. An FM front-end circuit block that mixes a wave number signal with frequency conversion from an RF signal to an IF signal, an FM / IF amplifier circuit block that amplifies and limits the IF signal to demodulate it into a stereo composite signal, and the stereo composite Multiplex decoder circuit block that generates left and right stereo signals of L channel and R channel from signal, AM tuner circuit block that receives AM broadcast and outputs audio signal, FM front end circuit block or signal interference is unlikely to occur A circuit block, the FM front-end circuit block is arranged in a rectangular region of a corner of a quadrangular semiconductor chip, and the FM front-end circuit block is arranged on two sides of the rectangular region facing a side of the semiconductor chip forming the corner. Front of the AM tuner circuit block to surround the FM front end circuit block A circuit block in which signal interference is unlikely to occur is arranged, the FM / IF amplifier circuit block is arranged so as to be arranged diagonally with the FM front end circuit block, and the circuit in which the AM tuner circuit block or the signal interference hardly occurs An FM characterized in that the multiplex circuit block is arranged so as to sandwich either one of the blocks.
/ AM tuner semiconductor integrated circuit. 3. The semiconductor integrated circuit for an FM / AM tuner according to claim 1, wherein the circuit block in which the signal interference hardly occurs is a noise canceling circuit block.