JPH0652771B2 - Linear semiconductor integrated circuit - Google Patents

Description

The present invention relates to a semiconductor integrated circuit in which circuit blocks having different signal frequencies and signal levels such as FM / AM tuners are formed on the same semiconductor substrate.

(B) Conventional technology Electronic equipment such as TV tuners and FM / AM tuners are
Since the audio signal is extracted from the F (Radio Frequency) signal, the frequency of the signal handled by each circuit block divided for each function is often different. For example, an FM tuner for domestic use alone handles an RF signal of 76 to 90 MHz, an intermediate frequency signal of 10.7 MHz, an audio signal of 20 to 20000 Hz, and a wide range of signals of 20 Hz to 90 MHz.

An example of the FM / AM tuner is shown in FIG. In the figure, (1) is an FM front-end circuit that receives an FM broadcast and frequency-converts it to an intermediate frequency by mixing the received frequency signal and the oscillation frequency signal of the local oscillation circuit (2) with a mixing circuit (3). , (4) is an FM / IF amplifier circuit which amplifies and limits the amplitude of an intermediate frequency signal (IF signal) and detects it to obtain an FM stereo composite signal, and (5) is described in, for example, Japanese Patent Publication No. 62-21461. However, (6) is a multiplex circuit that demodulates to L channel and R channel signals in the case of stereo broadcasting, and (7) is an AM tuner that selects AM broadcasting and outputs an audio signal. Circuit. For example, in the case of FM broadcast reception, input from the antenna (8) and the RF amplification circuit (9)
RF signal with high frequency amplification by FM and FM front end circuit
The local oscillation circuit of (1) and the oscillation frequency signal output by (2) are F
The IF signal is output from the FM front end circuit (1) by mixing in the mixing circuit (3) of the M front end circuit (1), and the IF signal is detected by the detection circuit of the FM / IF amplification circuit (4). Thus, the FM / IF amplifier circuit (4) outputs a composite signal, and the multiplex rotation (6) outputs L channel and R channel audio signals to the output terminal (10), respectively. An FM tuner circuit having such a structure is described, for example, on page 152 of "'88 Sanyo Semiconductor Data Book, Bipolar Integrated Circuits for Portable Audio", issued on Dec. 10, 1987.

By the way, in recent years, electronic devices are required to be smaller and have higher performance, and accordingly, the circuit of FIG. 6 is being integrated into one chip as much as possible. However, the FM
In the tuner example, the FM front-end circuit (1) has a frequency of tens of MHz
Since the high frequency signal of is handled, interference with other circuits due to unnecessary radiation is likely to occur. Further, since the weak level signal from the antenna (8) is handled, the circuit operation is apt to become unstable due to the interference with other circuit blocks, and in a remarkable case, it oscillates. Therefore, it has been extremely difficult to integrate the FM front end circuit (1) into one chip.

Further, in recent years, electronic devices have become more and more diversified and diversified, and it is desired to shorten the pattern design time. Further, there are various demands for deleting, replacing, and adding a specific circuit block to a semiconductor integrated circuit whose design has been completed. However, since the specific circuit blocks are not always accommodated in the same occupied area, they have to be redesigned for each requirement, and there is a drawback that the requirements cannot be met immediately.

(C) Problems to be Solved by the Invention As described above, conventionally, it is extremely difficult to integrate the FM front end circuit (1) because circuit interference easily occurs. Also, the development period of pattern design is long,
It had a drawback that it could not meet various demands immediately.

(D) Means for Solving the Problems The present invention has been made in view of the above drawbacks, and is achieved by covering the FM front end circuit block (1) with an AC grounded shield electrode (17). The former of the above problems is solved. The latter of the above problems is solved by dividing the surface of the semiconductor chip (11) into mats (16) of substantially the same size and placing each circuit block in an area for an integer number of mats (16). To do.

(E) Function According to the present invention, the FM front end circuit block (1) can be shielded by the shield electrode (17) that is grounded in an alternating current, and thus interference with other circuits due to unnecessary radiation can be prevented. Make each circuit block a mat (1
6) Since it is stored in the area for an integral number, parallel design is possible for each circuit block in which the area for an integral number is regarded as one chip, and the circuit block is divided into a certain number of elements and matted (16 ), Each mat (16) can be designed. Therefore, the pattern design time can be significantly shortened, and the circuit can be changed for each circuit block and for each mat (16).

(F) Example Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a plan view showing a semiconductor integrated circuit according to the present invention. In the figure, (11) is a semiconductor chip obtained by integrating the FM / AM tuner circuit as shown in FIG. 6 into one chip, (12) is an electrode pad for the power supply potential V _cc , and (13) is a ground electrode for the ground potential GND. Pads, (14) are power supply lines for supplying the power supply potential _Vcc to each circuit, (15) are ground lines for supplying the ground potential to each circuit, and (16) is a mat. The mat (16) will be described in detail later. And FM / IF
The amplifier circuit (4), the multiplex circuit (6), etc. can be stored in any area, and the same semiconductor chip (1
1) The FM front-end circuit (1) is housed on the above, and the power supply potential V _cc or the ground potential GN that is grounded in alternating current
The shield electrode (17) formed in the second and subsequent wiring layers of the multilayer wiring structure to which D is applied is the FM front end circuit.
It is arranged so as to cover the area accommodating (1). Each circuit block is NPN or PNP transistor, resistor,
It is composed of circuit elements such as capacitors, and the function of each circuit block is achieved by connecting these by electrode wiring. Particularly, if the connection wiring between the circuit elements is formed by the first layer wiring and the shield electrode is formed by the second layer wiring, the number of wiring layers can be minimized.

According to such a configuration, since the shield electrode (17) is fixed at a potential that is grounded in terms of AC, the FM front-end circuit (1), and in particular, the local oscillation circuit (2) accompanied by oscillation operation
It is possible to block unnecessary radiation from and prevent interference with other circuits. Also, because it is shielded by the shield electrode (17), interference from other circuits to the FM front end circuit (1),
In particular, by preventing signal interference with the FM / IF amplifier circuit (4) that handles a signal having a large amplitude level and a frequency relatively close to 10.7 MHz, malfunctions such as oscillation can be prevented.

By the way, the FM front end circuit (1) is a local oscillator circuit.
In addition to the main components of (2) and the mixing circuit (3), I of the mixing circuit (3)
The amplifier circuit (IF / Amp) for amplifying the F output signal and outputting it to the FM / IF amplifier circuit (4) and the automatic gain control circuit (AG) for automatically controlling the received signal level
Other circuits associated with the main circuit, such as C), are often incorporated. All these circuits are other circuits,
In particular, I hate interference with the FM / IF amplifier circuit (4), but among them, the local oscillator circuit (2) must accurately perform extremely unstable operation of high frequency oscillation.
This is the circuit that requires the most attention.

Therefore, as shown in FIG. 2, the local oscillation circuit (2) part is provided with the shield electrode (17a) independently to prevent the shield electrode (17a) from having a common impedance. Firmly fixed to the AC ground potential to stabilize the circuit operation. This is because the interference in the FM front end circuit (1) via the shield electrode (17) and the interference current from other circuits are transmitted via the shield electrode (17) to the local oscillation circuit.
It also prevents interference due to reaching (2). If the shield electrode (17b) that covers the mixing circuit (3) and the shield electrode (17c) that covers the other circuits associated therewith are also divided, the circuit operation can be further stabilized.

Also, in order to prevent mutual interference in the FM front end circuit (1), a ground electrode pad dedicated to the local oscillator circuit (2)
By providing (13a) and providing the ground line (15a) separately from the others, interference caused by any of the ground potential GND wirings having a common impedance is prevented. The ground line (15) of the mixed circuit (3) and other circuits
b) and (15c) are also individually extended to form the ground electrode pad (13
Connect to b). At that time, the ground lines (15b) (15c) and the shield electrodes (17b) (17c) are connected to each other as close to the ground electrode pad (13b) as possible, so that the ground lines (15b) (15c) Minimize unnecessary potential rise due to wiring impedance.

As described above, the local oscillator circuit (2) is the circuit that requires the most attention, and is the circuit that is maximally separated from the FM / IF amplifier circuit (4). Therefore, as shown in FIG. 1, the entire FM front-end circuit (1) is arranged at the corner of the semiconductor chip (11), and as shown in FIG. By arranging 2) at the most corner, the local oscillator circuit (2) is arranged as far as possible from the FM / IF amplifier circuit (4). By doing so, the local oscillation circuit (2) is separated from the distance, and the periphery of the local oscillation circuit (2) is mixed with the mixing circuit (3) and the shield electrodes (17b) (17c) for the other circuits. Surrounded by, FM / IF amplifier circuit
The signal interference from (4) can be minimized. Separation to the corner also minimizes the length of extension of the ground line (15a) from the ground electrode pad (13a) to the local oscillator circuit (2), thus ensuring stable operation of the local oscillator circuit (2). Will also contribute.

In FIG. 2, reference numeral (18) is a suction electrode which is in automatic contact with the high-concentration isolation region therebelow. Suction electrode
(18) is a ground line (15c) extending between the local oscillator circuit (2) and the mixing circuit (3), and the other circuits associated therewith.
In addition to draining the leakage current that flows between the two,
The leak current is sucked by being provided in the immediate vicinity of the circuit element such as NPN / PNP transistor that performs a saturation operation in the circuit element, the capacitor, the resistor, etc., which is expected to leak the leak current. Leakage current leaked out is the same as the ground line (1
5c) to the ground electrode pads (13a) (13b) or to the shield electrodes (17a) (17b) (1
7c), and is connected to the ground electrode pads (13a) (13b) through the Guilland lines (15b) (15c) (15d) that contact the shield electrodes (17a) (17b) (17c). Its sectional structure is as shown in FIG.

In FIG. 3, (21) is a P-type semiconductor substrate, (22) is an N-type epitaxial layer, (23) is an N ⁺ -type buried region, and (24) is a substrate (2
P ⁺ type isolation region connected to 1), (25) islands for element formation, (26a) (26b) dummy islands, (27) and (28) P or N type diffusion regions for circuit element formation, (29) is an oxide film covering the epitaxial layer (22), (30) is an inter-element connection wiring by the first wiring layer, (15c) is a ground line, (18a) (18
b) (18c) is a suction electrode, (31) is an interlayer insulating film, (17a) (17c)
Is a shield electrode by the second layer wiring. Dummy islands (26a) and (26b) are FM front end circuits with other circuits
The FM front-end circuit (1) is provided so as to surround the entire FM front-end circuit (1) in order to prevent interference with the (1) leak current. Furthermore, the dummy island (26b) is an FM front-end circuit.
It is provided so as to surround only the local oscillation circuit (2) of (1). Then, some of the suction electrodes (18a) and (18b) extend through the first wiring layer as they are to become the ground lines (15d) and (15c), and also through the through holes of the interlayer insulating film (31). A ground potential is applied to the shield electrodes (17a) (17c). Other suction electrodes (18c) placed far from the ground line (15c) are
By connecting to the shield electrode (17c) through the through hole, the ground line can be connected through the shield electrode (17c).
Connect to (15c).

In FIG. 2, only the local oscillation circuit (2) is composed of a ground line (15d) for applying a ground potential GND to the suction electrode (18a) and the shield electrode (17a), and a circuit element forming the local oscillation circuit (2). Ground line (15)
By separately providing a) and (a), the rise of the ground potential GND due to the leaked current is suppressed and the circuit operation is stabilized. In addition, external lead pins are also provided exclusively.

According to the above configuration, since the leak current flowing near the surface can be sucked to the ground potential GND by the suction electrode (18), mutual interference with other circuits due to the leak current can be prevented. Further, the suction electrode (18) is not necessarily connected to the ground line (15), but the shield electrode (17)
The drain electrode (18) can be arranged at an arbitrary position in the region where the FM front end circuit (1) is housed, and the leak current is immediately drained immediately in the immediate vicinity of the circuit element which easily leaks. be able to.

The mat 16 for facilitating the pattern design and the semiconductor integrated circuit in which the circuit of FIG. 6 is incorporated in the mat 16 will be described in detail below.

In FIG. 4, first, a divided region (41) is formed in the center of the semiconductor chip (11) so as to cross the semiconductor chip (11) in a substantially straight line.
The element forming region of (11) is divided into two regions having substantially the same size in the vertical direction. The division area (41) is an unavoidable area for extending the ground line (15) and the power supply line (14) as described later and is an area in which no circuit element is formed, and the division area (41) is formed. By doing so, the divided two areas are respectively defined as a first area and a second area ( 42 ) ( 43 ). Then, in the direction orthogonal to the divided area (41), the ground line
The surface of the semiconductor chip (11) is provided by providing a partition line (44) in which the (15) and the power supply line (14) are adjacently extended as a set, and a plurality of the partition lines (44) are juxtaposed. Is divided into a number of mats (16) of substantially the same size. Matt (1
The size of 6) is set to an occupying area in which an arbitrary number of elements can be laid out, and the width thereof is empirically set so that 5 to 6 NPN transistors can be arranged in one row.

On both sides of the mat (16), the ground line (15) and the power supply line (14) forming the partition line (44) extend in pairs, so that they are regularly arranged, for example, facing each other in a comb shape. Circuit formed on the mat (16) by extending so that the ground line (15) contacts one side of the mat (16) and the power supply line (14) contacts the other side of the mat (16). Supply operating power to the device.

The ground line (15) and the power supply line (14) extending the division line (44) are grouped for each circuit block and whether or not they have a common impedance,
The divided regions (41) are extended and individually connected to the corresponding ground electrode pad (13) and power electrode pad (12). As a result, a plurality of ground lines (15) and electrode lines (14) extend over the divided region (41), and each one is formed relatively wide to reduce wiring impedance. (41) naturally requires a relatively large occupied area.

Ground line (15) and power supply line (14) that extend the partition line (44), ground line (15) and power supply line (14) that extend over the divided area (41), and in each mat (16) The connection wiring between the circuit elements in is basically performed by the first wiring layer by using a comb-shaped layout. From the second layer onward, the mats are cut across the division line (44) and the divided area (41).
Mainly used to form signal transmission wiring between (16) and the shield electrode (17).

Incidentally, the divided area (41) sometimes extends in parallel with each division line (44). This is because there is a positional restriction between the _Vcc electrode pad (12) and the ground electrode pad (13) with respect to the package pin arrangement requirement, and when there is a particular relationship in the adjacent mat (16) or the circuit functional block, it is necessary to separate them. mat
Provided between (16). In FIG. 4, between the mats D and E is the former reason, and between the mats M and N is the latter reason. Then, the _Vcc electrode pad (12) and the ground pad (1) provided in the vicinity of the end of the divided region (41a) extending in parallel with each other.
The _Vcc line (14) and the ground line (15) are routed from 3), respectively, and then routed over the divided region (41) which crosses the center of the semiconductor chip (11), in each mat (16). Connect to circuit elements.

When the function-specific circuit block is stored in the semiconductor chip (11) divided into a large number of mats (16) in the element formation region in this way,
Each circuit block is stored as follows.

First, since the mat 16 is designed to have a size capable of accommodating an arbitrary fixed number of elements, the circuit block is divided into the fixed number of elements. For example, the size of the mat (16) is 10
If 0 circuit elements are to be stored and the circuit block has about 270 elements, three mats (61) are prepared and 100 elements are used as a guide. Of course, take into consideration capacitors that occupy a large area. Then, according to the above classification, each mat (1
6) Each circuit element is stored in the mat (16) NPN
The connection wiring between circuit elements such as PNP transistors, diodes, resistors, capacitors, etc. is completed in the first wiring layer. After repeating the pattern design of all the mats (16) by repeating this, the three mats (16) are arranged adjacent to each other, and the electrical connection between the mats (16) is made by the wiring of the second and subsequent layers. By making the connections, functional circuit blocks are constructed. Then, after all the circuit blocks are stored in the mat (16), all the mats (16) are combined, and the circuit layers from the second layer onward are electrically connected to each other to make the entire IC. design.

The FM front end circuit (1) of the present application is also stored in the same manner as described above. In other words, since the FM front-end circuit (1) is composed of about 250 elements, three mats (16) are prepared and the FM front-end circuit (1) is divided into every 80 to 100 elements. Then, according to this division, the circuit elements are housed in the mats K, L, M, respectively, and the connection wiring is arranged. Then, a shield electrode (17) is provided so as to cover the mats K, L, M, and the ground potential GND is applied by the ground electrode pads (13a), (13b) provided exclusively for the FM front end circuit (1). Each other circuit block is also housed in an integer number of mats (16) according to the above means.

According to such a configuration, each circuit block has an integer number of mats (1
By storing in 6), each circuit block can be designed, and the circuit block is divided into a certain number of elements, and the mat (1
6) Each design can be done. Therefore, parallel design is possible for each circuit block, and the design period can be significantly shortened. Therefore, a semiconductor integrated circuit incorporating the FM front end circuit (1) can be designed in a short period of time by accommodating it in the mat (16), and by providing the shield electrode (17), mutual interference can be prevented to prevent FM. The front end circuit (1) can be integrated into one chip. Further, the circuit can be changed for each circuit block and for each mat, so that it is not necessary to change the design of the entire IC.

By the way, if the guilland line (15) and the electrode line (14) are to be formed in the first wiring layer and the shield electrode (17) is in the second wiring layer, respectively, there is a partition line (44). The degree of freedom in designing the connection wiring between the mats (16) in the FM front-end circuit (1) is severe. Therefore, FM front end circuit
(1) removes the division line (44),
Use a layer wiring structure.

This will be described again with reference to FIGS. 1 and 2. That is, the first
As is clear from the overall plan view of the figure and the partially enlarged plan view of FIG. 2, the FM front end circuit (1) part is divided into the division line (4
Release the partition by 4), extend the ground line (15) and power line (14) arbitrarily, and
By using the second layer wiring from the periphery of 7), the connection wiring is performed between the FM front end circuit (1) and the mat (16) forming another circuit. The pattern layout in the FM front-end circuit (1) should conform to that shown in FIG. 2, and the area occupied by the FM front-end circuit (1) should be an integer number of mats (16), specifically, to facilitate transfer. It fits in the area approximately equal to three. With this configuration, the FM front-end circuit (1) does not have the dividing line (44) in the FM front-end circuit (1), which increases the degree of freedom in wiring design, and the shield electrode (17) can be formed only by the two-layer wiring structure.
It is possible to efficiently incorporate the FM front end circuit (1) provided with.

Especially when the number of mats (16) increases, the semiconductor chip
Since it is indispensable to make the mat (16) into a multi-stage structure by providing the divided area (41) to correspond to the rectangular shape of (11), should the FM front end circuit (1) be housed in the mat (16)? Regardless of whether or not the mats 16 are arranged in an area approximately equal to the integer number of mats, it is easy to arrange a large number of mats 16 in a square shape.

Since the divided area (41) requires a relatively large occupied area, F
By disposing circuit blocks that easily cause interference with the M front-end circuit (1) with the divided area (41) interposed therebetween,
Both can be easily separated in terms of distance. In FIG. 1 or FIG. 4, the FM front end circuit (1) is formed in the corner of the semiconductor chip (11) by using the matte K to matte M, and the IF signal which is the output signal is a limiter amplifier circuit. The FM / IF amplifier circuit (4) having the function of amplifying and limiting the amplitude is formed by using the mats E to I by sandwiching the divided area (41) therebetween. Further, the AM tuner circuit (7) is provided on the mats A to D, and the noise canceling circuit (5) is provided on the mats N to P.
The multiplex decoder circuit (6) is integrated in the mats Q to T, and the other (optional) circuits are integrated in the mat I, respectively. The layout in the FM front end circuit (1) may be in accordance with FIG.

According to such a configuration, the FM.I that requires the most attention with respect to the FM front end circuit (1) having the shield electrode (17).
Since the F amplifier circuit (4) can be arranged so as to be separated by the divided region (41), the effect of the shield electrode (17) can be maximized effectively. Further, according to the arrangement of FIG. 1, the FM front end circuit (1) is divided into the divided regions (41) (41a) and the ground line (15).
Since it can be surrounded by, wiring of a fixed potential is extended between them, which can contribute to prevention of interference due to radiation between them.

FIG. 5 shows an FM / AM receiver configured by using an IC which also has the FM front end circuit (1) built therein. In the figure, ( 50 ) is a mixing circuit (3) of the FM front end circuit (1) or A
Tuning circuit that outputs to the mixing circuit of M tuner circuit (7), ( 5
1 ) ( 52 ) consists of a surface acoustic wave filter (53),
The first and only the FM / IF signal is extracted from the output signal of (3)
The second filter circuit, ( 54 ) is a passive circuit element of the local oscillator circuit (2) that determines the oscillation frequency of the FM / local oscillator circuit (2),
( 55 ) is a crystal oscillator that determines the oscillation frequency of the voltage controlled oscillator (VCO) of the multiplex decoder circuit (6), and ( 5)
6 ) is a filter circuit that passes only AM / IF signals, and ( 5
7 ) is a passive circuit element of the local oscillation circuit of the AM tuner circuit (7), and ( 58 ) is an output terminal of the L and R channels. In addition, the entire circuit is realized by externally attaching capacitors and resistors having a value that is difficult to integrate in terms of element constants.

According to the above configuration, basically, a passive circuit element such as a large-capacity capacitor, a resistor, a varistor, etc., which is difficult to integrate is externally attached, and an FM / AM is provided by only externally attaching a tuning circuit ( 50 ).
Since a tuner can be realized, an inexpensive tuner can be constructed by reducing the number of parts.

(G) Effect of the Invention As described above, according to the present invention, the provision of the shield electrode (17) can prevent unnecessary radiation and other interference, so that the FM front end circuit (1) can be provided in the same chip (11). Also has the advantage that it can be integrated.

Moreover, since the shield electrode (17) is divided only for the local oscillation circuit (2) part, the local oscillation circuit via the shield electrode (17)
It has an advantage that signal interference with (2) can be prevented.

Furthermore, since the FM front-end circuit (1), among them, the local oscillation circuit (2) is arranged at the corner of the semiconductor chip (11), the local oscillation circuit (2) is positioned most apart from other circuits. Therefore, there is an advantage that the influence of mutual interference can be minimized.

Then, the suction electrode (1) in the FM front end circuit (1)
Since 8) is connected to the ground line (15) via the shield electrode (17), it has an advantage that the suction electrode (18) can be arranged at an arbitrary position.

Next, the one that is made into an IC using the mat (16) is
(16) A pattern can be designed for each mat, and the mat (1
Since the whole IC can be laid out by combining 6), the IC including the FM front end circuit (1) can be easily designed, and the shield electrode (17) can prevent mutual interference and facilitate coexistence. Have.

At that time, in the FM front end circuit (1), the division line (4
By removing 4), the shield electrode (17) can be formed by the two-layer wiring without impairing the design freedom of the wiring, and since the occupied area is the integer number of the mat (16), the mat (16) It has the advantage that it can be easily arranged and relocated.

Further, by providing the divided area (41) and making the mat (16) a multi-stage structure, a large number of mats (16) including the FM front end circuit (1) can be housed in a square shape, and the FM front end Since the circuit (1) is formed in the area for the integer number of mats (16), there is an advantage that the arrangement and combination of the mats (16) are easy.

Furthermore, the FM front end circuit is sandwiched across the divided area (41).
By arranging (1) and the FM / IF amplifier circuit (4), they can be separated from each other by the divided area (41) and can be surrounded by the ground line (15). Has an advantage that interference due to can be minimized.

The semiconductor integrated circuit is an FM front end circuit.
Since (1) can be integrated into one chip, by adding passive circuit elements such as capacitors, resistors, varistors, etc., which are difficult to numerically aggregate, and circuit elements that make up the tuning circuit ( 50 ), it is inexpensive and has high performance. The FM / AM tuner can be configured.

[Brief description of drawings]

FIG. 1 is a plan view for explaining the present invention, FIG. 2 is a partially enlarged plan view of an FM front end circuit (1) part, FIG. 3 is a sectional view of an essential part of FIG. 2, and FIG. FIG. 5 is a plan view for explaining another example of the invention, FIG. 5 is a circuit diagram for explaining the radio receiver of the present invention, and FIG. 6 is a circuit diagram showing an FM / AM tuner circuit. (1) is the FM front end circuit, (2) is the local oscillator circuit,
(4) is an FM / IF amplifier circuit, (11) is a semiconductor chip, (14)
Is the power line, (15) is the ground line, (16) is the matte,
Reference numeral (17) is a shield electrode, (18) is a suction electrode, (41) is a divided region, (44) is a partition line, and ( 50 ) is a tuning circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04B 1/08 E 7240-5K (56) References JP-A-62-293660 (JP, A) Special features Kai 61-292341 (JP, A) Actual 52-154111 (JP, U)

Claims (6)

[Claims] 1. A front end circuit block including at least a local oscillation circuit and a mixing circuit for frequency-converting an RF (Radio Frequency) signal into an IF (intermediate frequency) signal, and an IF amplification circuit block for amplifying and limiting the amplitude of the IF signal. Are integrated on the same semiconductor substrate, and the front-end circuit block includes a first shield electrode that covers the local oscillation circuit and one or more other shield electrodes that cover other circuits of the front-end circuit block. A linear semiconductor integrated circuit characterized in that the first shield electrode and the other shield electrodes are electrically connected to separately provided ground pads. 2. The linear semiconductor integrated circuit according to claim 1, wherein a leak current drain electrode that is in contact with an isolation region formed on the semiconductor substrate is provided below the shield electrode. 3. Located on a semiconductor layer of a semiconductor chip,
A semiconductor element arrangement region (mat) formed in the semiconductor layer, which has a plurality of shapes of substantially the same size, and a plurality of electronic circuit blocks whose functions are substantially different in circuit size. The semiconductor element of the linear electronic circuit is a linear type semiconductor integrated circuit formed in the arrangement area (mat), and the electronic circuit block divided by the function includes a local oscillation circuit and a mixing circuit, and RF ( A front end circuit block that frequency-converts a Radio Frequency (IF) signal into an IF (intermediate frequency) signal, and I that amplifies and limits the amplitude of the IF signal
At least an F amplifier circuit block, and all the semiconductor elements of the electronic circuit block are arranged in a plurality of arrangements obtained by dividing the total number of semiconductor elements of the electronic circuit block in units of the arrangement area (mat). A linear semiconductor integrated circuit, which is substantially formed in a region (mat), and wherein the front end circuit block is AC-grounded by a shield electrode. 4. Located on a semiconductor layer of a semiconductor chip,
A semiconductor element arrangement region (mat) formed in the semiconductor layer, which has a plurality of shapes of substantially the same size, and a plurality of electronic circuit blocks whose functions are substantially different in circuit size. The semiconductor element of the linear electronic circuit is a linear type semiconductor integrated circuit formed in the arrangement area (mat), and the electronic circuit block divided by the function includes a local oscillation circuit and a mixing circuit, and RF ( A front end circuit block that frequency-converts a Radio Frequency (IF) signal into an IF (intermediate frequency) signal, and I that amplifies and limits the amplitude of the IF signal
An F amplifier circuit block is provided at least, and all the semiconductor elements of the electronic circuit block except the front end circuit block are divided by the arrangement area (mat) as a unit to divide the total number of semiconductor elements of the electronic circuit block. Substantially all the semiconductor elements of the front-end circuit block are formed in the obtained plurality of arrangement areas (mats), and the total number of semiconductor elements of this electronic circuit block is divided by the arrangement area (mat) as a unit. A linear semiconductor integrated circuit, which is formed in a region substantially equal to a plurality of placement regions (mats) obtained by the above, and is grounded in alternating current by a shield electrode. 5. The front-end circuit block is divided into a shield electrode covering the local oscillation circuit and one or more shield electrodes covering other circuits of the front-end circuit block to be shielded. The linear semiconductor integrated circuit according to claim 4, characterized in that. 6. The local oscillation circuit of the front-end circuit block is formed at an end of the circuit block and is provided at a corner of the semiconductor chip.
The linear semiconductor integrated circuit according to item 3, item 3, item 4, or item 5.