JPH0680777B2 - Hybrid integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention has a built-in EPROM in which a chip-type non-volatile memory, for example, EPROM (ultraviolet ray erasable programmable read only memory) is mounted on an integrated circuit substrate. Type hybrid integrated circuit device.

(B) Conventional technology EPRO with a UV irradiation window that can erase and rewrite memory information that has already been written by UV irradiation.
The M element is preferably used in various electronic devices. This E
Most of PROM elements are currently mounted on a printed wiring board together with an integrated circuit for control or driving. In order to rewrite information once written, it is usually mounted on a printed wiring board that is easily removable. ing. For various electronic devices that are required to be small and lightweight, after a semiconductor integrated circuit (IC) chip is directly mounted on a printed wiring board by a technique called chip-on-board and required wiring is performed. The IC chip including the wiring portion is covered with a synthetic resin, and the size and weight are extremely reduced.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be reduced in size and weight because the irradiation window becomes a neck and is still manufactured by being assembled in a sardic type package and mounted on a printed wiring board.

A conventional EPROM device mounting structure will be described with reference to FIG. 10. FIG. 10 is a perspective view showing a partial cross section of a conventional EPROM device, in which a conductive wiring pattern (4
An EPROM element (44) is mounted in a sardip type package in a through hole (43) of an insulating substrate (42) made of glass epoxy resin or the like on which 1) is formed. The EPROM element (44) has a header (45) and a cap (46), and the header (45) is bonded to a ceramic base material (47) with an external lead (48) or a low melting point glass material. Further, in this header (45), an element mounting portion (50) obtained by sintering a so-called gold paste in which a large amount of gold powder is mixed with glass is adhered onto the low melting point glass material or the ceramic base material (47), This element mounting part (50)
An EPROM chip (51) is mounted on the surface of the chip (51) with the UV irradiation surface facing upward, and the electrodes of the chip (51) and the external leads (4) are attached.
8) and are connected by a thin metal wire (52). The cap (46) is a storage member, and the EPROM chip (5
An EPROM that includes a ceramic substrate (54) having a window (53) in a portion facing the ultraviolet irradiation surface of 1), and this cap (46) is placed on a header (45) by a low melting point glass.
The tip (51) is sealed. In this way EPROM chip (5
The EPROM device (44) with the sealed 1) is the insulating substrate (4).
An external lead (48) is inserted through the through hole (43) of 2) and fixed by soldering. This through hole (4
3) has a required wiring arrangement by the conductive wiring pattern (41) and is connected from the male connector terminal portion (55) provided at the end of the insulating substrate to a female connector (not shown). .

Now, the packaging structure of such a conventional EPROM element has an extremely large package outer shape as compared with the EPROM chip (51), and is three-dimensional, that is, the height is several times as high as the height of the chip as well as the plane occupancy rate. It is extremely disadvantageous. Furthermore, it is necessary to fix the lead-out lead through the through-hole (43) with solder or the like. A further major drawback to be noted is that the EPROM device is once assembled into a package prior to mounting on an insulating substrate. Since the EPROM element has a window for UV irradiation, the package is assembled into a cerdip type package that uses ceramics as a base material. However, this package is sealed with a low melting point glass, so it can be used at high temperatures (400 to 500). If the metal thin wire that connects the electrode (aluminum) of the EPROM chip and the external lead is not made of the same kind of material, alloying occurs and wiring resistance increases or disconnection occurs. In order to avoid such a situation, aluminum thin wires are usually used, but this EPROM chip requires a substrate to be at ground potential, so the ground electrode of the EPROM chip is wire-connected to the chip mounting part made of gold paste. . Even in this case, since the secondary or multi-component alloy reaction proceeds between the metal such as gold or foil in the gold paste and the aluminum, a silicon piece having aluminum coated on the head called a ground die is used. Separately from the EPROM chip, fix it to the chip mounting part made of the gold paste, and
The conventional mounting structure is unsatisfactory in terms of small size, light weight, and low price, such as the extremely complicated work of connecting to the ground electrode of the EPROM chip.

There is an EPROM mounting structure shown in FIG. 11 to solve such a problem.

The EPROM mounting structure shown in FIG. 11 will be described below.

An insulating substrate (60) such as a glass / epoxy resin plate with a conductive wiring pattern (60b) formed on the main surface (60a)
Area with chip (60c) to mount EPROM chip (61)
The wiring pattern (60b) is routed from near the area on the main surface (60a) and is connected to a male connector terminal portion (not shown). An EPROM chip (61) is mounted on the area (60c), and this chip (61)
The surface electrode and the wiring pattern (60b) of the metal thin wire (6
Connected by 2). Of course, one of the thin metal wires (62) is connected to the substrate of the chip (61),
The chip (61) is wired with the wiring pattern (60b) mounted thereon. On the ultraviolet irradiation surface (61a) of the EPROM chip (61), an ultraviolet transparent window material (64) is fixed via an ultraviolet transparent resin (63) (for example, Toray Co., model name TX-978). ing. The window material (64) is a known ultraviolet ray transmissive material such as quartz or transparent alumina.
Since the top surface (64a) of the window material (64) is a surface for introducing light to the ultraviolet irradiation surface of the EPROM chip (61),
The remaining window material (64) excluding this top surface (64a),
The thin metal wire (62) and the connecting portion between the thin metal wire (62) and the wiring pattern (60b) are covered with a synthetic resin (65) (for example, model name MP-10 manufactured by Nitto Denko Corporation). if,
Insulating substrate (60), EPROM chip (61) and window material (64)
If it is necessary to further reduce the total thickness dimension including
The chip mounting area (60c) of the substrate (60) may be used as a countersunk hole to grip about half the thickness of the substrate (60). Further, if such counterbore holes are formed, a flow stop dam of the synthetic resin (65) is formed, which effectively acts on ingress of moisture and the like.

The EPROM mounting structure shown in FIG. 10 and FIG.
-83393 (H05K 1/18).

(C) Problems to be Solved by the Invention It goes without saying that the EPROM mounting structure shown in FIG. 11 is miniaturized because the EPROM chip is die-bonded onto the printed circuit board. However, the miniaturization referred to here is only miniaturization of the EPROM itself. That is, the first
Although it is not clear from Fig. 1, the microcomputer and its peripheral circuit elements fixed around the EPROM are composed of electronic components such as discretes. However, when the entire system is viewed, the size of the printed circuit board is not reduced and the printed circuit board is increased in size, that is, the size of the entire system is increased.

Further, in the mounting structure shown in FIG. 10 as well, as in FIG. 10, peripheral circuits of the EPROM, that is, the circuit elements such as the microcomputer and its peripheral LSI, IC are composed of discrete electronic components. However, there is a big problem that the printed circuit board becomes large in size, that is, the entire system becomes large in size, and it is impossible to provide a light, thin, short and small EPROM mounted integrated circuit which is required by the user.

Furthermore, in the EPROM mounting structure shown in FIGS. 10 and 11,
As mentioned above, the whole system becomes larger and EPROM
Also, since the conductive patterns that connect the circuit elements in the surroundings to each other are exposed, there is a problem that reliability is reduced.

Furthermore, in the EPROM mounting structure shown in FIGS. 10 and 11, the EPR
Since the OM and the circuit elements such as the microcomputer and ICs, LSIs and the like around the OM are exposed, there is a problem that unevenness is generated on the upper surface of the substrate, which makes it difficult to handle and reduces workability.

(D) Means for Solving the Problems The present invention has been made in view of the above-described problems, and includes a microcomputer equipped with a chip-type EPROM on a substrate and connected to the EPROM chip, and a peripheral thereof. On a board on which circuit elements are mounted, and where the case material seals and seals the microcomputer and all the circuit elements around it, and only the EPROM chip is exposed by a recess provided at a desired position on the peripheral edge of the case material. It is characterized by having a structure mounted on.

Therefore, the EPROM chip can be extremely miniaturized and the EPROM chip can be easily erased.
A hybrid integrated circuit device with a built-in chip can be provided.

(E) Operation As described above, according to the present invention, an indentation is provided at a predetermined position on the peripheral edge of the case material, and an EP is formed on the conductive path on the substrate exposed by the indentation.
Since the ROM chip is connected and connected to the adjacent conductive path by a wire line, the EPROM chip mounting position can be set arbitrarily, so that the EPROM can be efficiently connected to the built-in microcomputer in consideration of electrical connection. A microcomputer can be connected, and a signal line, that is, a wiring line for a conductive path can be eliminated. Furthermore, the most closely related microcomputer can be placed in the adjacent position of the EPROM chip, the data line for exchanging data between the EPROM chip and the microcomputer can be realized with the shortest distance or the minimum distance, and the packaging density by arranging the data lines can be increased. Therefore, the loss can be minimized, and high-density mounting can be performed.

Further, in the present invention, all elements other than the EPROM chip are housed in a chip-like shape and housed in a sealed space formed by a case material and a substrate. You can

(F) Embodiment Hereinafter, the hybrid integrated circuit device of the present invention will be described in detail based on the embodiment shown in FIGS. 1 to 9.

1 and 2 show a hybrid integrated circuit device (1) according to an embodiment of the present invention. This hybrid integrated circuit device (1) is used as an independent electronic component and is used as an integrated circuit having a function independently in a wide range of fields such as computers.

As shown in FIGS. 1 and 2, the hybrid integrated circuit device (1) includes an integrated circuit board (2), a conductive path (3) having a desired shape formed on the integrated circuit board (2), Conductive path (3)
A non-volatile memory chip (4) connected to the microcomputer, a microcomputer (5) supplied with data from the memory chip (4) and connected to the conductive path (3) on the substrate (2), and peripheral circuit elements thereof ( 6) and a case member (8) which is integrated with the substrate (2) and is provided with a recess (7) at a predetermined position on the peripheral edge.

A hard substrate made of ceramics, glass epoxy, metal, or the like is used as the integrated circuit substrate (2), and in this embodiment, a metal substrate excellent in heat dissipation and mechanical strength is used.

As the metal substrate, for example, an aluminum substrate having a thickness of 0.5 to 1.0 mm is used. As shown in FIG. 3, an aluminum oxide film (9) is formed on the surface of the substrate (2) by known anodic oxidation.
(Alumite layer) is formed, 10-70μ on one main surface side
Insulating resin layer such as thick epoxy or polyimide (10)
Is attached. Furthermore, a copper foil (11) having a thickness of 10 to 70 μm is adhered to the insulating resin layer (10) at the same time as the insulating resin layer (10) by means such as a roller or a hot press.

On the surface of the copper foil (11) provided on one main surface of the substrate (2), a conductive path of a desired shape is exposed by screen printing and masked with a resist, and a noble metal (gold, silver, platinum) plating layer is formed. The surface of the copper foil (11) is plated. Then, the resist is removed and the copper foil (11) is etched using the noble metal plating layer as a mask to form a desired conductive path (3). Here, the fineness of the conductive path (3) by screen printing is 0.5 mm.
Therefore, when a very fine wiring pattern is required, it is possible to form a very fine conductive path (3) of up to about 2 μ by the well-known photo-etching technique.

A non-volatile memory chip (4), a microcomputer (5) to which data is supplied from the memory chip (4) and a circuit element (6) around the non-volatile memory chip (4) are mounted at predetermined positions on the conductive path (3). It is connected to (3). The conductive path (3) is formed to extend over substantially the entire surface of the substrate (2), and a lead fixing pad is formed at the tip of the conductive path (3) extending to the peripheral end of the substrate (2). An external lead terminal (12) is fixed to the. The external lead (12) is bent and formed at a substantially right angle for mounting on the mounting substrate.

EPROM (Erasable as a non-volatile memory chip (4)
A programmable read only memory) chip is used (hereinafter, the nonvolatile memory chip (4) is referred to as an EPROM chip). As is well known, the EPROM chip (4) is an element that can be used by irradiating electrons (program data) accumulated in the floating gate with light to excite them and restore them to an unstored pellet to rewrite them. The EPROM chip (4) is commercially available, and its shape is not limited as long as it is a chip type. In this embodiment, the EPROM chip (4) is used.
The description of the chip (4) is omitted.

On the other hand, the case member (8) is made of a thermoplastic resin as an insulating member, and is formed in a box shape so that a space is formed when it is fixed to the substrate (2). The peripheral edge of the box-shaped case material (8) is arranged substantially at the peripheral edge of the substrate (2) and firmly fixed to the substrate (2) by an adhesive sealant (J sheet: product name). Be integrated. As a result, a predetermined sealed space (14) is formed between the substrate (2) and the case material (8). Furthermore, the case material (8) of this embodiment
A recess (7) is provided at a predetermined position on the peripheral edge side of the. The recess (7) is formed in such a size as to expose the EPROM chip (4) and the bonding wire line connecting the EPROM chip (4) and the conductive path (3). That is,
It will be formed larger than the EPROM chip (4).

The EPROM chip (4) is fixedly mounted on the conductive path (3) on the substrate (2) exposed by the recess (7) provided on the peripheral edge of the case material (8) with a brazing material such as Ag paste or solder. The substrate (2) exposed by the recess (7) has one end of a plurality of conductive paths (3) connected to the EPROM chip (4). An ultrasonic bonding connection is made between one end of the conductive path (3) and the EPROM chip (4) by a bonding wire line such as an Al wire. The other end of the conductive path (3), which is bonded to the EPROM chip (4) by bonding, is efficiently routed to the vicinity of the microcomputer (5) arranged to be connected to the EPROM chip (4) and the chip-shaped microcomputer ( 5) and an Al bonding wire for ultrasonic connection and electrical connection.

Here, the positional relationship between the EPROM chip (4) and the microcomputer (5) will be described. As shown in FIG. 1, EPROM chip (4) and microcomputer (5)
Is connected to each other via a large number of conductive paths (3), the EPROM chip (4) and the microcomputer (5) are respectively located at adjacent positions in order to shorten the routing of the conductive paths (3). Alternatively, they are arranged so that they are located as close to each other as possible. Therefore, the conductive path (3) between the EPROM chip (4) and the microcomputer (5) can be formed in the shortest distance, and the mounting area on the substrate can be effectively used. EPRO
As shown in FIG. 1, the M-chip (4) and the chip-shaped microcomputer (5) arranged in the vicinity of or adjacent to the M-chip (4) are the tips of the conductive paths (3) extending in the vicinity of the microcomputer (5). And the EPROM chip (4) are electrically connected by ultrasonic bonding with a wire of Al or the like.

As is apparent from FIGS. 1 and 2, the EPROM chip (4) is mounted on the substrate (2) exposed by the recess (7) provided on the peripheral edge of the case material (8), and the recess (7) is formed. ) Is surrounded by three-direction wall bodies (7a). More specifically, the EPROM chip (4) and its EPROM chip (4) are surrounded by the three-direction wall body (7a).
And the wire line for bonding connection with the conductive path (3) in the vicinity thereof are surrounded.

Further, the space (7b) surrounded by the wall body (7a) is filled with one or more layers of resin, and the EPROM chip (4) and the wire wire are completely covered with the resin. EPROM
The resin of the first layer directly coated on the chip (4) is EPRO
An ultraviolet ray transmissive resin (15a) is used because it is necessary to transmit ultraviolet rays when erasing the data of the M chip (4). The ultraviolet transparent resin (15a) is not limited as long as it is a non-aromatic resin, and for example, methyl silicon rubber or silicon gel is used.

In this embodiment, the second layer resin layer (15b) is filled on the first layer ultraviolet-transparent resin (15a). Unlike the first layer, the second resin layer is made of a UV impermeable resin (15b) that blocks UV rays in order to prevent erroneous erasure of the EPROM chip (4). This UV impermeable resin (15b)
Is not limited as long as it is a resin containing an aromatic ring (benzene ring), and, for example, an epoxy-based or polyimide-based resin is used, and is filled until it substantially matches the upper surface of the case material (8).

Therefore, only the EPROM chip (4) is surrounded by the wall body (7a) and covered with resin, and the other microcomputer (5) and the circuit elements (6) around it are provided with the case material (8) and the substrate (2). It will be arranged in the sealed space (14) formed by.

As described above, the microcomputer (5) connected to the EPROM chip (4) and the circuit elements (6) around it are the sealed space (1) formed by the substrate (2) and the case material (8).
It is set to be placed in 4). That is, all elements such as chip-shaped electronic components and resistance elements such as printing resistors and plating resistors are provided in the sealing space (14).

By the way, in the present embodiment, the space (7
b) to the ultraviolet transparent resin (15a) and the non-transparent resin (15a)
Impermeable resin (15b) consisting of a two-layer resin structure of b)
As shown in Fig. 4, instead of the non-transparent resin (15b), even if the sealing material (16) for shading is adhered to the recess (7) of the case material (8), the ultraviolet rays are completely blocked. can do.

In the case of erasing the data of the EPROM chip (4) in this embodiment, the UV impermeable resin (15b) or the sealing material (16)
When peeling off and irradiating with ultraviolet rays and rewriting, also peel off the ultraviolet ray transmissive resin (15a) on the EPROM chip (4) and bring a terminal such as a probe into contact with the electrically conductive path (3) in the vicinity of the bonding, Write the data from the writing device. When peeling off the ultraviolet permeable resin (15a), the resin (15a) does not break the wire due to its weak adhesion.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

First, a modem (MODEM) exists for data communication in which digitized data handled by a data terminal such as a personal computer is transmitted and received at a distance from each other using a telephone line. The function of the modem is to modulate the digitized data by using the frequency that can be used in the telephone line, convert it into an analog signal and put it on the telephone line, and the analog signal modulated with the data sent from the other party. It has the function of demodulating and returning to digitized data.

The modem will be briefly described based on the block diagram shown in FIG.

FIG. 5 is a block diagram when a modem is mounted on the integrated circuit board (2).

The modem stores a data transmitted from a personal computer in a built-in memory and outputs the data, and a micro that outputs a predetermined output signal based on the data output from the DTE interface (21). The computer (5), the built-in EPROM (4) addressed by the microcomputer (5), and the output signal from the microcomputer (5) are modulated and demodulated to NC.
DTMF generation that generates a desired DTMF signal (tone signal) according to the output signals from the first and second modulation / demodulation circuits (22) and (23) output to the U (NETWORK CONTROL UNIT) and the microcomputer (5) It is composed of a container (24) and.

The DTE interface is composed of an IC such as STC9610 (Seiko Epson), and as shown in FIG. 6, a transmission memory that supplies the output signal of the personal computer, accumulates the output signal in the internal memory, and outputs it to the microcomputer (5). Section (25), a reception memory section (26) for accumulating a signal supplied with an output signal from the microcomputer (5) in a built-in memory and outputting it to a personal computer, a transmission memory section (25) and a reception memory section The control unit (27) switches each signal input and output via the (26) and has a predetermined function for connecting the personal computer (28) and the microcomputer (5).

The microcomputer (5) is composed of an IC such as STC9620 (Seiko Epson), and as shown in FIG. 7, it is recognized by the command recognition unit and the command recognition unit that recognizes the output signal output from the DTE interface (21). The command decoding unit that decodes the output signal, the command execution unit that compares the data in the memory unit based on the signal decoded by the command decoding unit and supplies the data to the modem circuit, the data in the command decoding unit and the data in the memory unit When incorrect data is supplied to the command execution unit as a result of comparison with
The DTE interface (21) includes a response code generation unit that outputs an output signal.

The modulation / demodulation circuit (28) converts the digital signal transmitted from the microcomputer (5) into an analog signal and transmits it to the NCU unit. On the contrary, it converts an analog signal transmitted from the NCU unit into a digital signal and transmits it to the microcomputer (5), and has low-speed and medium-speed circuits. The first modulation / demodulation circuit (22) is 30
This is a low-speed modulation / demodulation circuit of 0 bps, and the second modulation / demodulation circuit (23)
Is a 1200bps medium speed modulation / demodulation circuit. One of the first modulation / demodulation circuit (22) and the second modulation / demodulation circuit (23) is selected by the microcomputer (5).

The DTMF generator (24) generates a predetermined DTMF signal by inputting the data output from the command execution unit of the microcomputer (5) to the input terminals of each of COL and ROW, and transmits AMP.
Output to (29a) and supply signal to telephone line.

Program data for setting various modes of the modem is stored in the EPROM chip (4) and is supplied to the microcomputer (5) based on the address of the microcomputer (5).

Next, the operation of the modem will be briefly described.

First, when the personal computer communication is started, the control switch (29d) operates based on the read signal from the microcomputer (5), the predetermined address data is supplied to the EPROM chip (4), and based on the address. The program data of the EPROM chip (4) is supplied to the microcomputer (5), and the communication standard (BELL / CCITT standard), communication speed (300 / 1200bps), data format match, and dep of each modem for communication. It is confirmed whether various modes such as switching of the switch mode match.

Assuming that the various modes are the same, enter the telephone number of the answering modem into the personal computer. The telephone number is input to the DTE interface (21) for interfacing with a personal computer and transferred to the microcomputer (5) for decoding the telephone number. The decrypted result
Send to DTMF generator (24) and DTMF from DTMF generator (24)
A signal is transmitted and the signal is transferred to a general telephone line via a transmission AMP (29a) and a line transformer (29c).

The transferred DTMF signal sends a calling signal to the answering modem, and the answering modem receives the calling signal and automatically receives the incoming call. The answering modem then sends the answer tone to the calling modem for the connection procedure.

The modem on the calling side passes through the line transformer (29c) and the receiving amplifier (29b), and the low speed modulation / demodulation circuit (22) detects whether or not the answer tone is a predetermined answer tone for the modem on the calling side. . If it is a predetermined answer tone, the communication state is entered.

In the communication state, the parallel gater from the personal computer is input to the DTE interface (21) based on a predetermined key input signal from the keyboard of the calling personal computer, and the data is transferred to the microcomputer (5). Here, the parallel data is converted into serial data. The digital signal converted into serial data is transmitted to the low speed modulation / demodulation circuit (22). Here, the digital signal is converted into an analog signal, frequency modulation FSK is performed based on the communication standard corresponding to it, transmission AMP (29), line transformer (32)
To the modem on the answering side.

On the other hand, the frequency-modulated analog signal sent by the key input signal of the response side personal computer is sent to the calling side modem and input to the low speed modulation / demodulation circuit (22) via the line transformer (29c) and the receiving AMP (29b). To be done. Here, the analog signal is converted into a digital signal and the DTE interface (2
It is input to 1), converted from a serial digital signal to a parallel digital signal, and input to the calling personal computer. As a result, the personal computer for the calling side and the personal computer for the answering side can perform full-duplex communication, thus realizing personal computer communication.

FIG. 8 is a plan view of the modem circuit shown in FIG. 4 mounted on the substrate (2) used in this embodiment, and the circuit elements to be mounted have the same reference numerals. The connection between the EPROM chip (4) and the microcomputer (5) is shown by a bus line. The conductive paths connecting the plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 8, a plurality of fixing pads (3a) to which the external lead terminals (12) are fixed are provided on the opposing peripheral ends of the substrate (2). A plurality of circuit elements and a plurality of circuit elements are provided at predetermined positions on the conductive path (3) extending from the fixing pad (3a).
The EPROM chip (4) is fixed. As described above, a plurality of circuit elements including an EPROM chip (4) and a microcomputer (5) are fixed on the substrate (2), (21) is a DTE interface, and (22) (23) are First and second modulation / demodulation circuits, (24) a DTMF generation circuit,
(29a) is a control switch for controlling the EPROM (4), (5)
Is a microcomputer, and (6) is a chip component such as a capacitor.

As shown in FIG. 8, the EPROM chip (4) is fixed near or adjacent to the microcomputer (5). By fixing the EPROM chip (4) near or adjacent to the microcomputer (5), the bus line between the microcomputer (5) and the EPROM chip (4), that is, the routing line of the conductive path (3) The distance can be set at the shortest distance and the shortest distance, and other mounting patterns can be effectively used and high-density mounting can be performed. The area surrounded by the alternate long and short dash line shows the area where the case material (8) is fixed with an adhesive sheet.

FIG. 9 shows a case material (8) on the substrate (2) shown in FIG.
FIG. 9 is a plan view of a finished product of the hybrid integrated circuit device for the modem when the IC chip is fixed, and shows the upper surface of the second resin layer (15b) coated on the EPROM chip (4) from the upper surface of the case material (8). Only the state is exposed. That is, all the elements other than the EPROM (4) are sealed in the sealing space (14) formed by the case material (8) and the substrate (2).

According to the present invention, the recess (7) is provided at a desired position on the peripheral edge of the case material (8), and the EPROM is formed in the conductive path (3) on the substrate (2) exposed by the recess (7). A sealed space (14) formed by the substrate (2) and the case material (8), which connects the chip (4) and the adjacent conductive path (3) by a wire line.
By fixing the microcomputer (5) and the other circuit element (6) to the device, the integrated device of the hybrid integrated circuit and the EPROM chip (4) has a great feature that it can be made extremely small.

(G) Effect of the Invention As described above in detail, according to the present invention, firstly, the recess (7) is provided at a desired position on the peripheral edge of the case member (8), and the recess (7) exposes the recess. On the conductive path (3) on the finished substrate (2)
Since the EPROM chip (4) is connected, there is an advantage that the mounting position of the EPROM (4) can be arbitrarily selected. Therefore, in consideration of the electrical connection with the built-in microcomputer, the EPROM chip (4) and the microcomputer (5) can be efficiently connected, and the wiring of the signal line can be eliminated.
More specifically, the most closely related microcomputer (5) can be arranged at a position adjacent to the EPROM chip (4), and as a result, a data line for exchanging data between the EPROM chip (4) and the microcomputer (5). Can be realized with the shortest distance or the layout that can be easily designed, and the loss of the mounting density due to the routing of the data lines can be minimized.

Second, the EPROM chip (4) is placed in the recess (7) at the desired position on the peripheral edge of the case material (8), and the microcomputer and its peripheral circuit elements to be incorporated on the integrated circuit board (2) By improving the packaging density, it is possible to eliminate the conventionally required printed circuit board and realize a hybrid integrated circuit device incorporating an extremely small EPROM chip (4).

Thirdly, by using a metal substrate as the integrated circuit board (2), the heat radiation effect thereof can be greatly improved compared with the printed circuit board, which can contribute to further improvement of the mounting density. Further, by using the copper foil (11) as the conductive path (3), the resistance value of the conductive path (3) can be significantly reduced as compared with the conductive paste, and the mounted circuit can be expanded to a level equal to or larger than that of the printed circuit board.

Fourth, the microcomputer (5) connected to the EPROM chip (4) and its peripheral circuit element (6) are placed in the sealed space (14) formed by the case material (8) and the integrated circuit board (2). Since it is incorporated in a die shape or a chip shape, it has an advantage that the occupied area becomes extremely smaller than that of a conventional printed circuit board that is resin-molded, and the packaging density can be greatly improved.

Fifth, by substantially matching the peripheral edges of the case material (8) and the integrated circuit board (2), almost the entire surface of the integrated circuit board (2) can be used as the sealing space (14), and the packaging density Combined with the improvement, an extremely compact hybrid integrated circuit device can be realized.

Sixth, a resin layer (15b) for shading on the EPROM chip (4)
Is provided, the EPROM chip (4) can be protected and can be shielded from light, and the EPROM chip (4) can be protected.
It has the advantage that the gap of the depression (7) can also be sealed.

Seventh, the external leads (12) can be led out from one side of the integrated circuit board (2) or the opposite sides, which has an advantage that an extremely multi-pin hybrid integrated circuit device can be realized.

[Brief description of drawings]

FIG. 1 is a perspective view showing this embodiment, and FIG. 2 is I- in FIG.
I sectional view, FIG. 3 is a sectional view of the substrate used in the embodiment, FIG.
FIG. 7 is a sectional view showing another embodiment, FIG. 5 is a block diagram showing a modem used in this embodiment, FIG. 6 is a block diagram showing a DTE interface of the modem shown in FIG. 5, and FIG. FIG. 5 is a block diagram showing a microcomputer of the modem shown in FIG. 5, FIG. 8 is a plan view when the block diagram shown in FIG. 5 is mounted on a substrate, and FIG. 9 is a substrate shown in FIG. FIGS. 10 and 11 are cross-sectional views showing a conventional EPROM mounting structure when a case member is fixedly attached thereto. (1) ... hybrid integrated circuit device, (2) ... integrated circuit board, (3) ... conductive path, (4) ... EPROM chip,
(5) ... Microcomputer, (6) ... Circuit element, (7) ... Dimple, (7a) ... Wall, (8) ... Case material, (15a) ... UV transparent resin, ( 15b) ... UV impermeable resin.

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Osamu Nakamoto 2-18 Keihan Hondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd. (72) Katsumi Okawa 2-18 Keiyo Hondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd. (72) Inventor Yasuhiro Koike, 2-18 Keihan Hondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd. (72) Inventor Masao Kaneko 2-18, Keihan Hondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd. (72) Inventor Seiwa Ueno 2-18, Keihanhondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd. (72) Inventor Yasuo Saito 41-1, Omama-cho, Yamama-gun, Gunma Prefecture Tokyo IC

Claims (11)

[Claims] 1. An integrated circuit substrate, a conductive path having a desired pattern formed on the substrate, a nonvolatile memory chip connected to the conductive path, and data supplied from the memory and on the substrate. A microcomputer connected to the conductive path and its peripheral circuit element, and a case member integrated with the substrate, a recess is provided at a desired position on the peripheral edge of the case member, and exposed at the recess. The non-volatile memory chip is fixed to the conductive path on the substrate, the electrode of the non-volatile memory chip and the desired conductive path are connected by a bonding wire, and a sealing space formed by the substrate and the case material. 2. A hybrid integrated circuit device characterized in that the microcomputer and its peripheral circuit elements are arranged in the. 2. The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit substrate. 3. The hybrid integrated circuit device according to claim 1, wherein a copper foil is used as the conductive path. 4. The hybrid integrated circuit device according to claim 1, wherein the nonvolatile memory chip is sealed with a sealing resin layer in which a resin that transmits ultraviolet rays is injected into the recess. 5. A sealing resin layer for blocking ultraviolet rays is provided on the sealing resin layer in the recess.
A hybrid integrated circuit device as described. 6. The upper surface of the sealing resin layer and the upper surface of the case member are substantially aligned with each other.
A hybrid integrated circuit device as described. 7. The hybrid integrated circuit device according to claim 4, wherein a sealing material is adhered to the upper surface of the case material so as to cover the recess. 8. The hybrid integrated circuit device according to claim 1, wherein the microcomputer is mounted on the conductive path in a die shape. 9. The hybrid integrated circuit device according to claim 1, wherein a chip resistor and a chip capacitor are used as the peripheral circuit element. 10. The hybrid integrated circuit device according to claim 1, wherein a peripheral end portion of the case material is substantially aligned with a peripheral end portion of the substrate except the recess. 11. The hybrid integrated circuit device according to claim 1, wherein the external lead is led out from one side except the side where the recess is provided.